linux-sunxi/u-boot-sunxi
1
0
Fork 0
mirror of https://github.com/linux-sunxi/u-boot-sunxi.git synced 2024-02-12 11:16:03 +08:00
Code Issues Projects Releases Wiki Activity

MIPS: Enable use of the instruction cache earlier

Browse Source 
Enable use of the instruction cache immediately after it has been
initialised. This will only take effect if U-Boot was linked to run from
kseg0 rather than kseg1, but when this is the case the data cache
initialisation code will run cached & thus significantly faster.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
This commit is contained in:
Paul Burton
2016-09-21 11:18:49 +01:00
committed by Daniel Schwierzeck
parent 8cb4817d0f
commit 33b5c9b209
2 changed files with 13 additions and 8 deletions
Download Patch File Download Diff File Expand all files Collapse all files

8
arch/mips/cpu/start.S
View File

@ -12,10 +12,6 @@
#include <asm/regdef.h>
#include <asm/mipsregs.h>
#ifndef CONFIG_SYS_MIPS_CACHE_MODE
#define CONFIG_SYS_MIPS_CACHE_MODE CONF_CM_CACHABLE_NONCOHERENT
#endif
#ifndef CONFIG_SYS_INIT_SP_ADDR
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + \
CONFIG_SYS_INIT_SP_OFFSET)
@ -154,10 +150,6 @@ reset:
PTR_LA t9, mips_cache_reset
jalr t9
nop
/* ... and enable them */
li t0, CONFIG_SYS_MIPS_CACHE_MODE
mtc0 t0, CP0_CONFIG
#endif
/* Set up temporary stack */