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drivers/ddr/fsl: update workaround for erratum A-008511
Per the latest erratum document, update step 4 and step 8, only DEBUG_29[21] is changed, all other bits should not be changed. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
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@ -240,8 +240,10 @@ void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs,
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/* Disable DRAM VRef training */
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ddr_out32(&ddr->ddr_cdr2,
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regs->ddr_cdr2 & ~DDR_CDR2_VREF_TRAIN_EN);
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/* Disable deskew */
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ddr_out32(&ddr->debug[28], 0x400);
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/* disable transmit bit deskew */
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temp32 = ddr_in32(&ddr->debug[28]);
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temp32 |= DDR_TX_BD_DIS;
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ddr_out32(&ddr->debug[28], temp32);
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/* Disable D_INIT */
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ddr_out32(&ddr->sdram_cfg_2,
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regs->ddr_sdram_cfg_2 & ~SDRAM_CFG2_D_INIT);
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@ -358,7 +360,9 @@ step2:
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debug("MR6 = 0x%08x\n", temp32);
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}
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ddr_out32(&ddr->sdram_md_cntl, 0);
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ddr_out32(&ddr->debug[28], 0); /* Enable deskew */
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temp32 = ddr_in32(&ddr->debug[28]);
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temp32 &= ~DDR_TX_BD_DIS; /* Enable deskew */
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ddr_out32(&ddr->debug[28], temp32);
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ddr_out32(&ddr->debug[1], 0x400); /* restart deskew */
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/* wait for idle */
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timeout = 40;
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