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powerpc/mpc85xx: Make NMG_CPU_A011 workaround conditional

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This erratum applies to the following SoCs:
P4080 rev 1.0, 2.0, fixed in rev 3.0
P2041 rev 1.0, 1.1, fixed in rev 2.0
P3041 rev 1.0, 1.1, fixed in rev 2.0.

Workaround for erratum NMG_CPU_A011 is enabled by default. This workaround
may degrade performance. P4080 erratum CPU22 shares the same workaround.
So it is always enabled for P4080. For other SoCs, it can be disabled by
hwconfig with syntax:

fsl_cpu_a011:disable

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
This commit is contained in:
York Sun
2012-08-08 18:04:53 +00:00
committed by Andy Fleming
parent 7b8f6685fb
commit 57125f222e
4 changed files with 56 additions and 3 deletions
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15
arch/powerpc/cpu/mpc85xx/release.S
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@ -163,6 +163,12 @@ __secondary_start_page:
cmpw r3,r5
bge 2f
1:
#ifdef CONFIG_SYS_FSL_ERRATUM_NMG_CPU_A011
lis r3,toreset(enable_cpu_a011_workaround)@ha
lwz r3,toreset(enable_cpu_a011_workaround)@l(r3)
cmpwi r3,0
beq 2f
#endif
mfspr r3,L1CSR2
oris r3,r3,(L1CSR2_DCWS)@h
mtspr L1CSR2,r3
@ -346,6 +352,15 @@ __bootpg_addr:
__spin_table:
.space CONFIG_MAX_CPUS*ENTRY_SIZE
/*
* This variable is set by cpu_init_r() after parsing hwconfig
* to enable workaround for erratum NMG_CPU_A011.
*/
.align L1_CACHE_SHIFT
.global enable_cpu_a011_workaround
enable_cpu_a011_workaround:
.long 1
/* Fill in the empty space. The actual reset vector is
* the last word of the page */
__secondary_start_code_end: