linux-sunxi/u-boot-sunxi
1
0
Fork 0
mirror of https://github.com/linux-sunxi/u-boot-sunxi.git synced 2024-02-12 11:16:03 +08:00
Code Issues Projects Releases Wiki Activity

Some code cleanup.

Browse Source
This commit is contained in:
Wolfgang Denk
2007-03-04 01:36:05 +01:00
committed by Wolfgang Denk
parent b24444f1b3
commit 647d3c3eed
8 changed files with 78 additions and 94 deletions
Download Patch File Download Diff File Expand all files Collapse all files

1
doc/README.mpc7448hpc2
View File

@ -182,4 +182,3 @@ SW4[7-8]: PCI/PCI-X frequency control
- -
SW4=0 PCI-X mode at 133 MHz allowed SW4=0 PCI-X mode at 133 MHz allowed
SW4=1 PCI-X mode limited to 100 MHz SW4=1 PCI-X mode limited to 100 MHz

31
drivers/tsi108_i2c.c
View File

@ -82,15 +82,10 @@ static int i2c_read_byte (
/* Wait until operation completed */ /* Wait until operation completed */
do { do {
/* Read I2C operation status */ /* Read I2C operation status */
temp = temp = *(u32 *) (CFG_TSI108_CSR_BASE + chan_offset + I2C_CNTRL2);
*(u32 *) (CFG_TSI108_CSR_BASE + chan_offset +
I2C_CNTRL2);
if (0 == if (0 == (temp & (I2C_CNTRL2_RD_STATUS | I2C_CNTRL2_START))) {
(temp & (I2C_CNTRL2_RD_STATUS | I2C_CNTRL2_START))) if (0 == (temp &
{
if (0 ==
(temp &
(I2C_CNTRL2_I2C_CFGERR | (I2C_CNTRL2_I2C_CFGERR |
I2C_CNTRL2_I2C_TO_ERR)) I2C_CNTRL2_I2C_TO_ERR))
) { ) {
@ -152,9 +147,7 @@ int i2c_read (uchar chip_addr, uint byte_addr, int alen,
/* Check for valid I2C address */ /* Check for valid I2C address */
if (chip_addr <= 0x7F && (byte_addr + len) <= (0x01 << (alen * 8))) { if (chip_addr <= 0x7F && (byte_addr + len) <= (0x01 << (alen * 8))) {
while (len--) { while (len--) {
op_status = op_status = i2c_read_byte(i2c_if, chip_addr, byte_addr++, buffer++);
i2c_read_byte(i2c_if, chip_addr, byte_addr++,
buffer++);
if (TSI108_I2C_SUCCESS != op_status) { if (TSI108_I2C_SUCCESS != op_status) {
DPRINT (("I2C read_byte() failed: 0x%02x (%d left)\n", op_status, len)); DPRINT (("I2C read_byte() failed: 0x%02x (%d left)\n", op_status, len));
@ -182,10 +175,7 @@ static int i2c_write_byte (uchar chip_addr,/* I2C device address on the bus */
/* Check if I2C operation is in progress */ /* Check if I2C operation is in progress */
temp = *(u32 *) (CFG_TSI108_CSR_BASE + TSI108_I2C_OFFSET + I2C_CNTRL2); temp = *(u32 *) (CFG_TSI108_CSR_BASE + TSI108_I2C_OFFSET + I2C_CNTRL2);
if (0 == if (0 == (temp & (I2C_CNTRL2_RD_STATUS | I2C_CNTRL2_WR_STATUS | I2C_CNTRL2_START))) {
(temp &
(I2C_CNTRL2_RD_STATUS | I2C_CNTRL2_WR_STATUS | I2C_CNTRL2_START)))
{
/* Place data into the I2C Tx Register */ /* Place data into the I2C Tx Register */
*(u32 *) (CFG_TSI108_CSR_BASE + TSI108_I2C_OFFSET + *(u32 *) (CFG_TSI108_CSR_BASE + TSI108_I2C_OFFSET +
I2C_TX_DATA) = (u32) * buffer; I2C_TX_DATA) = (u32) * buffer;
@ -209,15 +199,10 @@ static int i2c_write_byte (uchar chip_addr,/* I2C device address on the bus */
/* Wait until operation completed */ /* Wait until operation completed */
do { do {
/* Read I2C operation status */ /* Read I2C operation status */
temp = temp = *(u32 *) (CFG_TSI108_CSR_BASE + TSI108_I2C_OFFSET + I2C_CNTRL2);
*(u32 *) (CFG_TSI108_CSR_BASE + TSI108_I2C_OFFSET +
I2C_CNTRL2);
if (0 == if (0 == (temp & (I2C_CNTRL2_WR_STATUS | I2C_CNTRL2_START))) {
(temp & (I2C_CNTRL2_WR_STATUS | I2C_CNTRL2_START))) if (0 == (temp &
{
if (0 ==
(temp &
(I2C_CNTRL2_I2C_CFGERR | (I2C_CNTRL2_I2C_CFGERR |
I2C_CNTRL2_I2C_TO_ERR))) { I2C_CNTRL2_I2C_TO_ERR))) {
op_status = TSI108_I2C_SUCCESS; op_status = TSI108_I2C_SUCCESS;