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ppc/85xx: PIO Support for FSL eSDHC Controller Driver

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On some Freescale SoC Internal DMA of eSDHC controller has bug.
So PIO Mode has been introduced to do data transfer using CPU.

Signed-off-by: Dipen Dudhat <dipen.dudhat@freescale.com>
This commit is contained in:
Dipen Dudhat
2009-10-05 15:41:58 +05:30
committed by Andy Fleming
parent a47a12becf
commit 77c1458d13
2 changed files with 87 additions and 2 deletions
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2
include/fsl_esdhc.h
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@ -90,6 +90,7 @@
#define PRSSTAT_CDPL (0x00040000)
#define PRSSTAT_CINS (0x00010000)
#define PRSSTAT_BREN (0x00000800)
#define PRSSTAT_BWEN (0x00000400)
#define PRSSTAT_DLA (0x00000004)
#define PRSSTAT_CICHB (0x00000002)
#define PRSSTAT_CIDHB (0x00000001)
@ -121,6 +122,7 @@
#define XFERTYP_DMAEN 0x00000001
#define CINS_TIMEOUT 1000
#define PIO_TIMEOUT 100000
#define DSADDR 0x2e004