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arm: rmobile: Add SH QSPI base register address

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This adds base register address of SH QSPI.
Currently, SH QSPI is used only from R8A7790 and R8A7791.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
This commit is contained in:
Nobuhiro Iwamatsu
2014-01-08 10:14:26 +09:00
committed by Nobuhiro Iwamatsu
parent 16bf36f779
commit 82852762ce
2 changed files with 2 additions and 0 deletions
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1
arch/arm/include/asm/arch-rmobile/r8a7790.h
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@ -19,6 +19,7 @@
#define DBSC3_1_BASE 0xE67A0000 #define DBSC3_1_BASE 0xE67A0000
#define TMU_BASE 0xE61E0000 #define TMU_BASE 0xE61E0000
#define GPIO5_BASE 0xE6055000 #define GPIO5_BASE 0xE6055000
#define SH_QSPI_BASE 0xE6B10000
#define S3C_BASE 0xE6784000 #define S3C_BASE 0xE6784000
#define S3C_INT_BASE 0xE6784A00 #define S3C_INT_BASE 0xE6784A00

1
arch/arm/include/asm/arch-rmobile/r8a7791.h
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@ -19,6 +19,7 @@
#define DBSC3_1_BASE 0xE67A0000 #define DBSC3_1_BASE 0xE67A0000
#define TMU_BASE 0xE61E0000 #define TMU_BASE 0xE61E0000
#define GPIO5_BASE 0xE6055000 #define GPIO5_BASE 0xE6055000
#define SH_QSPI_BASE 0xE6B10000
#define S3C_BASE 0xE6784000 #define S3C_BASE 0xE6784000
#define S3C_INT_BASE 0xE6784A00 #define S3C_INT_BASE 0xE6784A00