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powerpc/85xx: add support for FM2 DTSEC5

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Unlike previous SOCs, the Freescale P5040 has a fifth DTSEC on the second
Fman, so add the Fman and SerDes macros for that DTSEC.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
This commit is contained in:
Timur Tabi
2012-08-14 06:47:21 +00:00
committed by Andy Fleming
parent a2af6a7a84
commit 99abf7ded3
5 changed files with 12 additions and 0 deletions
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6
arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c
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@ -68,6 +68,7 @@ static const char *serdes_prtcl_str[] = {
[SGMII_FM2_DTSEC2] = "SGMII_FM2_DTSEC2",
[SGMII_FM2_DTSEC3] = "SGMII_FM2_DTSEC3",
[SGMII_FM2_DTSEC4] = "SGMII_FM2_DTSEC4",
[SGMII_FM2_DTSEC5] = "SGMII_FM2_DTSEC5",
[XAUI_FM1] = "XAUI_FM1",
[XAUI_FM2] = "XAUI_FM2",
[AURORA] = "DEBUG",
@ -658,6 +659,7 @@ void fsl_serdes_init(void)
case SGMII_FM2_DTSEC2:
case SGMII_FM2_DTSEC3:
case SGMII_FM2_DTSEC4:
case SGMII_FM2_DTSEC5:
case XAUI_FM1:
case XAUI_FM2:
case SRIO1:
@ -717,6 +719,10 @@ void fsl_serdes_init(void)
serdes8_devdisr2 |= FSL_CORENET_DEVDISR2_FM2 |
FSL_CORENET_DEVDISR2_DTSEC2_4;
break;
case SGMII_FM2_DTSEC5:
serdes8_devdisr2 |= FSL_CORENET_DEVDISR2_FM2 |
FSL_CORENET_DEVDISR2_DTSEC2_5;
break;
case XAUI_FM1:
serdes8_devdisr2 |= FSL_CORENET_DEVDISR2_FM1 |
FSL_CORENET_DEVDISR2_10GEC1;