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siemens,am33x: remove ddr3 delay workaround

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Signed-off-by: Samuel Egli <samuel.egli@siemens.com>
Cc: Roger Meier <r.meier@siemens.com>
Cc: Heiko Schocher <hs@denx.de>
This commit is contained in:
Egli, Samuel
2015-12-02 15:27:57 +01:00
committed by Tom Rini
parent 69b918b65d
commit 9d5108d8be
1 changed files with 0 additions and 5 deletions
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5
board/siemens/draco/board.c
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@ -196,11 +196,6 @@ struct ctrl_ioregs draco_ddr3_ioregs = {
config_ddr(DDR_PLL_FREQ, &draco_ddr3_ioregs, &draco_ddr3_data, config_ddr(DDR_PLL_FREQ, &draco_ddr3_ioregs, &draco_ddr3_data,
&draco_ddr3_cmd_ctrl_data, &draco_ddr3_emif_reg_data, 0); &draco_ddr3_cmd_ctrl_data, &draco_ddr3_emif_reg_data, 0);
/* For Samsung 2Gbit RAM we need this delay otherwise config fails after
* soft reset.
*/
udelay(2000);
} }
static void spl_siemens_board_init(void) static void spl_siemens_board_init(void)