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https://github.com/linux-sunxi/u-boot-sunxi.git
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kbuild: change out-of-tree build
This commit changes the working directory where the build process occurs. Before this commit, build process occurred under the source tree for both in-tree and out-of-tree build. That's why we needed to add $(obj) prefix to all generated files in makefiles like follows: $(obj)u-boot.bin: $(obj)u-boot Here, $(obj) is empty for in-tree build, whereas it points to the output directory for out-of-tree build. And our old build system changes the current working directory with "make -C <sub-dir>" syntax when descending into the sub-directories. On the other hand, Kbuild uses a different idea to handle out-of-tree build and directory descending. The build process of Kbuild always occurs under the output tree. When "O=dir/to/store/output/files" is given, the build system changes the current working directory to that directory and restarts the make. Kbuild uses "make -f $(srctree)/scripts/Makefile.build obj=<sub-dir>" syntax for descending into sub-directories. (We can write it like "make $(obj)=<sub-dir>" with a shorthand.) This means the current working directory is always the top of the output directory. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Tested-by: Gerhard Sittig <gsi@denx.de>
This commit is contained in:
Masahiro Yamada
committed by
Tom Rini
Tom Rini
parent
d958002589
commit
9e4140329e
@ -165,9 +165,7 @@ ar-option = $(call try-run, $(AR) rc$(1) "$$TMP",$(1),$(2))
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# Shorthand for $(Q)$(MAKE) -f scripts/Makefile.build obj=
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# Usage:
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# $(Q)$(MAKE) $(build)=dir
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#build := -f $(if $(KBUILD_SRC),$(srctree)/)scripts/Makefile.build obj
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# temporary
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build := -f $(srctree)/scripts/Makefile.build -C
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build := -f $(if $(KBUILD_SRC),$(srctree)/)scripts/Makefile.build obj
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###
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# Shorthand for $(Q)$(MAKE) -f scripts/Makefile.modbuiltin obj=
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@ -2,17 +2,28 @@
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.PHONY: all
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all:
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ifeq ($(CONFIG_TPL_BUILD),y)
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src := $(patsubst tpl/%,%,$(obj))
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else
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ifeq ($(CONFIG_SPL_BUILD),y)
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src := $(patsubst spl/%,%,$(obj))
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else
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src := $(obj)
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endif
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endif
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include $(srctree)/scripts/Kbuild.include
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include $(TOPDIR)/config.mk
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include $(srctree)/config.mk
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# variable LIB is used in examples/standalone/Makefile
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__LIB := $(obj)built-in.o
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LIBGCC = $(obj)libgcc.o
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__LIB := $(obj)/built-in.o
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LIBGCC = $(obj)/libgcc.o
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SRCS :=
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subdir-y :=
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obj-dirs :=
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include Makefile
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kbuild-dir := $(if $(filter /%,$(src)),$(src),$(srctree)/$(src))
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include $(kbuild-dir)/Makefile
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# Do not include host rules unless needed
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ifneq ($(hostprogs-y)$(hostprogs-m),)
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@ -28,31 +39,37 @@ lib-y := $(sort $(lib-y))
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subdir-y += $(patsubst %/,%,$(filter %/, $(obj-y)))
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obj-y := $(patsubst %/, %/built-in.o, $(obj-y))
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subdir-obj-y := $(filter %/built-in.o, $(obj-y))
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subdir-obj-y := $(addprefix $(obj),$(subdir-obj-y))
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subdir-obj-y := $(addprefix $(obj)/,$(subdir-obj-y))
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SRCS += $(wildcard $(obj-y:.o=.c) $(obj-y:.o=.S) $(lib-y:.o=.c) \
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$(lib-y:.o=.S) $(extra-y:.o=.c) $(extra-y:.o=.S))
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OBJS := $(addprefix $(obj),$(obj-y))
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SRCS += $(obj-y:.o=.c) $(obj-y:.o=.S) $(lib-y:.o=.c) \
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$(lib-y:.o=.S) $(extra-y:.o=.c) $(extra-y:.o=.S)
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SRCS := $(addprefix $(if $(KBUILD_SRC),$(srctree)/$(src)/,$(src)/),$(SRCS))
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SRCS := $(wildcard $(SRCS))
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OBJS := $(addprefix $(obj)/,$(obj-y))
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# $(obj-dirs) is a list of directories that contain object files
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obj-dirs += $(dir $(OBJS))
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_dummy := $(shell [ -d $(obj) ] || mkdir -p $(obj))
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# Create directories for object files if directory does not exist
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# Needed when obj-y := dir/file.o syntax is used
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_dummy := $(foreach d,$(obj-dirs), $(shell [ -d $(d) ] || mkdir -p $(d)))
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LGOBJS := $(addprefix $(obj),$(sort $(lib-y)))
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LGOBJS := $(addprefix $(obj)/,$(sort $(lib-y)))
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all: $(__LIB) $(addprefix $(obj),$(extra-y) $(always)) $(subdir-y)
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all: $(__LIB) $(addprefix $(obj)/,$(extra-y) $(always)) $(subdir-y)
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$(__LIB): $(obj).depend $(OBJS)
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$(__LIB): $(obj)/.depend $(OBJS)
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$(call cmd_link_o_target, $(OBJS))
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ifneq ($(strip $(lib-y)),)
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all: $(LIBGCC)
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$(LIBGCC): $(obj).depend $(LGOBJS)
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$(LIBGCC): $(obj)/.depend $(LGOBJS)
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$(call cmd_link_o_target, $(LGOBJS))
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endif
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@ -63,7 +80,7 @@ endif
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ifneq ($(subdir-y),)
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$(subdir-y): FORCE
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$(MAKE) -C $@ -f $(TOPDIR)/scripts/Makefile.build
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$(MAKE) $(build)=$(obj)/$@
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endif
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#########################################################################
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@ -78,18 +95,18 @@ ALL_CFLAGS += $(EXTRA_CPPFLAGS)
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# See rules.mk
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EXTRA_CPPFLAGS_DEP = $(CPPFLAGS_$(BCURDIR)/$(addsuffix .o,$(basename $<))) \
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$(CPPFLAGS_$(BCURDIR))
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$(obj)%.s: %.S
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$(obj)/%.s: $(src)/%.S
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$(CPP) $(ALL_AFLAGS) -o $@ $<
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$(obj)%.o: %.S
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$(obj)/%.o: $(src)/%.S
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$(CC) $(ALL_AFLAGS) -o $@ $< -c
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$(obj)%.o: %.c
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$(obj)/%.o: $(src)/%.c
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ifneq ($(CHECKSRC),0)
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$(CHECK) $(CHECKFLAGS) $(ALL_CFLAGS) $<
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endif
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$(CC) $(ALL_CFLAGS) -o $@ $< -c
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$(obj)%.i: %.c
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$(obj)/%.i: $(src)/%.c
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$(CPP) $(ALL_CFLAGS) -o $@ $< -c
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$(obj)%.s: %.c
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$(obj)/%.s: $(src)/%.c
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$(CC) $(ALL_CFLAGS) -o $@ $< -c -S
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# If the list of objects to link is empty, just create an empty built-in.o
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@ -99,11 +116,11 @@ cmd_link_o_target = $(if $(strip $1),\
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#########################################################################
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# defines $(obj).depend target
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# defines $(obj)/.depend target
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include $(TOPDIR)/rules.mk
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sinclude $(obj).depend
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sinclude $(obj)/.depend
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#########################################################################
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@ -21,11 +21,11 @@ host-objdirs += $(foreach f,$(host-cmulti), \
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host-objdirs := $(strip $(sort $(filter-out ./,$(host-objdirs))))
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__hostprogs := $(addprefix $(obj),$(__hostprogs))
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host-csingle := $(addprefix $(obj),$(host-csingle))
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host-cmulti := $(addprefix $(obj),$(host-cmulti))
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host-cobjs := $(addprefix $(obj),$(host-cobjs))
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host-objdirs := $(addprefix $(obj),$(host-objdirs))
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__hostprogs := $(addprefix $(obj)/,$(__hostprogs))
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host-csingle := $(addprefix $(obj)/,$(host-csingle))
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host-cmulti := $(addprefix $(obj)/,$(host-cmulti))
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host-cobjs := $(addprefix $(obj)/,$(host-cobjs))
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host-objdirs := $(addprefix $(obj)/,$(host-objdirs))
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obj-dirs += $(host-objdirs)
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@ -49,13 +49,13 @@ hostc_flags = $(__hostc_flags)
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#####
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# Compile programs on the host
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$(host-csingle): $(obj)%: %.c
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$(host-csingle): $(obj)/%: $(src)/%.c
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$(HOSTCC) $(HOSTCFLAGS) $(HOST_EXTRACFLAGS) $(HOSTLDFLAGS) $(HOSTCFLAGS_$(@F)) $(HOSTCFLAGS_$(BCURDIR)) -o $@ $<
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$(host-cmulti): $(obj)%: $(host-cobjs)
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$(HOSTCC) $(HOSTLDFLAGS) -o $@ $(addprefix $(obj),$($(@F)-objs)) $(HOSTLOADLIBES_$(@F))
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$(host-cmulti): $(obj)/%: $(host-cobjs)
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$(HOSTCC) $(HOSTLDFLAGS) -o $@ $(addprefix $(obj)/,$($(@F)-objs)) $(HOSTLOADLIBES_$(@F))
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$(host-cobjs): $(obj)%.o: %.c
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$(host-cobjs): $(obj)/%.o: $(src)/%.c
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$(HOSTCC) $(HOSTCFLAGS) $(HOST_EXTRACFLAGS) $(HOSTCFLAGS_$(@F)) $(HOSTCFLAGS_$(BCURDIR)) -o $@ $< -c
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targets += $(host-csingle) $(host-cmulti) $(host-cobjs)
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