Paul Burton b2b135d980 MIPS: Map CM Global Control Registers ...

Map the Global Control Registers (GCRs) provided by the MIPS Coherence
Manager (CM) in preparation for using some of them in later patches.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>

2016-09-21 15:04:04 +02:00

..

mips32

MIPS: unify CPU code in arch/mips/cpu/

2015-01-30 14:19:58 +01:00

mips64

MIPS: unify CPU code in arch/mips/cpu/

2015-01-30 14:19:58 +01:00

cm_init.S

MIPS: Map CM Global Control Registers

2016-09-21 15:04:04 +02:00

cpu.c

MIPS: Probe cache line sizes once during boot

2016-09-21 15:04:04 +02:00

interrupts.c

MIPS: unify CPU code in arch/mips/cpu/

2015-01-30 14:19:58 +01:00

Makefile

MIPS: Map CM Global Control Registers

2016-09-21 15:04:04 +02:00

start.S

MIPS: Map CM Global Control Registers

2016-09-21 15:04:04 +02:00

time.c

MIPS: unify CPU code in arch/mips/cpu/

2015-01-30 14:19:58 +01:00

u-boot-spl.lds

MIPS: provide a default u-boot-spl.lds

2016-05-31 09:38:11 +02:00

u-boot.lds

MIPS: add .padding section to linker script

2014-11-01 18:18:05 +01:00