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fcbcd59730
Currently, IECTRL is enabled after pin-mux settings for the low-level debugging for PH1-LD4 and PH1-sLD8. While IECTRL is disabled, input signals are pulled-down, i.e. glitch signal (Low to High transition) problem occurs if pin-mux is set up first. As a result, one invalid character is input to the UART block and the auto-boot counting is terminated immediately. The correct initialization procedure is: [1] Enable IECTRL (if IECTRL exists for the pins) [2] Set up pin-muxing [3] Deassert the reset of the hardware block Currently, the low-level debugging is working for PH1-sLD3 and PH1-Pro4, but just in case, follow the sequence for all the SoCs. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
30 lines
585 B
ArmAsm
30 lines
585 B
ArmAsm
/*
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* On-chip UART initializaion for low-level debugging
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*
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* Copyright (C) 2014 Panasonic Corporation
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* Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <linux/linkage.h>
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#include <mach/sg-regs.h>
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#define UART_CLK 36864000
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#include <mach/debug-uart.S>
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ENTRY(setup_lowlevel_debug)
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ldr r0, =SG_IECTRL
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ldr r1, [r0]
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orr r1, r1, #1
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str r1, [r0]
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/* UART Port 0 */
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sg_set_pinsel 85, 1, 8, 4, r0, r1
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sg_set_pinsel 88, 1, 8, 4, r0, r1
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init_debug_uart r0, r1, r2
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mov pc, lr
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ENDPROC(setup_lowlevel_debug)
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