EDK2/edk2-rk3588
1
0
Fork 0
mirror of https://github.com/edk2-porting/edk2-rk3588.git synced 2025-12-18 11:39:51 +08:00
Code Issues Packages Projects Releases Wiki Activity

Add initial support for Fydetab Duo

Browse Source 
The DSI panel is not yet working.

Signed-off-by: Mario Bălănică <mariobalanica02@gmail.com>
This commit is contained in:
Mario Bălănică
2024-07-09 04:11:17 +03:00
parent c02b333c22
commit f8768a8a02
16 changed files with 786 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

1
.github/workflows/build.yml vendored
View File

@@ -29,6 +29,7 @@ jobs:
- orangepi-5
- orangepi-5plus
- indiedroid-nova
- fydetab-duo
- roc-rk3588s-pc
- itx-3588j
- aio-3588q

1
README.md
View File

@@ -8,6 +8,7 @@ This repository contains an UEFI firmware implementation based on EDK2 for vario
- [Orange Pi 5](http://www.orangepi.org/html/hardWare/computerAndMicrocontrollers/details/Orange-Pi-5.html)
- [Orange Pi 5 Plus](http://www.orangepi.org/html/hardWare/computerAndMicrocontrollers/details/Orange-Pi-5-plus.html)
- [ameriDroid Indiedroid Nova](https://indiedroid.us)
- [Fydetab Duo](https://fydetabduo.com/)
- [Firefly AIO-3588Q](https://en.t-firefly.com/product/industry/aio3588q)
- [Firefly ITX-3588J](https://en.t-firefly.com/product/industry/itx3588j)
- [Firefly ROC-RK3588S-PC](https://en.t-firefly.com/product/industry/rocrk3588spc)

3
configs/fydetab-duo.conf Normal file
View File

@@ -0,0 +1,3 @@
DSC_FILE=edk2-rockchip/Platform/FydeInnovations/FydetabDuo/FydetabDuo.dsc
PLATFORM_NAME=FydetabDuo
SOC=RK3588

57
edk2-rockchip/Platform/FydeInnovations/FydetabDuo/AcpiTables/AcpiTables.inf Normal file
View File

@@ -0,0 +1,57 @@
#/** @file
#
# ACPI table data and ASL sources required to boot the platform.
#
# Copyright (c) 2019-2021, ARM Limited. All rights reserved.
# Copyright (c) Microsoft Corporation. All rights reserved.
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
#**/
[Defines]
INF_VERSION = 0x0001001A
BASE_NAME = AcpiTables
FILE_GUID = 7E374E25-8E01-4FEE-87F2-390C23C606CD
MODULE_TYPE = USER_DEFINED
VERSION_STRING = 1.0
RK_COMMON_ACPI_DIR = Silicon/Rockchip/RK3588/AcpiTables
#
# The following information is for reference only and not required by the build tools.
#
# VALID_ARCHITECTURES = AARCH64
#
[Sources]
Dsdt.asl
$(RK_COMMON_ACPI_DIR)/Madt.aslc
$(RK_COMMON_ACPI_DIR)/Fadt.aslc
$(RK_COMMON_ACPI_DIR)/Gtdt.aslc
$(RK_COMMON_ACPI_DIR)/Spcr.aslc
$(RK_COMMON_ACPI_DIR)/Mcfg.aslc
$(RK_COMMON_ACPI_DIR)/Dbg2.aslc
$(RK_COMMON_ACPI_DIR)/Pptt.aslc
[Packages]
ArmPkg/ArmPkg.dec
ArmPlatformPkg/ArmPlatformPkg.dec
EmbeddedPkg/EmbeddedPkg.dec
MdeModulePkg/MdeModulePkg.dec
MdePkg/MdePkg.dec
Silicon/Rockchip/RockchipPkg.dec
Silicon/Rockchip/RK3588/RK3588.dec
[FixedPcd]
gArmTokenSpaceGuid.PcdArmArchTimerIntrNum
gArmTokenSpaceGuid.PcdArmArchTimerHypIntrNum
gArmTokenSpaceGuid.PcdArmArchTimerSecIntrNum
gArmTokenSpaceGuid.PcdArmArchTimerVirtIntrNum
gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase
gArmTokenSpaceGuid.PcdGicDistributorBase
gArmTokenSpaceGuid.PcdGicRedistributorsBase
gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase
gRK3588TokenSpaceGuid.PcdI2S0Supported
gRK3588TokenSpaceGuid.PcdI2S1Supported
gRockchipTokenSpaceGuid.PcdRkMtlMailBoxBase
gRockchipTokenSpaceGuid.PcdRkMtlMailBoxSize

52
edk2-rockchip/Platform/FydeInnovations/FydetabDuo/AcpiTables/Dsdt.asl Normal file
View File

@@ -0,0 +1,52 @@
/** @file
*
* Differentiated System Definition Table (DSDT)
*
* Copyright (c) 2020, Pete Batard <pete@akeo.ie>
* Copyright (c) 2018-2020, Andrey Warkentin <andrey.warkentin@gmail.com>
* Copyright (c) Microsoft Corporation. All rights reserved.
* Copyright (c) 2021, ARM Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-2-Clause-Patent
*
**/
#include "AcpiTables.h"
#define BOARD_I2S0_TPLG "i2s-jack"
#define BOARD_AUDIO_CODEC_HID "ESSX8388"
#define BOARD_CODEC_I2C "\\_SB.I2C7"
#define BOARD_CODEC_I2C_ADDR 0x11
#define BOARD_CODEC_GPIO "\\_SB.GPI1"
#define BOARD_CODEC_GPIO_PIN GPIO_PIN_PC0
DefinitionBlock ("Dsdt.aml", "DSDT", 2, "RKCP ", "RK3588 ", 2)
{
Scope (\_SB_)
{
include ("DsdtCommon.asl")
include ("Cpu.asl")
include ("Pcie.asl")
include ("Sata.asl")
include ("Emmc.asl")
include ("Sdhc.asl")
include ("Dma.asl")
include ("Gpio.asl")
include ("I2c.asl")
include ("Uart.asl")
include ("I2s.asl")
include ("Usb2Host.asl")
include ("Usb3Host0.asl")
include ("Usb3Host2.asl")
Scope (I2C7) {
include ("Es8388.asl")
}
}
}

BIN
edk2-rockchip/Platform/FydeInnovations/FydetabDuo/Drivers/LogoDxe/Logo.bmp Normal file
View File

Binary file not shown.
Side by Side

After

Width:  |  Height:  |  Size: 116 KiB

144
edk2-rockchip/Platform/FydeInnovations/FydetabDuo/Drivers/LogoDxe/Logo.c Normal file
View File

@@ -0,0 +1,144 @@
/** @file
Logo DXE Driver, install Edkii Platform Logo protocol.
Copyright (c) 2016 - 2017, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2018, Linaro, Ltd. All rights reserved.<BR>
Copyright (c) 2022 Rockchip Electronics Co. Ltd.
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#include <Uefi.h>
#include <Protocol/HiiDatabase.h>
#include <Protocol/GraphicsOutput.h>
#include <Protocol/HiiImageEx.h>
#include <Protocol/PlatformLogo.h>
#include <Protocol/HiiPackageList.h>
#include <Library/UefiBootServicesTableLib.h>
#include <Library/DebugLib.h>
typedef struct {
EFI_IMAGE_ID ImageId;
EDKII_PLATFORM_LOGO_DISPLAY_ATTRIBUTE Attribute;
INTN OffsetX;
INTN OffsetY;
} LOGO_ENTRY;
STATIC EFI_HII_IMAGE_EX_PROTOCOL *mHiiImageEx;
STATIC EFI_HII_HANDLE mHiiHandle;
STATIC LOGO_ENTRY mLogos[] = {
{
IMAGE_TOKEN (IMG_LOGO),
EdkiiPlatformLogoDisplayAttributeCenter,
0,
0
}
};
/**
Load a platform logo image and return its data and attributes.
@param This The pointer to this protocol instance.
@param Instance The visible image instance is found.
@param Image Points to the image.
@param Attribute The display attributes of the image returned.
@param OffsetX The X offset of the image regarding the Attribute.
@param OffsetY The Y offset of the image regarding the Attribute.
@retval EFI_SUCCESS The image was fetched successfully.
@retval EFI_NOT_FOUND The specified image could not be found.
**/
STATIC
EFI_STATUS
EFIAPI
GetImage (
IN EDKII_PLATFORM_LOGO_PROTOCOL *This,
IN OUT UINT32 *Instance,
OUT EFI_IMAGE_INPUT *Image,
OUT EDKII_PLATFORM_LOGO_DISPLAY_ATTRIBUTE *Attribute,
OUT INTN *OffsetX,
OUT INTN *OffsetY
)
{
UINT32 Current;
if (Instance == NULL || Image == NULL ||
Attribute == NULL || OffsetX == NULL || OffsetY == NULL) {
return EFI_INVALID_PARAMETER;
}
Current = *Instance;
if (Current >= ARRAY_SIZE (mLogos)) {
return EFI_NOT_FOUND;
}
(*Instance)++;
*Attribute = mLogos[Current].Attribute;
*OffsetX = mLogos[Current].OffsetX;
*OffsetY = mLogos[Current].OffsetY;
return mHiiImageEx->GetImageEx (mHiiImageEx, mHiiHandle,
mLogos[Current].ImageId, Image);
}
STATIC EDKII_PLATFORM_LOGO_PROTOCOL mPlatformLogo = {
GetImage
};
/**
Entrypoint of this module.
This function is the entrypoint of this module. It installs the Edkii
Platform Logo protocol.
@param ImageHandle The firmware allocated handle for the EFI image.
@param SystemTable A pointer to the EFI System Table.
@retval EFI_SUCCESS The entry point is executed successfully.
**/
EFI_STATUS
EFIAPI
InitializeLogo (
IN EFI_HANDLE ImageHandle,
IN EFI_SYSTEM_TABLE *SystemTable
)
{
EFI_STATUS Status;
EFI_HII_PACKAGE_LIST_HEADER *PackageList;
EFI_HII_DATABASE_PROTOCOL *HiiDatabase;
EFI_HANDLE Handle;
Status = gBS->LocateProtocol (&gEfiHiiDatabaseProtocolGuid, NULL,
(VOID **) &HiiDatabase);
ASSERT_EFI_ERROR (Status);
Status = gBS->LocateProtocol (&gEfiHiiImageExProtocolGuid, NULL,
(VOID **) &mHiiImageEx);
ASSERT_EFI_ERROR (Status);
//
// Retrieve HII package list from ImageHandle
//
Status = gBS->OpenProtocol (ImageHandle, &gEfiHiiPackageListProtocolGuid,
(VOID **) &PackageList, ImageHandle, NULL,
EFI_OPEN_PROTOCOL_GET_PROTOCOL);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR,
"HII Image Package with logo not found in PE/COFF resource section\n"));
return Status;
}
//
// Publish HII package list to HII Database.
//
Status = HiiDatabase->NewPackageList (HiiDatabase, PackageList, NULL,
&mHiiHandle);
if (!EFI_ERROR (Status)) {
Handle = NULL;
Status = gBS->InstallMultipleProtocolInterfaces (&Handle,
&gEdkiiPlatformLogoProtocolGuid, &mPlatformLogo, NULL);
}
return Status;
}

10
edk2-rockchip/Platform/FydeInnovations/FydetabDuo/Drivers/LogoDxe/Logo.idf Normal file
View File

@@ -0,0 +1,10 @@
// @file
// Platform Logo image definition file.
//
// Copyright (c) 2018, Linaro, Ltd. All rights reserved.<BR>
// Copyright (c) 2022 Rockchip Electronics Co. Ltd.
//
// SPDX-License-Identifier: BSD-2-Clause-Patent
//
#image IMG_LOGO Logo.bmp

48
edk2-rockchip/Platform/FydeInnovations/FydetabDuo/Drivers/LogoDxe/LogoDxe.inf Normal file
View File

@@ -0,0 +1,48 @@
## @file
# The default logo bitmap picture shown on setup screen.
#
# Copyright (c) 2016 - 2017, Intel Corporation. All rights reserved.<BR>
# Copyright (c) 2018, Linaro, Ltd. All rights reserved.<BR>
# Copyright (c) 2022 Rockchip Electronics Co. Ltd.
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
#
##
[Defines]
INF_VERSION = 0x0001001A
BASE_NAME = LogoDxe
FILE_GUID = 4b55f0bc-8b1a-11ec-bd4b-f42a7dcb925d
MODULE_TYPE = DXE_DRIVER
VERSION_STRING = 1.0
ENTRY_POINT = InitializeLogo
#
# This flag specifies whether HII resource section is generated into PE image.
#
UEFI_HII_RESOURCE_SECTION = TRUE
[Sources]
Logo.bmp
Logo.c
Logo.idf
[Packages]
MdeModulePkg/MdeModulePkg.dec
MdePkg/MdePkg.dec
[LibraryClasses]
UefiBootServicesTableLib
UefiDriverEntryPoint
DebugLib
[Protocols]
gEfiHiiDatabaseProtocolGuid ## CONSUMES
gEfiHiiImageExProtocolGuid ## CONSUMES
gEfiHiiPackageListProtocolGuid ## PRODUCES CONSUMES
gEdkiiPlatformLogoProtocolGuid ## PRODUCES
[Depex]
gEfiHiiDatabaseProtocolGuid AND
gEfiHiiImageExProtocolGuid

18
edk2-rockchip/Platform/FydeInnovations/FydetabDuo/FydetabDuo.Modules.fdf.inc Normal file
View File

@@ -0,0 +1,18 @@
## @file
#
# Copyright (c) 2023-2024, Mario Bălănică <mariobalanica02@gmail.com>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
##
# ACPI Support
INF RuleOverride = ACPITABLE $(PLATFORM_DIRECTORY)/AcpiTables/AcpiTables.inf
# TODO: Device Tree Support
# FILE FREEFORM = gDtPlatformDefaultDtbFileGuid {
# SECTION RAW = Platform/Rockchip/DeviceTree/rk3588s-9tripod-linux.dtb
# }
# Splash screen logo
INF $(PLATFORM_DIRECTORY)/Drivers/LogoDxe/LogoDxe.inf

113
edk2-rockchip/Platform/FydeInnovations/FydetabDuo/FydetabDuo.dsc Normal file
View File

@@ -0,0 +1,113 @@
## @file
#
# Copyright (c) 2014-2018, Linaro Limited. All rights reserved.
# Copyright (c) 2023-2024, Mario Bălănică <mariobalanica02@gmail.com>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
##
################################################################################
#
# Defines Section - statements that will be processed to create a Makefile.
#
################################################################################
[Defines]
PLATFORM_NAME = FydetabDuo
PLATFORM_VENDOR = FydeInnovations
PLATFORM_GUID = de3232fb-1716-4f63-a8fe-67a623ae5297
PLATFORM_VERSION = 0.2
DSC_SPECIFICATION = 0x00010019
OUTPUT_DIRECTORY = Build/$(PLATFORM_NAME)
VENDOR_DIRECTORY = Platform/$(PLATFORM_VENDOR)
PLATFORM_DIRECTORY = $(VENDOR_DIRECTORY)/$(PLATFORM_NAME)
SUPPORTED_ARCHITECTURES = AARCH64
BUILD_TARGETS = DEBUG|RELEASE
SKUID_IDENTIFIER = DEFAULT
FLASH_DEFINITION = Silicon/Rockchip/RK3588/RK3588.fdf
RK_PLATFORM_FVMAIN_MODULES = $(PLATFORM_DIRECTORY)/$(PLATFORM_NAME).Modules.fdf.inc
#
# HYM8563 RTC support
# I2C location configured by PCDs below.
#
DEFINE RK_RTC8563_ENABLE = TRUE
# No HDMI output on this platform
DEFINE RK_DW_HDMI_QP_ENABLE = FALSE
#
# RK3588S-based platform
#
!include Silicon/Rockchip/RK3588/RK3588SPlatform.dsc.inc
################################################################################
#
# Library Class section - list of all Library Classes needed by this Platform.
#
################################################################################
[LibraryClasses.common]
RockchipPlatformLib|$(PLATFORM_DIRECTORY)/Library/RockchipPlatformLib/RockchipPlatformLib.inf
################################################################################
#
# Pcd Section - list of all EDK II PCD Entries defined by this Platform.
#
################################################################################
[PcdsFixedAtBuild.common]
# SMBIOS platform config
gRockchipTokenSpaceGuid.PcdPlatformName|"Fydetab Duo"
gRockchipTokenSpaceGuid.PcdPlatformVendorName|"Fyde Innovations"
gRockchipTokenSpaceGuid.PcdFamilyName|"Fydetab"
gRockchipTokenSpaceGuid.PcdProductUrl|"https://fydetabduo.com/"
gRockchipTokenSpaceGuid.PcdDeviceTreeName|"rk3588s-12c"
# I2C
gRockchipTokenSpaceGuid.PcdI2cSlaveAddresses|{ 0x42, 0x43, 0x50, 0x51, 0x11 }
gRockchipTokenSpaceGuid.PcdI2cSlaveBuses|{ 0x0, 0x0, 0x6, 0x6, 0x7 }
gRockchipTokenSpaceGuid.PcdI2cSlaveBusesRuntimeSupport|{ FALSE, FALSE, FALSE, TRUE, FALSE }
gRockchipTokenSpaceGuid.PcdRk860xRegulatorAddresses|{ 0x42, 0x43 }
gRockchipTokenSpaceGuid.PcdRk860xRegulatorBuses|{ 0x0, 0x0 }
gRockchipTokenSpaceGuid.PcdRk860xRegulatorTags|{ $(SCMI_CLK_CPUB01), $(SCMI_CLK_CPUB23) }
gPcf8563RealTimeClockLibTokenSpaceGuid.PcdI2cSlaveAddress|0x51
gRockchipTokenSpaceGuid.PcdRtc8563Bus|0x6
#
# CPU Performance default values
#
gRK3588TokenSpaceGuid.PcdCPULClusterClockPresetDefault|$(CPU_PERF_CLUSTER_CLOCK_PRESET_MAX)
gRK3588TokenSpaceGuid.PcdCPUB01ClusterClockPresetDefault|$(CPU_PERF_CLUSTER_CLOCK_PRESET_MAX)
gRK3588TokenSpaceGuid.PcdCPUB23ClusterClockPresetDefault|$(CPU_PERF_CLUSTER_CLOCK_PRESET_MAX)
#
# PCIe/SATA/USB Combo PIPE PHY support flags and default values
#
gRK3588TokenSpaceGuid.PcdComboPhy0ModeDefault|$(COMBO_PHY_MODE_PCIE)
#
# USB/DP Combo PHY support flags and default values
#
gRK3588TokenSpaceGuid.PcdUsbDpPhy0Supported|TRUE
gRK3588TokenSpaceGuid.PcdDp0LaneMux|{ 0x2, 0x3 }
#
# I2S
#
gRK3588TokenSpaceGuid.PcdI2S0Supported|TRUE
# SD card detect signal is inverted
gRockchipTokenSpaceGuid.PcdRkSdmmcCardDetectInverted|TRUE
################################################################################
#
# Components Section - list of all EDK II Modules needed by this Platform.
#
################################################################################
[Components.common]
# ACPI Support
$(PLATFORM_DIRECTORY)/AcpiTables/AcpiTables.inf
# Splash screen logo
$(PLATFORM_DIRECTORY)/Drivers/LogoDxe/LogoDxe.inf

297
edk2-rockchip/Platform/FydeInnovations/FydetabDuo/Library/RockchipPlatformLib/RockchipPlatformLib.c Normal file
View File

@@ -0,0 +1,297 @@
/** @file
*
* Copyright (c) 2021, Rockchip Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-2-Clause-Patent
*
**/
#include <Base.h>
#include <Library/DebugLib.h>
#include <Library/IoLib.h>
#include <Library/GpioLib.h>
#include <Library/RK806.h>
#include <Library/Rk3588Pcie.h>
#include <Library/PWMLib.h>
#include <Soc.h>
static struct regulator_init_data rk806_init_data[] = {
/* Master PMIC */
RK8XX_VOLTAGE_INIT(MASTER_BUCK1, 750000),
RK8XX_VOLTAGE_INIT(MASTER_BUCK3, 750000),
RK8XX_VOLTAGE_INIT(MASTER_BUCK4, 750000),
RK8XX_VOLTAGE_INIT(MASTER_BUCK5, 850000),
// RK8XX_VOLTAGE_INIT(MASTER_BUCK6, 750000),
RK8XX_VOLTAGE_INIT(MASTER_BUCK7, 2000000),
RK8XX_VOLTAGE_INIT(MASTER_BUCK8, 3300000),
RK8XX_VOLTAGE_INIT(MASTER_BUCK10, 1800000),
RK8XX_VOLTAGE_INIT(MASTER_NLDO1, 750000),
RK8XX_VOLTAGE_INIT(MASTER_NLDO2, 850000),
RK8XX_VOLTAGE_INIT(MASTER_NLDO3, 750000),
RK8XX_VOLTAGE_INIT(MASTER_NLDO4, 850000),
RK8XX_VOLTAGE_INIT(MASTER_NLDO5, 750000),
RK8XX_VOLTAGE_INIT(MASTER_PLDO1, 1800000),
RK8XX_VOLTAGE_INIT(MASTER_PLDO2, 1800000),
RK8XX_VOLTAGE_INIT(MASTER_PLDO3, 1200000),
RK8XX_VOLTAGE_INIT(MASTER_PLDO4, 3300000),
RK8XX_VOLTAGE_INIT(MASTER_PLDO5, 3300000),
RK8XX_VOLTAGE_INIT(MASTER_PLDO6, 1800000),
/* No dual PMICs on this platform */
};
VOID
EFIAPI
SdmmcIoMux (
VOID
)
{
/* sdmmc0 iomux (microSD socket) */
BUS_IOC->GPIO4D_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x1111); //SDMMC_D0,SDMMC_D1,SDMMC_D2,SDMMC_D3
BUS_IOC->GPIO4D_IOMUX_SEL_H = (0x00FFUL << 16) | (0x0011); //SDMMC_CLK,SDMMC_CMD
PMU1_IOC->GPIO0A_IOMUX_SEL_H = (0x000FUL << 16) | (0x0001); //SDMMC_DET
}
VOID
EFIAPI
SdhciEmmcIoMux (
VOID
)
{
/* sdmmc0 iomux */
/* Do not override, set by earlier boot stages. */
}
#define NS_CRU_BASE 0xFD7C0000
#define CRU_CLKSEL_CON59 0x03EC
#define CRU_CLKSEL_CON78 0x0438
VOID
EFIAPI
Rk806SpiIomux (
VOID
)
{
/* io mux */
//BUS_IOC->GPIO1A_IOMUX_SEL_H = (0xFFFFUL << 16) | 0x8888;
//BUS_IOC->GPIO1B_IOMUX_SEL_L = (0x000FUL << 16) | 0x0008;
PMU1_IOC->GPIO0A_IOMUX_SEL_H = (0x0FF0UL << 16) | 0x0110;
PMU1_IOC->GPIO0B_IOMUX_SEL_L = (0xF0FFUL << 16) | 0x1011;
MmioWrite32(NS_CRU_BASE + CRU_CLKSEL_CON59, (0x00C0UL << 16) | 0x0080);
}
VOID
EFIAPI
Rk806Configure (
VOID
)
{
UINTN RegCfgIndex;
RK806Init();
for (RegCfgIndex = 0; RegCfgIndex < ARRAY_SIZE(rk806_init_data); RegCfgIndex++)
RK806RegulatorInit(rk806_init_data[RegCfgIndex]);
}
VOID
EFIAPI
SetCPULittleVoltage (
IN UINT32 Microvolts
)
{
struct regulator_init_data Rk806CpuLittleSupply =
RK8XX_VOLTAGE_INIT(MASTER_BUCK2, Microvolts);
RK806RegulatorInit(Rk806CpuLittleSupply);
}
VOID
EFIAPI
NorFspiIomux (
VOID
)
{
/* io mux */
/* Do not override, set by earlier boot stages. */
}
VOID
EFIAPI
GmacIomux (
IN UINT32 Id
)
{
/* No GMAC here */
}
VOID
EFIAPI
NorFspiEnableClock (
UINT32 *CruBase
)
{
UINTN BaseAddr = (UINTN) CruBase;
MmioWrite32(BaseAddr + 0x087C, 0x0E000000);
}
VOID
EFIAPI
I2cIomux (
UINT32 id
)
{
switch (id) {
case 0:
GpioPinSetFunction(0, GPIO_PIN_PD1, 3); //i2c0_scl_m2
GpioPinSetFunction(0, GPIO_PIN_PD2, 3); //i2c0_sda_m2
break;
case 1:
break;
case 2:
GpioPinSetFunction(0, GPIO_PIN_PB7, 9); //i2c2_scl_m0
GpioPinSetFunction(0, GPIO_PIN_PC0, 9); //i2c2_sda_m0
break;
case 3:
GpioPinSetFunction(3, GPIO_PIN_PB7, 9); //i2c3_scl_m1
GpioPinSetFunction(3, GPIO_PIN_PC0, 9); //i2c3_sda_m1
break;
case 4:
GpioPinSetFunction(1, GPIO_PIN_PA3, 9); //i2c4_scl_m3
GpioPinSetFunction(1, GPIO_PIN_PA2, 9); //i2c4_sda_m3
break;
case 5:
GpioPinSetFunction(1, GPIO_PIN_PB6, 9); //i2c5_scl_m3
GpioPinSetFunction(1, GPIO_PIN_PB7, 9); //i2c5_sda_m3
break;
case 6:
GpioPinSetFunction(4, GPIO_PIN_PB1, 9); //i2c6_scl_m3
GpioPinSetFunction(4, GPIO_PIN_PB0, 9); //i2c6_sda_m3
break;
case 7:
GpioPinSetFunction(1, GPIO_PIN_PD0, 9); //i2c7_scl_m0
GpioPinSetFunction(1, GPIO_PIN_PD1, 9); //i2c7_sda_m0
break;
default:
break;
}
}
VOID
EFIAPI
UsbPortPowerEnable (
VOID
)
{
}
VOID
EFIAPI
Usb2PhyResume (
VOID
)
{
MmioWrite32(0xfd5d0008, 0x20000000);
MmioWrite32(0xfd5d4008, 0x20000000);
MmioWrite32(0xfd5d8008, 0x20000000);
MmioWrite32(0xfd5dc008, 0x20000000);
MmioWrite32(0xfd7f0a10, 0x07000700);
MmioWrite32(0xfd7f0a10, 0x07000000);
}
VOID
EFIAPI
PcieIoInit (
UINT32 Segment
)
{
/* Set reset to gpio output mode */
if(Segment == PCIE_SEGMENT_PCIE20L2) { // AP6275P Wi-Fi
GpioPinSetDirection (3, GPIO_PIN_PD1, GPIO_PIN_OUTPUT);
/* wifi_poweren_gpio */
GpioPinSetDirection (0, GPIO_PIN_PC7, GPIO_PIN_OUTPUT);
}
}
VOID
EFIAPI
PciePowerEn (
UINT32 Segment,
BOOLEAN Enable
)
{
if(Segment == PCIE_SEGMENT_PCIE20L2) {
/* wifi_poweren_gpio */
GpioPinWrite (0, GPIO_PIN_PC7, Enable);
}
}
VOID
EFIAPI
PciePeReset (
UINT32 Segment,
BOOLEAN Enable
)
{
if(Segment == PCIE_SEGMENT_PCIE20L2) {
GpioPinWrite (3, GPIO_PIN_PD1, !Enable);
}
}
VOID
EFIAPI
PwmFanIoSetup (
VOID
)
{
}
VOID
EFIAPI
PwmFanSetSpeed (
IN UINT32 Percentage
)
{
}
VOID
EFIAPI
PlatformInitLeds (
VOID
)
{
GpioPinWrite (3, GPIO_PIN_PC2, FALSE);
GpioPinSetDirection (3, GPIO_PIN_PC2, GPIO_PIN_OUTPUT);
}
VOID
EFIAPI
PlatformSetStatusLed (
IN BOOLEAN Enable
)
{
GpioPinWrite (3, GPIO_PIN_PC2, Enable);
}
VOID
EFIAPI
PlatformEarlyInit (
VOID
)
{
/* vcc_5v0_en */
GpioPinWrite (4, GPIO_PIN_PA2, TRUE);
GpioPinSetDirection (4, GPIO_PIN_PA2, GPIO_PIN_OUTPUT);
GpioPinSetFunction(1, GPIO_PIN_PC0, 0); //jdet
/* spk-con-gpio */
GpioPinWrite (4, GPIO_PIN_PA5, TRUE);
GpioPinSetDirection (4, GPIO_PIN_PA5, GPIO_PIN_OUTPUT);
}

35
edk2-rockchip/Platform/FydeInnovations/FydetabDuo/Library/RockchipPlatformLib/RockchipPlatformLib.inf Normal file
View File

@@ -0,0 +1,35 @@
#
# Copyright (c) 2021, Rockchip Limited. All rights reserved.
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
[Defines]
INF_VERSION = 0x00010019
BASE_NAME = RockchipPlatformLib
FILE_GUID = 5178fa86-2fec-11ec-95b4-f42a7dcb925d
MODULE_TYPE = BASE
VERSION_STRING = 1.0
LIBRARY_CLASS = RockchipPlatformLib
RKPLATLIB_COMMON_DIR = Silicon/Rockchip/RK3588/Library/RockchipPlatformLibCommon
[Packages]
EmbeddedPkg/EmbeddedPkg.dec
MdePkg/MdePkg.dec
MdeModulePkg/MdeModulePkg.dec
Silicon/Rockchip/RK3588/RK3588.dec
Silicon/Rockchip/RockchipPkg.dec
[LibraryClasses]
ArmLib
HobLib
IoLib
MemoryAllocationLib
SerialPortLib
CruLib
GpioLib
PWMLib
[Sources.common]
RockchipPlatformLib.c
$(RKPLATLIB_COMMON_DIR)/RK3588CruLib.c

2
edk2-rockchip/Silicon/Rockchip/FvMainModules.fdf.inc
View File

@@ -109,7 +109,9 @@
#
INF Silicon/Rockchip/Drivers/Vop2Dxe/Vop2Dxe.inf
# INF Silicon/Rockchip/Library/DisplayLib/AnalogixDpLib.inf
!if $(RK_DW_HDMI_QP_ENABLE) == TRUE
INF Silicon/Rockchip/Library/DisplayLib/DwHdmiQpLib.inf
!endif
INF Silicon/Rockchip/Library/DisplayLib/DwDpLib.inf
INF Silicon/Rockchip/Drivers/LcdGraphicsOutputDxe/LcdGraphicsOutputDxe.inf

3
edk2-rockchip/Silicon/Rockchip/RK3588/RK3588Base.dsc.inc
View File

@@ -79,6 +79,9 @@
!ifndef RK_AHCI_ENABLE
DEFINE RK_AHCI_ENABLE = TRUE
!endif
!ifndef RK_DW_HDMI_QP_ENABLE
DEFINE RK_DW_HDMI_QP_ENABLE = TRUE
!endif
#
# RK3588-specific flags

2
edk2-rockchip/Silicon/Rockchip/Rockchip.dsc.inc
View File

@@ -620,7 +620,9 @@ FspiLib|Silicon/Rockchip/Library/FspiLib/FspiLib.inf
#
Silicon/Rockchip/Drivers/Vop2Dxe/Vop2Dxe.inf
# Silicon/Rockchip/Library/DisplayLib/AnalogixDpLib.inf
!if $(RK_DW_HDMI_QP_ENABLE) == TRUE
Silicon/Rockchip/Library/DisplayLib/DwHdmiQpLib.inf
!endif
Silicon/Rockchip/Library/DisplayLib/DwDpLib.inf
Silicon/Rockchip/Drivers/LcdGraphicsOutputDxe/LcdGraphicsOutputDxe.inf