Merge branch 'master' of git://git.denx.de/u-boot-socfpga

- SPL size check for Gen5, i2c enablement for S10
This commit is contained in:
Tom Rini
2019-06-15 13:02:26 -04:00
2 changed files with 13 additions and 0 deletions

View File

@@ -9,6 +9,7 @@
model = "SoCFPGA Stratix 10 SoCDK";
aliases {
i2c0 = &i2c1;
serial0 = &uart0;
};
@@ -77,6 +78,10 @@
};
};
&i2c1 {
status = "okay";
};
&mmc {
status = "okay";
cap-sd-highspeed;

View File

@@ -3,6 +3,12 @@ if ARCH_SOCFPGA
config NR_DRAM_BANKS
default 1
config SPL_SIZE_LIMIT
default 65536 if TARGET_SOCFPGA_GEN5
config SPL_SIZE_LIMIT_PROVIDE_STACK
default 0x200 if TARGET_SOCFPGA_GEN5
config SPL_STACK_R_ADDR
default 0x00800000 if TARGET_SOCFPGA_GEN5
@@ -49,6 +55,8 @@ config TARGET_SOCFPGA_GEN5
bool
select SPL_ALTERA_SDRAM
imply FPGA_SOCFPGA
imply SPL_SIZE_LIMIT_SUBTRACT_GD
imply SPL_SIZE_LIMIT_SUBTRACT_MALLOC
imply SPL_STACK_R
imply SPL_SYS_MALLOC_SIMPLE
imply USE_TINY_PRINTF