2017-12-21 07:45:38 +08:00
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/*
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2022-02-01 22:49:57 +08:00
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* Copyright (C) 2018-2022 Intel Corporation
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2017-12-21 07:45:38 +08:00
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*
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2018-09-18 15:11:08 +08:00
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* SPDX-License-Identifier: MIT
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2017-12-21 07:45:38 +08:00
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*
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*/
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2020-02-24 05:44:01 +08:00
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#include "shared/source/execution_environment/execution_environment.h"
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2022-02-01 22:49:57 +08:00
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#include "shared/source/helpers/register_offsets.h"
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2020-02-24 05:44:01 +08:00
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#include "shared/source/os_interface/linux/drm_null_device.h"
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2021-01-21 20:10:13 +08:00
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#include "shared/test/common/helpers/debug_manager_state_restore.h"
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2021-12-15 01:40:08 +08:00
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#include "shared/test/common/test_macros/test.h"
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2020-02-24 17:22:30 +08:00
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2020-02-23 22:20:22 +08:00
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#include "opencl/test/unit_test/linux/drm_wrap.h"
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#include "opencl/test/unit_test/linux/mock_os_layer.h"
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2020-02-23 05:50:57 +08:00
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2019-03-28 19:53:48 +08:00
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#include <memory>
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2019-02-27 18:39:32 +08:00
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2019-03-26 18:59:46 +08:00
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using namespace NEO;
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2017-12-21 07:45:38 +08:00
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2021-07-20 18:13:23 +08:00
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extern const DeviceDescriptor NEO::deviceDescriptorTable[];
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2017-12-21 07:45:38 +08:00
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class DrmNullDeviceTestsFixture {
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public:
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void SetUp() {
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2021-07-20 18:13:23 +08:00
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if (deviceDescriptorTable[0].deviceId == 0) {
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GTEST_SKIP();
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}
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2017-12-21 07:45:38 +08:00
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// Create nullDevice drm
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DebugManager.flags.EnableNullHardware.set(true);
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2020-01-30 02:10:49 +08:00
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executionEnvironment.prepareRootDeviceEnvironments(1);
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2020-02-12 00:48:40 +08:00
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drmNullDevice = DrmWrap::createDrm(*executionEnvironment.rootDeviceEnvironments[0]);
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2017-12-21 07:45:38 +08:00
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ASSERT_NE(drmNullDevice, nullptr);
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}
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void TearDown() {
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}
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2020-05-21 05:01:05 +08:00
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std::unique_ptr<Drm> drmNullDevice;
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2020-01-30 02:10:49 +08:00
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ExecutionEnvironment executionEnvironment;
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2017-12-21 07:45:38 +08:00
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protected:
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2019-03-28 19:53:48 +08:00
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DebugManagerStateRestore dbgRestorer;
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2017-12-21 07:45:38 +08:00
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};
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typedef Test<DrmNullDeviceTestsFixture> DrmNullDeviceTests;
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TEST_F(DrmNullDeviceTests, GIVENdrmNullDeviceWHENcallGetDeviceIdTHENreturnProperDeviceId) {
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2019-03-27 19:44:49 +08:00
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int deviceIdQueried = 0;
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int ret = drmNullDevice->getDeviceID(deviceIdQueried);
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2017-12-21 07:45:38 +08:00
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EXPECT_EQ(0, ret);
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2019-03-27 19:44:49 +08:00
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EXPECT_EQ(deviceId, deviceIdQueried);
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2017-12-21 07:45:38 +08:00
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}
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TEST_F(DrmNullDeviceTests, GIVENdrmNullDeviceWHENcallIoctlTHENalwaysSuccess) {
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EXPECT_EQ(drmNullDevice->ioctl(0, nullptr), 0);
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}
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TEST_F(DrmNullDeviceTests, GIVENdrmNullDeviceWHENregReadOtherThenTimestampReadTHENalwaysSuccess) {
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struct drm_i915_reg_read arg;
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arg.offset = 0;
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ASSERT_EQ(drmNullDevice->ioctl(DRM_IOCTL_I915_REG_READ, &arg), 0);
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}
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TEST_F(DrmNullDeviceTests, GIVENdrmNullDeviceWHENgetGpuTimestamp32bOr64bTHENerror) {
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struct drm_i915_reg_read arg;
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2022-02-01 22:49:57 +08:00
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arg.offset = REG_GLOBAL_TIMESTAMP_LDW;
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2017-12-21 07:45:38 +08:00
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ASSERT_EQ(drmNullDevice->ioctl(DRM_IOCTL_I915_REG_READ, &arg), -1);
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2022-02-01 22:49:57 +08:00
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arg.offset = REG_GLOBAL_TIMESTAMP_UN;
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2017-12-21 07:45:38 +08:00
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ASSERT_EQ(drmNullDevice->ioctl(DRM_IOCTL_I915_REG_READ, &arg), -1);
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}
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TEST_F(DrmNullDeviceTests, GIVENdrmNullDeviceWHENgetGpuTimestamp36bTHENproperValues) {
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struct drm_i915_reg_read arg;
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2022-02-01 22:49:57 +08:00
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arg.offset = REG_GLOBAL_TIMESTAMP_LDW | 1;
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2017-12-21 07:45:38 +08:00
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ASSERT_EQ(drmNullDevice->ioctl(DRM_IOCTL_I915_REG_READ, &arg), 0);
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EXPECT_EQ(arg.val, 1000ULL);
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ASSERT_EQ(drmNullDevice->ioctl(DRM_IOCTL_I915_REG_READ, &arg), 0);
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EXPECT_EQ(arg.val, 2000ULL);
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ASSERT_EQ(drmNullDevice->ioctl(DRM_IOCTL_I915_REG_READ, &arg), 0);
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EXPECT_EQ(arg.val, 3000ULL);
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}
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