refactor: move empty sba programming in heapless prolog to base class
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
This commit is contained in:
parent
a51902bb3a
commit
809feca620
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@ -3,7 +3,7 @@ components:
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branch: master
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dest_dir: infra
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fetch_tags: true
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revision: v6939
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revision: v6941
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type: git
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converter: M-3107
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version: '1'
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@ -1,5 +1,5 @@
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/*
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* Copyright (C) 2021-2024 Intel Corporation
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* Copyright (C) 2021-2025 Intel Corporation
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*
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* SPDX-License-Identifier: MIT
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*
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@ -8,6 +8,7 @@
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#include "shared/source/command_container/command_encoder.h"
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#include "shared/source/command_stream/aub_command_stream_receiver_hw.h"
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#include "shared/source/command_stream/command_stream_receiver_hw.h"
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#include "shared/source/helpers/compiler_product_helper.h"
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#include "shared/source/memory_manager/allocation_properties.h"
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#include "shared/source/memory_manager/memory_manager.h"
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#include "shared/test/common/helpers/dispatch_flags_helper.h"
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@ -54,6 +55,11 @@ struct MiAtomicAubFixture : public AUBFixture {
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taskStream.replaceGraphicsAllocation(streamAllocation);
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taskStream.replaceBuffer(streamAllocation->getUnderlyingBuffer(),
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streamAllocation->getUnderlyingBufferSize());
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auto &compilerProductHelper = device->getCompilerProductHelper();
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auto heaplessEnabled = compilerProductHelper.isHeaplessModeEnabled(device->getHardwareInfo());
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this->heaplessStateInitEnabled = compilerProductHelper.isHeaplessStateInitEnabled(heaplessEnabled);
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}
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void tearDown() {
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@ -71,11 +77,20 @@ struct MiAtomicAubFixture : public AUBFixture {
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csr->makeResident(*deviceSurface);
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csr->makeResident(*systemSurface);
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csr->flushTask(taskStream, 0,
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&csr->getIndirectHeap(IndirectHeapType::dynamicState, 0u),
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&csr->getIndirectHeap(IndirectHeapType::indirectObject, 0u),
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&csr->getIndirectHeap(IndirectHeapType::surfaceState, 0u),
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0u, dispatchFlags, device->getDevice());
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if (this->heaplessStateInitEnabled) {
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csr->flushTaskStateless(taskStream, 0,
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&csr->getIndirectHeap(IndirectHeapType::dynamicState, 0u),
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&csr->getIndirectHeap(IndirectHeapType::indirectObject, 0u),
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&csr->getIndirectHeap(IndirectHeapType::surfaceState, 0u),
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0u, dispatchFlags, device->getDevice());
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} else {
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csr->flushTask(taskStream, 0,
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&csr->getIndirectHeap(IndirectHeapType::dynamicState, 0u),
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&csr->getIndirectHeap(IndirectHeapType::indirectObject, 0u),
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&csr->getIndirectHeap(IndirectHeapType::surfaceState, 0u),
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0u, dispatchFlags, device->getDevice());
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}
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csr->flushBatchedSubmissions();
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}
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@ -84,6 +99,7 @@ struct MiAtomicAubFixture : public AUBFixture {
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GraphicsAllocation *streamAllocation = nullptr;
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GraphicsAllocation *deviceSurface = nullptr;
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GraphicsAllocation *systemSurface = nullptr;
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bool heaplessStateInitEnabled = false;
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};
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using MiAtomicAubTest = Test<MiAtomicAubFixture>;
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@ -1,5 +1,5 @@
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/*
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* Copyright (C) 2022-2024 Intel Corporation
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* Copyright (C) 2022-2025 Intel Corporation
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*
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* SPDX-License-Identifier: MIT
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*
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@ -7,6 +7,7 @@
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#include "shared/source/helpers/array_count.h"
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#include "shared/source/helpers/basic_math.h"
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#include "shared/source/helpers/compiler_product_helper.h"
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#include "shared/source/utilities/io_functions.h"
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#include "shared/source/utilities/tag_allocator.h"
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#include "shared/test/common/mocks/mock_execution_environment.h"
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@ -391,7 +392,12 @@ struct MultiLevelBatchAubFixture : public AUBFixture {
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thirdLevelBatch = memoryManager->allocateGraphicsMemoryWithProperties(*commandBufferProperties);
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secondLevelBatchStream = std::make_unique<LinearStream>(secondLevelBatch);
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thirdLevelBatchStream = std::make_unique<LinearStream>(thirdLevelBatch);
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};
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auto &compilerProductHelper = device->getCompilerProductHelper();
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auto heaplessEnabled = compilerProductHelper.isHeaplessModeEnabled(device->getHardwareInfo());
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this->heaplessStateInitEnabled = compilerProductHelper.isHeaplessStateInitEnabled(heaplessEnabled);
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}
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void tearDown() {
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debugManager.flags.AubDumpAddMmioRegistersList.getRef() = "unk";
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debugManager.flags.AubDumpAddMmioRegistersList.getRef().shrink_to_fit();
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@ -403,18 +409,27 @@ struct MultiLevelBatchAubFixture : public AUBFixture {
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memoryManager->freeGraphicsMemory(helperSurface);
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AUBFixture::tearDown();
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};
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}
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void flushStream() {
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DispatchFlags dispatchFlags = DispatchFlagsHelper::createDefaultDispatchFlags();
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dispatchFlags.guardCommandBufferWithPipeControl = true;
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csr->makeResident(*helperSurface);
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csr->flushTask(*taskStream, 0,
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&csr->getIndirectHeap(IndirectHeap::Type::dynamicState, 0u),
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&csr->getIndirectHeap(IndirectHeap::Type::indirectObject, 0u),
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&csr->getIndirectHeap(IndirectHeap::Type::surfaceState, 0u),
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0u, dispatchFlags, device->getDevice());
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if (this->heaplessStateInitEnabled) {
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csr->flushTaskStateless(*taskStream, 0,
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&csr->getIndirectHeap(IndirectHeap::Type::dynamicState, 0u),
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&csr->getIndirectHeap(IndirectHeap::Type::indirectObject, 0u),
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&csr->getIndirectHeap(IndirectHeap::Type::surfaceState, 0u),
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0u, dispatchFlags, device->getDevice());
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} else {
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csr->flushTask(*taskStream, 0,
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&csr->getIndirectHeap(IndirectHeap::Type::dynamicState, 0u),
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&csr->getIndirectHeap(IndirectHeap::Type::indirectObject, 0u),
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&csr->getIndirectHeap(IndirectHeap::Type::surfaceState, 0u),
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0u, dispatchFlags, device->getDevice());
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}
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csr->flushBatchedSubmissions();
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}
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@ -431,6 +446,7 @@ struct MultiLevelBatchAubFixture : public AUBFixture {
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GraphicsAllocation *secondLevelBatch = nullptr;
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GraphicsAllocation *thirdLevelBatch = nullptr;
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bool heaplessStateInitEnabled = false;
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};
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using MultiLevelBatchTestsWithNesting = Test<MultiLevelBatchAubFixture<true>>;
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@ -1,11 +1,12 @@
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/*
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* Copyright (C) 2022-2024 Intel Corporation
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* Copyright (C) 2022-2025 Intel Corporation
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*
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* SPDX-License-Identifier: MIT
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*
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*/
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#include "shared/source/command_container/command_encoder.h"
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#include "shared/source/helpers/compiler_product_helper.h"
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#include "shared/source/helpers/register_offsets.h"
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#include "shared/source/memory_manager/allocation_properties.h"
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#include "shared/source/memory_manager/memory_manager.h"
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@ -35,6 +36,10 @@ struct MiMath : public AUBFixture, public ::testing::Test {
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streamAllocation = this->device->getMemoryManager()->allocateGraphicsMemoryWithProperties({device->getRootDeviceIndex(), MemoryConstants::pageSize, AllocationType::commandBuffer, device->getDeviceBitfield()});
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taskStream = std::make_unique<LinearStream>(streamAllocation);
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auto &compilerProductHelper = device->getCompilerProductHelper();
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auto heaplessEnabled = compilerProductHelper.isHeaplessModeEnabled(device->getHardwareInfo());
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this->heaplessStateInitEnabled = compilerProductHelper.isHeaplessStateInitEnabled(heaplessEnabled);
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}
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void TearDown() override {
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this->device->getMemoryManager()->freeGraphicsMemory(streamAllocation);
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@ -45,11 +50,19 @@ struct MiMath : public AUBFixture, public ::testing::Test {
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DispatchFlags dispatchFlags = DispatchFlagsHelper::createDefaultDispatchFlags();
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dispatchFlags.guardCommandBufferWithPipeControl = true;
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csr->flushTask(*taskStream, 0,
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&csr->getIndirectHeap(IndirectHeapType::dynamicState, 0u),
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&csr->getIndirectHeap(IndirectHeapType::indirectObject, 0u),
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&csr->getIndirectHeap(IndirectHeapType::surfaceState, 0u),
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0u, dispatchFlags, device->getDevice());
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if (this->heaplessStateInitEnabled) {
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csr->flushTaskStateless(*taskStream, 0,
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&csr->getIndirectHeap(IndirectHeapType::dynamicState, 0u),
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&csr->getIndirectHeap(IndirectHeapType::indirectObject, 0u),
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&csr->getIndirectHeap(IndirectHeapType::surfaceState, 0u),
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0u, dispatchFlags, device->getDevice());
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} else {
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csr->flushTask(*taskStream, 0,
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&csr->getIndirectHeap(IndirectHeapType::dynamicState, 0u),
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&csr->getIndirectHeap(IndirectHeapType::indirectObject, 0u),
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&csr->getIndirectHeap(IndirectHeapType::surfaceState, 0u),
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0u, dispatchFlags, device->getDevice());
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}
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csr->flushBatchedSubmissions();
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}
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@ -125,6 +138,7 @@ struct MiMath : public AUBFixture, public ::testing::Test {
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const uint32_t numberOfOperationToLoadAddressToMiMathAccu = 7;
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std::unique_ptr<LinearStream> taskStream;
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GraphicsAllocation *streamAllocation = nullptr;
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bool heaplessStateInitEnabled = false;
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};
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using MatcherIsDg2OrPvc = IsWithinProducts<IGFX_DG2, IGFX_PVC>;
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/*
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* Copyright (C) 2022-2024 Intel Corporation
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* Copyright (C) 2022-2025 Intel Corporation
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*
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* SPDX-License-Identifier: MIT
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*
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@ -10,6 +10,7 @@
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#include "shared/source/command_container/walker_partition_xehp_and_later.h"
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#include "shared/source/helpers/array_count.h"
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#include "shared/source/helpers/basic_math.h"
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#include "shared/source/helpers/compiler_product_helper.h"
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#include "shared/source/helpers/timestamp_packet.h"
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#include "shared/source/utilities/io_functions.h"
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#include "shared/source/utilities/tag_allocator.h"
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@ -120,6 +121,11 @@ void AubWalkerPartitionZeroFixture::setUp() {
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helperSurface = memoryManager->allocateGraphicsMemoryWithProperties(*commandBufferProperties);
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memset(helperSurface->getUnderlyingBuffer(), 0, MemoryConstants::pageSize);
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taskStream = std::make_unique<LinearStream>(streamAllocation);
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auto &compilerProductHelper = device->getCompilerProductHelper();
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auto heaplessEnabled = compilerProductHelper.isHeaplessModeEnabled(device->getHardwareInfo());
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this->heaplessStateInitEnabled = compilerProductHelper.isHeaplessStateInitEnabled(heaplessEnabled);
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}
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void AubWalkerPartitionZeroFixture::tearDown() {
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auto memoryManager = this->device->getMemoryManager();
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@ -133,11 +139,20 @@ void AubWalkerPartitionZeroFixture::flushStream() {
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dispatchFlags.guardCommandBufferWithPipeControl = true;
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csr->makeResident(*helperSurface);
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csr->flushTask(*taskStream, 0,
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&csr->getIndirectHeap(IndirectHeap::Type::dynamicState, 0u),
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&csr->getIndirectHeap(IndirectHeap::Type::indirectObject, 0u),
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&csr->getIndirectHeap(IndirectHeap::Type::surfaceState, 0u),
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0u, dispatchFlags, device->getDevice());
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if (this->heaplessStateInitEnabled) {
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csr->flushTaskStateless(*taskStream, 0,
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&csr->getIndirectHeap(IndirectHeap::Type::dynamicState, 0u),
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&csr->getIndirectHeap(IndirectHeap::Type::indirectObject, 0u),
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&csr->getIndirectHeap(IndirectHeap::Type::surfaceState, 0u),
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0u, dispatchFlags, device->getDevice());
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} else {
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csr->flushTask(*taskStream, 0,
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&csr->getIndirectHeap(IndirectHeap::Type::dynamicState, 0u),
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&csr->getIndirectHeap(IndirectHeap::Type::indirectObject, 0u),
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&csr->getIndirectHeap(IndirectHeap::Type::surfaceState, 0u),
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0u, dispatchFlags, device->getDevice());
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}
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csr->flushBatchedSubmissions();
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}
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@ -1,5 +1,5 @@
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/*
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* Copyright (C) 2022-2024 Intel Corporation
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* Copyright (C) 2022-2025 Intel Corporation
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*
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* SPDX-License-Identifier: MIT
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*
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@ -120,6 +120,7 @@ struct AubWalkerPartitionFixture : public KernelAUBFixture<SimpleKernelFixture>
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HardwareParse hwParser;
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DispatchParameters dispatchParamters;
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bool heaplessStateInitEnabled = false;
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};
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struct AubWalkerPartitionTest : public AubWalkerPartitionFixture,
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@ -29,6 +29,8 @@
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using namespace NEO;
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#include "shared/test/common/test_macros/header/heapless_matchers.h"
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typedef UltCommandStreamReceiverTest CommandStreamReceiverFlushTaskTests;
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HWTEST_F(CommandStreamReceiverFlushTaskTests, WhenFlushingTaskThenCommandStreamReceiverGetsUpdated) {
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@ -760,7 +762,7 @@ HWTEST2_F(CommandStreamReceiverFlushTaskTests, GivenPreambleSentAndMediaSamplerR
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EXPECT_NE(nullptr, getCommand<typename FamilyType::PIPELINE_SELECT>());
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}
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HWTEST_F(CommandStreamReceiverFlushTaskTests, GivenStateBaseAddressNotSentWhenFlushingTaskThenStateBaseAddressIsSent) {
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HWTEST2_F(CommandStreamReceiverFlushTaskTests, GivenStateBaseAddressNotSentWhenFlushingTaskThenStateBaseAddressIsSent, IsHeapfulSupported) {
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auto &commandStreamReceiver = pDevice->getUltCommandStreamReceiver<FamilyType>();
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commandStreamReceiver.isPreambleSent = true;
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commandStreamReceiver.setMediaVFEStateDirty(false);
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@ -774,7 +776,7 @@ HWTEST_F(CommandStreamReceiverFlushTaskTests, GivenStateBaseAddressNotSentWhenFl
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EXPECT_NE(cmdList.end(), stateBaseAddressItor);
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}
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HWTEST_F(CommandStreamReceiverFlushTaskTests, GivenSizeChangedWhenFlushingTaskThenStateBaseAddressIsSent) {
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HWTEST2_F(CommandStreamReceiverFlushTaskTests, GivenSizeChangedWhenFlushingTaskThenStateBaseAddressIsSent, IsHeapfulSupported) {
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auto &commandStreamReceiver = pDevice->getUltCommandStreamReceiver<FamilyType>();
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auto dshSize = dsh.getMaxAvailableSpace();
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auto iohSize = ioh.getMaxAvailableSpace();
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EXPECT_NE(cmdList.end(), stateBaseAddressItor);
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}
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HWTEST_F(CommandStreamReceiverFlushTaskTests, givenDshHeapChangeWhenFlushTaskIsCalledThenSbaIsReloaded) {
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HWTEST2_F(CommandStreamReceiverFlushTaskTests, givenDshHeapChangeWhenFlushTaskIsCalledThenSbaIsReloaded, IsHeapfulSupported) {
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bool deviceUsesDsh = pDevice->getHardwareInfo().capabilityTable.supportsImages;
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if (!deviceUsesDsh) {
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GTEST_SKIP();
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EXPECT_NE(cmdList.end(), stateBaseAddressItor);
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}
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HWTEST_F(CommandStreamReceiverFlushTaskTests, givenSshHeapChangeWhenFlushTaskIsCalledThenSbaIsReloaded) {
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HWTEST2_F(CommandStreamReceiverFlushTaskTests, givenSshHeapChangeWhenFlushTaskIsCalledThenSbaIsReloaded, IsHeapfulSupported) {
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auto &commandStreamReceiver = pDevice->getUltCommandStreamReceiver<FamilyType>();
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configureCSRtoNonDirtyState<FamilyType>(false);
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EXPECT_NE(cmdList.end(), stateBaseAddressItor);
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}
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HWTEST_F(CommandStreamReceiverFlushTaskTests, givenIohHeapChangeWhenFlushTaskIsCalledThenSbaIsReloaded) {
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HWTEST2_F(CommandStreamReceiverFlushTaskTests, givenIohHeapChangeWhenFlushTaskIsCalledThenSbaIsReloaded, IsHeapfulSupported) {
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auto &commandStreamReceiver = pDevice->getUltCommandStreamReceiver<FamilyType>();
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configureCSRtoNonDirtyState<FamilyType>(false);
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@ -843,7 +845,7 @@ HWTEST_F(CommandStreamReceiverFlushTaskTests, givenIohHeapChangeWhenFlushTaskIsC
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EXPECT_NE(cmdList.end(), stateBaseAddressItor);
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}
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HWTEST_F(CommandStreamReceiverFlushTaskTests, GivenStateBaseAddressNotChangedWhenFlushingTaskThenStateBaseAddressIsNotSent) {
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HWTEST2_F(CommandStreamReceiverFlushTaskTests, GivenStateBaseAddressNotChangedWhenFlushingTaskThenStateBaseAddressIsNotSent, IsHeapfulSupported) {
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auto &commandStreamReceiver = pDevice->getUltCommandStreamReceiver<FamilyType>();
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commandStreamReceiver.isPreambleSent = true;
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configureCSRHeapStatesToNonDirty<FamilyType>();
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@ -1269,14 +1271,14 @@ HWTEST_F(CommandStreamReceiverFlushTaskTests, GivenBlockedKernelRequiringDCFlush
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cmdList.clear();
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// Parse command list
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parseCommands<FamilyType>(commandStreamTask, usedBefore);
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parseCommands<FamilyType>(commandStreamTask, usedAfter - usedBefore);
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auto itorPC = find<PIPE_CONTROL *>(cmdList.begin(), cmdList.end());
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EXPECT_NE(cmdList.end(), itorPC);
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ASSERT_NE(cmdList.end(), itorPC);
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if (UnitTestHelper<FamilyType>::isPipeControlWArequired(pDevice->getHardwareInfo())) {
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itorPC++;
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itorPC = find<PIPE_CONTROL *>(itorPC, cmdList.end());
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EXPECT_NE(cmdList.end(), itorPC);
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ASSERT_NE(cmdList.end(), itorPC);
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}
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// Verify that the dcFlushEnabled bit is set in PC
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@ -216,7 +216,7 @@ HWTEST2_F(PreambleCfeStateXeHPAndLater, givenSetDebugFlagWhenPreambleCfeStateIsP
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}
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using XeHpCommandStreamReceiverFlushTaskTests = UltCommandStreamReceiverTest;
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HWCMDTEST_F(IGFX_XE_HP_CORE, XeHpCommandStreamReceiverFlushTaskTests, whenFlushingCommandStreamReceiverThenExpectStateBaseAddressEqualsIndirectObjectBaseAddress) {
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HWTEST2_F(XeHpCommandStreamReceiverFlushTaskTests, whenFlushingCommandStreamReceiverThenExpectStateBaseAddressEqualsIndirectObjectBaseAddress, IsHeapfulSupportedAndAtLeastXeHpCore) {
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using STATE_BASE_ADDRESS = typename FamilyType::STATE_BASE_ADDRESS;
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auto &commandStreamReceiver = pDevice->getUltCommandStreamReceiver<FamilyType>();
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if (commandStreamReceiver.heaplessModeEnabled) {
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@ -236,7 +236,7 @@ HWCMDTEST_F(IGFX_XE_HP_CORE, XeHpCommandStreamReceiverFlushTaskTests, whenFlushi
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}
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}
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HWCMDTEST_F(IGFX_XE_HP_CORE, XeHpCommandStreamReceiverFlushTaskTests, whenFlushCalledThenStateBaseAddressHasAllCachesOn) {
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HWTEST2_F(XeHpCommandStreamReceiverFlushTaskTests, whenFlushCalledThenStateBaseAddressHasAllCachesOn, IsHeapfulSupportedAndAtLeastXeHpCore) {
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using STATE_BASE_ADDRESS = typename FamilyType::STATE_BASE_ADDRESS;
|
||||
auto &commandStreamReceiver = pDevice->getUltCommandStreamReceiver<FamilyType>();
|
||||
auto gmmHelper = pDevice->getRootDeviceEnvironment().getGmmHelper();
|
||||
|
@ -261,7 +261,7 @@ HWCMDTEST_F(IGFX_XE_HP_CORE, XeHpCommandStreamReceiverFlushTaskTests, whenFlushC
|
|||
EXPECT_EQ(expectedMocsForStateless, stateBaseAddress->getStatelessDataPortAccessMemoryObjectControlState());
|
||||
}
|
||||
|
||||
HWCMDTEST_F(IGFX_XE_HP_CORE, XeHpCommandStreamReceiverFlushTaskTests, whenFlushCalledThenStateBaseAddressHasAllCachesOffWhenDebugFlagIsPresent) {
|
||||
HWTEST2_F(XeHpCommandStreamReceiverFlushTaskTests, whenFlushCalledThenStateBaseAddressHasAllCachesOffWhenDebugFlagIsPresent, IsHeapfulSupportedAndAtLeastXeHpCore) {
|
||||
DebugManagerStateRestore restorer;
|
||||
debugManager.flags.DisableCachingForHeaps.set(1);
|
||||
using STATE_BASE_ADDRESS = typename FamilyType::STATE_BASE_ADDRESS;
|
||||
|
@ -287,7 +287,7 @@ HWCMDTEST_F(IGFX_XE_HP_CORE, XeHpCommandStreamReceiverFlushTaskTests, whenFlushC
|
|||
EXPECT_EQ(expectedMocsForHeap, stateBaseAddress->getBindlessSamplerStateMemoryObjectControlState());
|
||||
}
|
||||
|
||||
HWCMDTEST_F(IGFX_XE_HP_CORE, XeHpCommandStreamReceiverFlushTaskTests, givenL3ToL1DebugFlagWhenStatelessMocsIsProgrammedThenItHasL1CachingOn) {
|
||||
HWTEST2_F(XeHpCommandStreamReceiverFlushTaskTests, givenL3ToL1DebugFlagWhenStatelessMocsIsProgrammedThenItHasL1CachingOn, IsHeapfulSupportedAndAtLeastXeHpCore) {
|
||||
DebugManagerStateRestore restore;
|
||||
debugManager.flags.ForceL1Caching.set(1u);
|
||||
using STATE_BASE_ADDRESS = typename FamilyType::STATE_BASE_ADDRESS;
|
||||
|
@ -303,7 +303,7 @@ HWCMDTEST_F(IGFX_XE_HP_CORE, XeHpCommandStreamReceiverFlushTaskTests, givenL3ToL
|
|||
EXPECT_EQ(expectedMocs, stateBaseAddress->getStatelessDataPortAccessMemoryObjectControlState());
|
||||
}
|
||||
|
||||
HWCMDTEST_F(IGFX_XE_HP_CORE, XeHpCommandStreamReceiverFlushTaskTests, givenForceL1CachingDebugFlagDisabledWhenStatelessMocsIsProgrammedThenItHasL3CachingOn) {
|
||||
HWTEST2_F(XeHpCommandStreamReceiverFlushTaskTests, givenForceL1CachingDebugFlagDisabledWhenStatelessMocsIsProgrammedThenItHasL3CachingOn, IsHeapfulSupportedAndAtLeastXeHpCore) {
|
||||
DebugManagerStateRestore restore;
|
||||
debugManager.flags.ForceL1Caching.set(0u);
|
||||
using STATE_BASE_ADDRESS = typename FamilyType::STATE_BASE_ADDRESS;
|
||||
|
@ -322,7 +322,7 @@ HWCMDTEST_F(IGFX_XE_HP_CORE, XeHpCommandStreamReceiverFlushTaskTests, givenForce
|
|||
EXPECT_EQ(expectedMocs, stateBaseAddress->getStatelessDataPortAccessMemoryObjectControlState());
|
||||
}
|
||||
|
||||
HWCMDTEST_F(IGFX_XE_HP_CORE, XeHpCommandStreamReceiverFlushTaskTests, whenFlushingCommandStreamReceiverThenExpectBindlessBaseAddressEqualSurfaceStateBaseAddress) {
|
||||
HWTEST2_F(XeHpCommandStreamReceiverFlushTaskTests, whenFlushingCommandStreamReceiverThenExpectBindlessBaseAddressEqualSurfaceStateBaseAddress, IsHeapfulSupportedAndAtLeastXeHpCore) {
|
||||
using STATE_BASE_ADDRESS = typename FamilyType::STATE_BASE_ADDRESS;
|
||||
using RENDER_SURFACE_STATE = typename FamilyType::RENDER_SURFACE_STATE;
|
||||
|
||||
|
@ -343,7 +343,7 @@ HWCMDTEST_F(IGFX_XE_HP_CORE, XeHpCommandStreamReceiverFlushTaskTests, whenFlushi
|
|||
EXPECT_EQ(bindlessSurfaceSize, stateBaseAddress->getBindlessSurfaceStateSize());
|
||||
}
|
||||
|
||||
HWCMDTEST_F(IGFX_XE_HP_CORE, XeHpCommandStreamReceiverFlushTaskTests, whenFlushingCommandStreamReceiverThenSetBindlessSamplerStateBaseAddressModifyEnable) {
|
||||
HWTEST2_F(XeHpCommandStreamReceiverFlushTaskTests, whenFlushingCommandStreamReceiverThenSetBindlessSamplerStateBaseAddressModifyEnable, IsHeapfulSupportedAndAtLeastXeHpCore) {
|
||||
using STATE_BASE_ADDRESS = typename FamilyType::STATE_BASE_ADDRESS;
|
||||
auto &commandStreamReceiver = pDevice->getUltCommandStreamReceiver<FamilyType>();
|
||||
if (commandStreamReceiver.heaplessModeEnabled) {
|
||||
|
@ -361,7 +361,7 @@ HWCMDTEST_F(IGFX_XE_HP_CORE, XeHpCommandStreamReceiverFlushTaskTests, whenFlushi
|
|||
EXPECT_EQ(dsh.getHeapSizeInPages(), stateBaseAddress->getBindlessSamplerStateBufferSize());
|
||||
}
|
||||
|
||||
HWCMDTEST_F(IGFX_XE_HP_CORE, XeHpCommandStreamReceiverFlushTaskTests, givenDebugKeysThatOverrideMultiGpuSettingWhenStateBaseAddressIsProgrammedThenValuesMatch) {
|
||||
HWTEST2_F(XeHpCommandStreamReceiverFlushTaskTests, givenDebugKeysThatOverrideMultiGpuSettingWhenStateBaseAddressIsProgrammedThenValuesMatch, IsHeapfulSupportedAndAtLeastXeHpCore) {
|
||||
DebugManagerStateRestore restorer;
|
||||
|
||||
auto &commandStreamReceiver = pDevice->getUltCommandStreamReceiver<FamilyType>();
|
||||
|
|
|
@ -2322,6 +2322,10 @@ inline void CommandStreamReceiverHw<GfxFamily>::handleBatchedDispatchImplicitFlu
|
|||
}
|
||||
}
|
||||
|
||||
template <typename GfxFamily>
|
||||
void CommandStreamReceiverHw<GfxFamily>::programStateBaseAddressHeapless(Device &device, LinearStream &commandStream) {
|
||||
}
|
||||
|
||||
template <typename GfxFamily>
|
||||
inline BatchBuffer CommandStreamReceiverHw<GfxFamily>::prepareBatchBufferForSubmission(LinearStream &commandStreamTask,
|
||||
size_t commandStreamStartTask,
|
||||
|
|
|
@ -54,11 +54,6 @@ SubmissionStatus CommandStreamReceiverHw<GfxFamily>::programHeaplessProlog(Devic
|
|||
return SubmissionStatus::unsupported;
|
||||
}
|
||||
|
||||
template <typename GfxFamily>
|
||||
void CommandStreamReceiverHw<GfxFamily>::programStateBaseAddressHeapless(Device &device, LinearStream &commandStream) {
|
||||
UNRECOVERABLE_IF(true);
|
||||
}
|
||||
|
||||
template <typename GfxFamily>
|
||||
void CommandStreamReceiverHw<GfxFamily>::programComputeModeHeapless(Device &device, LinearStream &commandStream) {
|
||||
UNRECOVERABLE_IF(true);
|
||||
|
|
|
@ -5962,7 +5962,6 @@ HWTEST_F(CommandStreamReceiverHwHeaplessTest, whenHeaplessCommandStreamReceiverF
|
|||
|
||||
EXPECT_ANY_THROW(csr->flushTaskStateless(commandStream, 0, nullptr, nullptr, nullptr, 0, csr->recordedDispatchFlags, *pDevice));
|
||||
EXPECT_ANY_THROW(csr->programHeaplessProlog(*pDevice));
|
||||
EXPECT_ANY_THROW(csr->programStateBaseAddressHeapless(*pDevice, commandStream));
|
||||
EXPECT_ANY_THROW(csr->programComputeModeHeapless(*pDevice, commandStream));
|
||||
EXPECT_ANY_THROW(csr->getCmdSizeForHeaplessPrologue(*pDevice));
|
||||
EXPECT_ANY_THROW(csr->handleAllocationsResidencyForHeaplessProlog(commandStream, *pDevice));
|
||||
|
@ -6369,12 +6368,20 @@ HWTEST_F(CommandStreamReceiverHwTest, givenEpilogueStreamAvailableWhenFlushBcsTa
|
|||
|
||||
HWTEST_F(CommandStreamReceiverHwTest, givenEpilogueStreamAvailableWhenFlushImmediateTaskCalledThenDispachEpilogueCommandsIntoEpilogueStream) {
|
||||
auto &commandStreamReceiver = pDevice->getUltCommandStreamReceiver<FamilyType>();
|
||||
|
||||
auto heaplessStateInit = commandStreamReceiver.heaplessStateInitialized;
|
||||
// first flush can carry preamble, no interest in flags here
|
||||
commandStreamReceiver.flushImmediateTask(commandStream,
|
||||
commandStream.getUsed(),
|
||||
immediateFlushTaskFlags,
|
||||
*pDevice);
|
||||
if (heaplessStateInit) {
|
||||
commandStreamReceiver.flushImmediateTaskStateless(commandStream,
|
||||
commandStream.getUsed(),
|
||||
immediateFlushTaskFlags,
|
||||
*pDevice);
|
||||
|
||||
} else {
|
||||
commandStreamReceiver.flushImmediateTask(commandStream,
|
||||
commandStream.getUsed(),
|
||||
immediateFlushTaskFlags,
|
||||
*pDevice);
|
||||
}
|
||||
|
||||
// regular dispatch here
|
||||
GraphicsAllocation *commandBuffer = commandStreamReceiver.getMemoryManager()->allocateGraphicsMemoryWithProperties(MockAllocationProperties{commandStreamReceiver.getRootDeviceIndex(), MemoryConstants::pageSize});
|
||||
|
@ -6387,10 +6394,18 @@ HWTEST_F(CommandStreamReceiverHwTest, givenEpilogueStreamAvailableWhenFlushImmed
|
|||
immediateFlushTaskFlags.requireTaskCountUpdate = true;
|
||||
immediateFlushTaskFlags.optionalEpilogueCmdStream = &epilogueStream;
|
||||
|
||||
commandStreamReceiver.flushImmediateTask(commandStream,
|
||||
commandStream.getUsed(),
|
||||
immediateFlushTaskFlags,
|
||||
*pDevice);
|
||||
if (heaplessStateInit) {
|
||||
commandStreamReceiver.flushImmediateTaskStateless(commandStream,
|
||||
commandStream.getUsed(),
|
||||
immediateFlushTaskFlags,
|
||||
*pDevice);
|
||||
|
||||
} else {
|
||||
commandStreamReceiver.flushImmediateTask(commandStream,
|
||||
commandStream.getUsed(),
|
||||
immediateFlushTaskFlags,
|
||||
*pDevice);
|
||||
}
|
||||
|
||||
EXPECT_TRUE(commandStreamReceiver.isMadeResident(commandBuffer));
|
||||
EXPECT_TRUE(commandStreamReceiver.latestFlushedBatchBuffer.dispatchMonitorFence);
|
||||
|
|
Loading…
Reference in New Issue