Revert "Add debug flag to enable specific PIPE_CONTROL fields"

This reverts commit 2e7c90e58f.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
This commit is contained in:
Compute-Runtime-Validation
2022-09-29 09:39:48 +02:00
committed by Compute-Runtime-Automation
parent dc68cf0fe2
commit 9a1102bb7a
14 changed files with 19 additions and 459 deletions

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@ -306,7 +306,8 @@ HWCMDTEST_F(IGFX_XE_HP_CORE, CommandStreamReceiverFlushTaskXeHPAndLaterTests, wh
EXPECT_NE(nullptr, bindingTablePoolAlloc);
}
HWTEST2_F(CommandStreamReceiverFlushTaskXeHPAndLaterTests, whenFlushAllCachesVariableIsSetAndAddPipeControlIsCalledThenFieldsAreProperlySet, IsXeHPOrAbove) {
using isXeHPOrAbove = IsAtLeastProduct<IGFX_XE_HP_SDV>;
HWTEST2_F(CommandStreamReceiverFlushTaskXeHPAndLaterTests, whenFlushAllCachesVariableIsSetAndAddPipeControlIsCalledThenFieldsAreProperlySet, isXeHPOrAbove) {
using PIPE_CONTROL = typename FamilyType::PIPE_CONTROL;
DebugManagerStateRestore dbgRestorer;
DebugManager.flags.FlushAllCaches.set(true);

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@ -88,7 +88,6 @@ DECLARE_DEBUG_VARIABLE(std::string, InjectApiBuildOptions, std::string("unk"), "
DECLARE_DEBUG_VARIABLE(std::string, OverrideDeviceName, std::string("unk"), "Device name to override")
DECLARE_DEBUG_VARIABLE(int64_t, OverrideMultiStoragePlacement, -1, "-1: disable, 0+: tile mask, each bit corresponds to tile")
DECLARE_DEBUG_VARIABLE(int64_t, ForceCompressionDisabledForCompressedBlitCopies, -1, "-1: default, 0: disabled, 1: enabled. If compression is required, set AUX_CCS_E, but force CompressionEnable filed. 0 should result in uncompressed read/write")
DECLARE_DEBUG_VARIABLE(int32_t, FlushSpecificCache, -1, "Chooses pipe controls between enqueues flush with specific cache mask. 0: default, 1: dcFlushEnableSet, 2: renderTargetCacheFlushEnableSet, 4: instructionCacheInvalidateEnableSet, 8: textureCacheInvalidationEnableSet, 16: pipeControlFlushEnableSet, 32: vfCacheInvalidationEnableSet, 64: constantCacheInvalidationEnableSet, 128:stateCacheInvalidationEnableSet, 256: tlbInvalidationSet, 512: hdcPipelineFlushSet, 1024: unTypedDataPortCacheFlushSet, 2048: compressionControlSurfaceCcsFlushSet")
DECLARE_DEBUG_VARIABLE(int32_t, ForceL1Caching, -1, "-1: default, 0: disable, 1: enable, When set to true driver will program L1 cache policy for surface state and stateless accesses")
DECLARE_DEBUG_VARIABLE(int32_t, ForceAuxTranslationEnabled, -1, "-1: default, 0: disabled, 1: enabled")
DECLARE_DEBUG_VARIABLE(int32_t, EnableExperimentalCommandBuffer, 0, "Enables injection of experimental command buffer")

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@ -143,9 +143,7 @@ template <>
inline void MemorySynchronizationCommands<Family>::setBarrierExtraProperties(void *barrierCmd, PipeControlArgs &args) {
auto &pipeControl = *reinterpret_cast<typename Family::PIPE_CONTROL *>(barrierCmd);
auto flushSpecificCaches = DebugManager.flags.FlushSpecificCache.get() > 0 ? DebugManager.flags.FlushSpecificCache.get() : 0;
pipeControl.setHdcPipelineFlush(args.hdcPipelineFlush || FlushSpecificCacheHelper::isHdcPipelineFlushSet(flushSpecificCaches));
pipeControl.setHdcPipelineFlush(args.hdcPipelineFlush);
if (DebugManager.flags.FlushAllCaches.get()) {
pipeControl.setHdcPipelineFlush(true);

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@ -60,7 +60,6 @@ set(NEO_CORE_HELPERS
${CMAKE_CURRENT_SOURCE_DIR}/flat_batch_buffer_helper.cpp
${CMAKE_CURRENT_SOURCE_DIR}/flat_batch_buffer_helper_hw.h
${CMAKE_CURRENT_SOURCE_DIR}/flat_batch_buffer_helper_hw.inl
${CMAKE_CURRENT_SOURCE_DIR}/flush_specific_cache_helper.h
${CMAKE_CURRENT_SOURCE_DIR}/flush_stamp.cpp
${CMAKE_CURRENT_SOURCE_DIR}/flush_stamp.h
${CMAKE_CURRENT_SOURCE_DIR}/get_info.h

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@ -1,67 +0,0 @@
/*
* Copyright (C) 2022 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
*/
#pragma once
#include "shared/source/helpers/bit_helpers.h"
#include <cstdint>
namespace NEO {
namespace FlushSpecificCacheHelper {
static constexpr bool isDcFlushEnableSet(const int32_t flushSpecificCache) {
return isBitSet(flushSpecificCache, 0);
}
static constexpr bool isRenderTargetCacheFlushEnableSet(const int32_t flushSpecificCache) {
return isBitSet(flushSpecificCache, 1);
}
static constexpr bool isInstructionCacheInvalidateEnableSet(const int32_t flushSpecificCache) {
return isBitSet(flushSpecificCache, 2);
}
static constexpr bool isTextureCacheInvalidationEnableSet(const int32_t flushSpecificCache) {
return isBitSet(flushSpecificCache, 3);
}
static constexpr bool isPipeControlFlushEnableSet(const int32_t flushSpecificCache) {
return isBitSet(flushSpecificCache, 4);
}
static constexpr bool isVfCacheInvalidationEnableSet(const int32_t flushSpecificCache) {
return isBitSet(flushSpecificCache, 5);
}
static constexpr bool isConstantCacheInvalidationEnableSet(const int32_t flushSpecificCache) {
return isBitSet(flushSpecificCache, 6);
}
static constexpr bool isStateCacheInvalidationEnableSet(const int32_t flushSpecificCache) {
return isBitSet(flushSpecificCache, 7);
}
static constexpr bool isTlbInvalidationSet(const int32_t flushSpecificCache) {
return isBitSet(flushSpecificCache, 8);
}
static constexpr bool isHdcPipelineFlushSet(const int32_t flushSpecificCache) {
return isBitSet(flushSpecificCache, 9);
}
static constexpr bool isUnTypedDataPortCacheFlushSet(const int32_t flushSpecificCache) {
return isBitSet(flushSpecificCache, 10);
}
static constexpr bool isCompressionControlSurfaceCcsFlushSet(const int32_t flushSpecificCache) {
return isBitSet(flushSpecificCache, 11);
}
} // namespace FlushSpecificCacheHelper
} // namespace NEO

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@ -13,7 +13,6 @@
#include "shared/source/helpers/aligned_memory.h"
#include "shared/source/helpers/basic_math.h"
#include "shared/source/helpers/constants.h"
#include "shared/source/helpers/flush_specific_cache_helper.h"
#include "shared/source/helpers/hw_helper.h"
#include "shared/source/helpers/hw_info.h"
#include "shared/source/helpers/pipe_control_args.h"
@ -270,18 +269,16 @@ void MemorySynchronizationCommands<GfxFamily>::setSingleBarrier(void *commandsBu
return;
}
auto flushSpecificCaches = DebugManager.flags.FlushSpecificCache.get() > 0 ? DebugManager.flags.FlushSpecificCache.get() : 0;
pipeControl.setConstantCacheInvalidationEnable(args.constantCacheInvalidationEnable || FlushSpecificCacheHelper::isConstantCacheInvalidationEnableSet(flushSpecificCaches));
pipeControl.setInstructionCacheInvalidateEnable(args.instructionCacheInvalidateEnable || FlushSpecificCacheHelper::isInstructionCacheInvalidateEnableSet(flushSpecificCaches));
pipeControl.setPipeControlFlushEnable(args.pipeControlFlushEnable || FlushSpecificCacheHelper::isPipeControlFlushEnableSet(flushSpecificCaches));
pipeControl.setRenderTargetCacheFlushEnable(args.renderTargetCacheFlushEnable || FlushSpecificCacheHelper::isRenderTargetCacheFlushEnableSet(flushSpecificCaches));
pipeControl.setStateCacheInvalidationEnable(args.stateCacheInvalidationEnable || FlushSpecificCacheHelper::isStateCacheInvalidationEnableSet(flushSpecificCaches));
pipeControl.setTextureCacheInvalidationEnable(args.textureCacheInvalidationEnable || FlushSpecificCacheHelper::isTextureCacheInvalidationEnableSet(flushSpecificCaches));
pipeControl.setVfCacheInvalidationEnable(args.vfCacheInvalidationEnable || FlushSpecificCacheHelper::isVfCacheInvalidationEnableSet(flushSpecificCaches));
pipeControl.setTlbInvalidate(args.tlbInvalidation || FlushSpecificCacheHelper::isTlbInvalidationSet(flushSpecificCaches));
pipeControl.setConstantCacheInvalidationEnable(args.constantCacheInvalidationEnable);
pipeControl.setInstructionCacheInvalidateEnable(args.instructionCacheInvalidateEnable);
pipeControl.setPipeControlFlushEnable(args.pipeControlFlushEnable);
pipeControl.setRenderTargetCacheFlushEnable(args.renderTargetCacheFlushEnable);
pipeControl.setStateCacheInvalidationEnable(args.stateCacheInvalidationEnable);
pipeControl.setTextureCacheInvalidationEnable(args.textureCacheInvalidationEnable);
pipeControl.setVfCacheInvalidationEnable(args.vfCacheInvalidationEnable);
pipeControl.setTlbInvalidate(args.tlbInvalidation);
pipeControl.setNotifyEnable(args.notifyEnable);
pipeControl.setDcFlushEnable(args.dcFlushEnable || FlushSpecificCacheHelper::isDcFlushEnableSet(flushSpecificCaches));
pipeControl.setDcFlushEnable(args.dcFlushEnable);
pipeControl.setDepthCacheFlushEnable(args.depthCacheFlushEnable);
pipeControl.setDepthStallEnable(args.depthStallEnable);
pipeControl.setProtectedMemoryDisable(args.protectedMemoryDisable);

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@ -14,11 +14,10 @@ namespace NEO {
template <typename GfxFamily>
inline void MemorySynchronizationCommands<GfxFamily>::setBarrierExtraProperties(void *barrierCmd, PipeControlArgs &args) {
auto &pipeControl = *reinterpret_cast<typename GfxFamily::PIPE_CONTROL *>(barrierCmd);
auto flushSpecificCaches = DebugManager.flags.FlushSpecificCache.get() > 0 ? DebugManager.flags.FlushSpecificCache.get() : 0;
pipeControl.setHdcPipelineFlush(args.hdcPipelineFlush || FlushSpecificCacheHelper::isHdcPipelineFlushSet(flushSpecificCaches));
pipeControl.setUnTypedDataPortCacheFlush(args.unTypedDataPortCacheFlush || FlushSpecificCacheHelper::isUnTypedDataPortCacheFlushSet(flushSpecificCaches));
pipeControl.setCompressionControlSurfaceCcsFlush(args.compressionControlSurfaceCcsFlush || FlushSpecificCacheHelper::isCompressionControlSurfaceCcsFlushSet(flushSpecificCaches));
pipeControl.setHdcPipelineFlush(args.hdcPipelineFlush);
pipeControl.setUnTypedDataPortCacheFlush(args.unTypedDataPortCacheFlush);
pipeControl.setCompressionControlSurfaceCcsFlush(args.compressionControlSurfaceCcsFlush);
pipeControl.setWorkloadPartitionIdOffsetEnable(args.workloadPartitionOffset);
pipeControl.setAmfsFlushEnable(args.amfsFlushEnable);

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@ -113,10 +113,9 @@ void MemorySynchronizationCommands<Family>::setBarrierWaFlags(void *barrierCmd)
template <>
void MemorySynchronizationCommands<Family>::setBarrierExtraProperties(void *barrierCmd, PipeControlArgs &args) {
auto &pipeControl = *reinterpret_cast<typename Family::PIPE_CONTROL *>(barrierCmd);
auto flushSpecificCaches = DebugManager.flags.FlushSpecificCache.get() > 0 ? DebugManager.flags.FlushSpecificCache.get() : 0;
pipeControl.setHdcPipelineFlush(args.hdcPipelineFlush || FlushSpecificCacheHelper::isHdcPipelineFlushSet(flushSpecificCaches));
pipeControl.setCompressionControlSurfaceCcsFlush(args.compressionControlSurfaceCcsFlush || FlushSpecificCacheHelper::isCompressionControlSurfaceCcsFlushSet(flushSpecificCaches));
pipeControl.setHdcPipelineFlush(args.hdcPipelineFlush);
pipeControl.setCompressionControlSurfaceCcsFlush(args.compressionControlSurfaceCcsFlush);
pipeControl.setWorkloadPartitionIdOffsetEnable(args.workloadPartitionOffset);
pipeControl.setAmfsFlushEnable(args.amfsFlushEnable);

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@ -55,7 +55,6 @@ DoCpuCopyOnWriteBuffer = -1
PauseOnEnqueue = -1
EnableDebugBreak = 1
FlushAllCaches = 0
FlushSpecificCache = -1
MakeEachEnqueueBlocking = 0
DisableResourceRecycling = 0
TrackParentEvents = 0

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@ -66,8 +66,6 @@ using IsDG2 = IsProduct<IGFX_DG2>;
using IsPVC = IsProduct<IGFX_PVC>;
using IsXeHPOrAbove = IsAtLeastProduct<IGFX_XE_HP_SDV>;
using IsAtLeastSkl = IsAtLeastProduct<IGFX_SKYLAKE>;
using IsAtMostDg2 = IsAtMostProduct<IGFX_DG2>;

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@ -11,14 +11,12 @@
#include "shared/source/gmm_helper/gmm_helper.h"
#include "shared/source/gmm_helper/page_table_mngr.h"
#include "shared/source/helpers/api_specific_config.h"
#include "shared/source/helpers/flush_specific_cache_helper.h"
#include "shared/source/memory_manager/internal_allocation_storage.h"
#include "shared/source/memory_manager/surface.h"
#include "shared/source/os_interface/device_factory.h"
#include "shared/source/os_interface/hw_info_config.h"
#include "shared/source/os_interface/os_interface.h"
#include "shared/source/utilities/tag_allocator.h"
#include "shared/test/common/cmd_parse/hw_parse.h"
#include "shared/test/common/fixtures/command_stream_receiver_fixture.inl"
#include "shared/test/common/fixtures/device_fixture.h"
#include "shared/test/common/helpers/debug_manager_state_restore.h"
@ -2126,291 +2124,3 @@ using SystolicSupport = IsAnyProducts<IGFX_ALDERLAKE_P, IGFX_XE_HP_SDV, IGFX_DG2
HWTEST2_F(CommandStreamReceiverSystolicTests, givenSystolicModeChangedWhenFlushTaskCalledThenSystolicStateIsUpdated, SystolicSupport) {
testBody<FamilyType>();
}
struct CommandStreamReceiverFlushSpecificCacheHelperTest : public ::testing::Test {
template <typename FamilyType>
void programSingleBarrier() {
stream = std::make_unique<LinearStream>(buffer, sizeof(buffer));
MemorySynchronizationCommands<FamilyType>::addSingleBarrier(*stream, args);
csHwParser = std::make_unique<HardwareParse>();
csHwParser->parseCommands<FamilyType>(*stream, 0);
ASSERT_NE(nullptr, csHwParser);
}
DebugManagerStateRestore restore;
PipeControlArgs args;
uint8_t buffer[128]{};
std::unique_ptr<LinearStream> stream;
std::unique_ptr<HardwareParse> csHwParser;
};
HWTEST2_F(CommandStreamReceiverFlushSpecificCacheHelperTest, WhenFlushingSpecificCacheThenPipeControlWithProperFieldIsAdded, IsAtLeastSkl) {
using PIPE_CONTROL = typename FamilyType::PIPE_CONTROL;
using FlushSpecificCacheHelperCallMask = std::bitset<12>;
FlushSpecificCacheHelperCallMask helperMask[13] = {
0b000000000001,
0b000000000010,
0b000000000100,
0b000000001000,
0b000000010000,
0b000000100000,
0b000001000000,
0b000010000000,
0b000100000000,
0b001000000000,
0b010000000000,
0b100000000000,
0b000100100010,
};
for (auto &mask : helperMask) {
auto cacheIndexes = static_cast<int>(mask.to_ulong());
DebugManager.flags.FlushSpecificCache.set(cacheIndexes);
programSingleBarrier<FamilyType>();
auto pipeControls = findAll<PIPE_CONTROL *>(csHwParser->cmdList.begin(), csHwParser->cmdList.end());
auto pipeControl = genCmdCast<PIPE_CONTROL *>(*(pipeControls[0]));
ASSERT_NE(nullptr, pipeControl);
switch (cacheIndexes) {
case 0b000000000001:
EXPECT_TRUE(pipeControl->getDcFlushEnable());
break;
case 0b000000000010:
EXPECT_TRUE(pipeControl->getRenderTargetCacheFlushEnable());
break;
case 0b000000000100:
EXPECT_TRUE(pipeControl->getInstructionCacheInvalidateEnable());
break;
case 0b000000001000:
EXPECT_TRUE(pipeControl->getTextureCacheInvalidationEnable());
break;
case 0b000000010000:
EXPECT_TRUE(pipeControl->getPipeControlFlushEnable());
break;
case 0b000000100000:
EXPECT_TRUE(pipeControl->getVfCacheInvalidationEnable());
break;
case 0b000001000000:
EXPECT_TRUE(pipeControl->getConstantCacheInvalidationEnable());
break;
case 0b000010000000:
EXPECT_TRUE(pipeControl->getStateCacheInvalidationEnable());
break;
case 0b000100000000:
EXPECT_TRUE(pipeControl->getTlbInvalidate());
break;
case 0b000100100010:
EXPECT_FALSE(pipeControl->getDcFlushEnable());
EXPECT_TRUE(pipeControl->getRenderTargetCacheFlushEnable());
EXPECT_FALSE(pipeControl->getInstructionCacheInvalidateEnable());
EXPECT_FALSE(pipeControl->getTextureCacheInvalidationEnable());
EXPECT_FALSE(pipeControl->getPipeControlFlushEnable());
EXPECT_TRUE(pipeControl->getVfCacheInvalidationEnable());
EXPECT_FALSE(pipeControl->getConstantCacheInvalidationEnable());
EXPECT_FALSE(pipeControl->getStateCacheInvalidationEnable());
EXPECT_TRUE(pipeControl->getTlbInvalidate());
break;
}
}
}
HWTEST_F(CommandStreamReceiverFlushSpecificCacheHelperTest, WhenFlushingSpecificCacheWithAllCachesThenPipeControlWithProperFieldsIsAdded) {
using PIPE_CONTROL = typename FamilyType::PIPE_CONTROL;
constexpr size_t flushSpecificCacheMaskSize = 12u;
// constantCacheInvalidationEnable
// textureCacheInvalidationEnable
// vfCacheInvalidationEnable set for FlushSpecificCache = 0b001101000
std::bitset<flushSpecificCacheMaskSize> cacheIndexes = 0b001101000;
DebugManager.flags.FlushSpecificCache.set(static_cast<int>(cacheIndexes.to_ulong()));
args.dcFlushEnable = 1;
args.renderTargetCacheFlushEnable = 1;
args.instructionCacheInvalidateEnable = 1;
args.textureCacheInvalidationEnable = 1;
args.pipeControlFlushEnable = 1;
args.vfCacheInvalidationEnable = 1;
args.constantCacheInvalidationEnable = 1;
args.stateCacheInvalidationEnable = 1;
args.tlbInvalidation = 1;
programSingleBarrier<FamilyType>();
auto pipeControls = findAll<PIPE_CONTROL *>(csHwParser->cmdList.begin(), csHwParser->cmdList.end());
auto pipeControl = genCmdCast<PIPE_CONTROL *>(*(pipeControls[0]));
ASSERT_NE(nullptr, pipeControl);
EXPECT_TRUE(pipeControl->getDcFlushEnable());
EXPECT_TRUE(pipeControl->getRenderTargetCacheFlushEnable());
EXPECT_TRUE(pipeControl->getInstructionCacheInvalidateEnable());
EXPECT_TRUE(pipeControl->getTextureCacheInvalidationEnable());
EXPECT_TRUE(pipeControl->getPipeControlFlushEnable());
EXPECT_TRUE(pipeControl->getVfCacheInvalidationEnable());
EXPECT_TRUE(pipeControl->getConstantCacheInvalidationEnable());
EXPECT_TRUE(pipeControl->getStateCacheInvalidationEnable());
EXPECT_TRUE(pipeControl->getTlbInvalidate());
}
HWTEST2_F(CommandStreamReceiverFlushSpecificCacheHelperTest, givenDebugEnablingFlushSpecificCacheWhenAddingPipeControlWithoutCacheFlushThenOverrideRequestAndEnableFlushSpecificCacheFlags, IsGen12LP) {
using PIPE_CONTROL = typename FamilyType::PIPE_CONTROL;
constexpr size_t flushSpecificCacheMaskSize = 12u;
// hdcPipelineFlushSet set for FlushSpecificCache = 0b001000000000
std::bitset<flushSpecificCacheMaskSize> cacheIndexes = 0b001000000000;
DebugManager.flags.FlushSpecificCache.set(static_cast<int>(cacheIndexes.to_ulong()));
programSingleBarrier<FamilyType>();
auto pipeControls = findAll<PIPE_CONTROL *>(csHwParser->cmdList.begin(), csHwParser->cmdList.end());
auto pipeControl = genCmdCast<PIPE_CONTROL *>(*(pipeControls[0]));
ASSERT_NE(nullptr, pipeControl);
EXPECT_TRUE(pipeControl->getHdcPipelineFlush());
}
HWTEST2_F(CommandStreamReceiverFlushSpecificCacheHelperTest, givenDebugEnablingFlushSpecificCacheWithAllCachesWhenAddingPipeControlThenProperFieldsAreAdded, IsGen12LP) {
using PIPE_CONTROL = typename FamilyType::PIPE_CONTROL;
constexpr size_t flushSpecificCacheMaskSize = 12u;
// hdcPipelineFlushSet set for FlushSpecificCache = 0b001000000000
std::bitset<flushSpecificCacheMaskSize> cacheIndexes = 0b001000000000;
DebugManager.flags.FlushSpecificCache.set(static_cast<int>(cacheIndexes.to_ulong()));
args.hdcPipelineFlush = 1;
programSingleBarrier<FamilyType>();
auto pipeControls = findAll<PIPE_CONTROL *>(csHwParser->cmdList.begin(), csHwParser->cmdList.end());
auto pipeControl = genCmdCast<PIPE_CONTROL *>(*(pipeControls[0]));
ASSERT_NE(nullptr, pipeControl);
EXPECT_TRUE(pipeControl->getHdcPipelineFlush());
}
using CommandStreamReceiverFlushTaskXeHPAndLaterTests = CommandStreamReceiverFlushSpecificCacheHelperTest;
HWTEST2_F(CommandStreamReceiverFlushTaskXeHPAndLaterTests, WhenFlushingSpecificCacheVariableIsSetAndAddPipeControlIsCalledThenFieldsAreProperlySet, IsXeHPOrAbove) {
using PIPE_CONTROL = typename FamilyType::PIPE_CONTROL;
constexpr size_t flushSpecificCacheMaskSize = 12u;
// hdcPipelineFlushSet
// compressionControlSurfaceCcsFlushSet set for FlushSpecificCache = 0b101000000000
std::bitset<flushSpecificCacheMaskSize> cacheIndexes = 0b101000000000;
DebugManager.flags.FlushSpecificCache.set(static_cast<int>(cacheIndexes.to_ulong()));
programSingleBarrier<FamilyType>();
auto pipeControls = findAll<PIPE_CONTROL *>(csHwParser->cmdList.begin(), csHwParser->cmdList.end());
auto pipeControl = genCmdCast<PIPE_CONTROL *>(*(pipeControls[0]));
ASSERT_NE(nullptr, pipeControl);
EXPECT_TRUE(UnitTestHelper<FamilyType>::getPipeControlHdcPipelineFlush(*pipeControl));
EXPECT_TRUE(pipeControl->getCompressionControlSurfaceCcsFlush());
}
HWTEST2_F(CommandStreamReceiverFlushTaskXeHPAndLaterTests, WhenFlushingSpecificCacheWithAllCachesAndAddPipeControlIsCalledThenFieldsAreProperlySet, IsXeHPOrAbove) {
using PIPE_CONTROL = typename FamilyType::PIPE_CONTROL;
constexpr size_t flushSpecificCacheMaskSize = 12u;
// hdcPipelineFlushSet
// compressionControlSurfaceCcsFlushSet set for FlushSpecificCache = 0b101000000000
std::bitset<flushSpecificCacheMaskSize> cacheIndexes = 0b101000000000;
DebugManager.flags.FlushSpecificCache.set(static_cast<int>(cacheIndexes.to_ulong()));
args.hdcPipelineFlush = 1;
args.compressionControlSurfaceCcsFlush = 1;
programSingleBarrier<FamilyType>();
auto pipeControls = findAll<PIPE_CONTROL *>(csHwParser->cmdList.begin(), csHwParser->cmdList.end());
auto pipeControl = genCmdCast<PIPE_CONTROL *>(*(pipeControls[0]));
ASSERT_NE(nullptr, pipeControl);
EXPECT_TRUE(UnitTestHelper<FamilyType>::getPipeControlHdcPipelineFlush(*pipeControl));
EXPECT_TRUE(pipeControl->getCompressionControlSurfaceCcsFlush());
}
HWTEST2_F(CommandStreamReceiverFlushSpecificCacheHelperTest, givenDebugVariableFlushSpecificCacheSetWhenProgrammingPipeControlThenFlushSpecificCacheAreSet, IsAtLeastXeHpgCore) {
using PIPE_CONTROL = typename FamilyType::PIPE_CONTROL;
using FlushSpecificCacheHelperCallMask = std::bitset<12>;
FlushSpecificCacheHelperCallMask helperMask[4] = {
0b001000000000,
0b010000000000,
0b100000000000,
0b100001100000,
};
for (auto &mask : helperMask) {
auto cacheIndexes = static_cast<int>(mask.to_ulong());
DebugManager.flags.FlushSpecificCache.set(cacheIndexes);
programSingleBarrier<FamilyType>();
auto pipeControls = findAll<PIPE_CONTROL *>(csHwParser->cmdList.begin(), csHwParser->cmdList.end());
auto pipeControl = genCmdCast<PIPE_CONTROL *>(*(pipeControls[0]));
ASSERT_NE(nullptr, pipeControl);
switch (cacheIndexes) {
case 0b001000000000:
EXPECT_TRUE(UnitTestHelper<FamilyType>::getPipeControlHdcPipelineFlush(*pipeControl));
break;
case 0b010000000000:
EXPECT_TRUE(pipeControl->getUnTypedDataPortCacheFlush());
break;
case 0b100000000000:
EXPECT_TRUE(pipeControl->getCompressionControlSurfaceCcsFlush());
break;
case 0b100001100000:
EXPECT_FALSE(pipeControl->getDcFlushEnable());
EXPECT_FALSE(pipeControl->getRenderTargetCacheFlushEnable());
EXPECT_FALSE(pipeControl->getInstructionCacheInvalidateEnable());
EXPECT_FALSE(pipeControl->getTextureCacheInvalidationEnable());
EXPECT_FALSE(pipeControl->getPipeControlFlushEnable());
EXPECT_TRUE(pipeControl->getVfCacheInvalidationEnable());
EXPECT_TRUE(pipeControl->getConstantCacheInvalidationEnable());
EXPECT_FALSE(pipeControl->getStateCacheInvalidationEnable());
EXPECT_FALSE(pipeControl->getTlbInvalidate());
EXPECT_FALSE(UnitTestHelper<FamilyType>::getPipeControlHdcPipelineFlush(*pipeControl));
EXPECT_FALSE(pipeControl->getUnTypedDataPortCacheFlush());
EXPECT_TRUE(pipeControl->getCompressionControlSurfaceCcsFlush());
break;
}
}
}
HWTEST2_F(CommandStreamReceiverFlushSpecificCacheHelperTest, givenDebugVariablesFlushSpecificCacheAndFlushAllCachesWhenProgrammingPipeControlThenAllFlushCachesAreSet, IsAtLeastXeHpgCore) {
using PIPE_CONTROL = typename FamilyType::PIPE_CONTROL;
constexpr size_t flushSpecificCacheMaskSize = 12u;
// constantCacheInvalidationEnable
// vfCacheInvalidationEnable
// compressionControlSurfaceCcsFlush set for FlushSpecificCache = 0b100001100000
std::bitset<flushSpecificCacheMaskSize> cacheIndexes = 0b100001100000;
DebugManager.flags.FlushSpecificCache.set(static_cast<int>(cacheIndexes.to_ulong()));
args.hdcPipelineFlush = 1;
args.unTypedDataPortCacheFlush = 1;
args.compressionControlSurfaceCcsFlush = 1;
programSingleBarrier<FamilyType>();
auto pipeControls = findAll<PIPE_CONTROL *>(csHwParser->cmdList.begin(), csHwParser->cmdList.end());
auto pipeControl = genCmdCast<PIPE_CONTROL *>(*(pipeControls[0]));
ASSERT_NE(nullptr, pipeControl);
EXPECT_TRUE(UnitTestHelper<FamilyType>::getPipeControlHdcPipelineFlush(*pipeControl));
EXPECT_TRUE(pipeControl->getUnTypedDataPortCacheFlush());
EXPECT_TRUE(pipeControl->getCompressionControlSurfaceCcsFlush());
}

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@ -23,7 +23,6 @@ target_sources(neo_shared_tests PRIVATE
${CMAKE_CURRENT_SOURCE_DIR}/extendable_enum_tests.cpp
${CMAKE_CURRENT_SOURCE_DIR}/file_io_tests.cpp
${CMAKE_CURRENT_SOURCE_DIR}/flush_stamp_tests.cpp
${CMAKE_CURRENT_SOURCE_DIR}/flush_specific_cache_helper_tests.cpp
${CMAKE_CURRENT_SOURCE_DIR}/get_gpgpu_engines_tests.inl
${CMAKE_CURRENT_SOURCE_DIR}/get_info_tests.cpp
${CMAKE_CURRENT_SOURCE_DIR}/hash_tests.cpp

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@ -1,73 +0,0 @@
/*
* Copyright (C) 2022 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
*/
#include "shared/source/helpers/flush_specific_cache_helper.h"
#include "gtest/gtest.h"
#include <bitset>
using namespace NEO;
TEST(FlushSpecificCacheHelperTests, WhenSettingFlushSpecificCachesIndexThenCorrectResultIsReturned) {
static constexpr size_t flushSpecificCacheMaskSize = 12u;
std::bitset<flushSpecificCacheMaskSize> flushSpecificCaches = 0b000000000001;
EXPECT_TRUE(FlushSpecificCacheHelper::isDcFlushEnableSet(static_cast<int>(flushSpecificCaches.to_ulong())));
flushSpecificCaches = 0b000000000010;
EXPECT_TRUE(FlushSpecificCacheHelper::isRenderTargetCacheFlushEnableSet(static_cast<int>(flushSpecificCaches.to_ulong())));
flushSpecificCaches = 0b000000000100;
EXPECT_TRUE(FlushSpecificCacheHelper::isInstructionCacheInvalidateEnableSet(static_cast<int>(flushSpecificCaches.to_ulong())));
flushSpecificCaches = 0b000000001000;
EXPECT_TRUE(FlushSpecificCacheHelper::isTextureCacheInvalidationEnableSet(static_cast<int>(flushSpecificCaches.to_ulong())));
flushSpecificCaches = 0b000000010000;
EXPECT_TRUE(FlushSpecificCacheHelper::isPipeControlFlushEnableSet(static_cast<int>(flushSpecificCaches.to_ulong())));
flushSpecificCaches = 0b000000100000;
EXPECT_TRUE(FlushSpecificCacheHelper::isVfCacheInvalidationEnableSet(static_cast<int>(flushSpecificCaches.to_ulong())));
flushSpecificCaches = 0b000001000000;
EXPECT_TRUE(FlushSpecificCacheHelper::isConstantCacheInvalidationEnableSet(static_cast<int>(flushSpecificCaches.to_ulong())));
flushSpecificCaches = 0b000010000000;
EXPECT_TRUE(FlushSpecificCacheHelper::isStateCacheInvalidationEnableSet(static_cast<int>(flushSpecificCaches.to_ulong())));
flushSpecificCaches = 0b000100000000;
EXPECT_TRUE(FlushSpecificCacheHelper::isTlbInvalidationSet(static_cast<int>(flushSpecificCaches.to_ulong())));
flushSpecificCaches = 0b001000000000;
EXPECT_TRUE(FlushSpecificCacheHelper::isHdcPipelineFlushSet(static_cast<int>(flushSpecificCaches.to_ulong())));
flushSpecificCaches = 0b010000000000;
EXPECT_TRUE(FlushSpecificCacheHelper::isUnTypedDataPortCacheFlushSet(static_cast<int>(flushSpecificCaches.to_ulong())));
flushSpecificCaches = 0b100000000000;
EXPECT_TRUE(FlushSpecificCacheHelper::isCompressionControlSurfaceCcsFlushSet(static_cast<int>(flushSpecificCaches.to_ulong())));
}
TEST(FlushSpecificCacheHelperTests, WhenSettingFlushSpecificCachesIndexesThenCorrectResultIsReturned) {
static constexpr size_t flushSpecificCacheMaskSize = 12u;
std::bitset<flushSpecificCacheMaskSize> flushSpecificCaches = 0b100000001011;
EXPECT_TRUE(FlushSpecificCacheHelper::isDcFlushEnableSet(static_cast<int>(flushSpecificCaches.to_ulong())));
EXPECT_TRUE(FlushSpecificCacheHelper::isRenderTargetCacheFlushEnableSet(static_cast<int>(flushSpecificCaches.to_ulong())));
EXPECT_FALSE(FlushSpecificCacheHelper::isInstructionCacheInvalidateEnableSet(static_cast<int>(flushSpecificCaches.to_ulong())));
EXPECT_TRUE(FlushSpecificCacheHelper::isTextureCacheInvalidationEnableSet(static_cast<int>(flushSpecificCaches.to_ulong())));
EXPECT_FALSE(FlushSpecificCacheHelper::isPipeControlFlushEnableSet(static_cast<int>(flushSpecificCaches.to_ulong())));
EXPECT_FALSE(FlushSpecificCacheHelper::isVfCacheInvalidationEnableSet(static_cast<int>(flushSpecificCaches.to_ulong())));
EXPECT_FALSE(FlushSpecificCacheHelper::isConstantCacheInvalidationEnableSet(static_cast<int>(flushSpecificCaches.to_ulong())));
EXPECT_FALSE(FlushSpecificCacheHelper::isStateCacheInvalidationEnableSet(static_cast<int>(flushSpecificCaches.to_ulong())));
EXPECT_FALSE(FlushSpecificCacheHelper::isTlbInvalidationSet(static_cast<int>(flushSpecificCaches.to_ulong())));
EXPECT_FALSE(FlushSpecificCacheHelper::isHdcPipelineFlushSet(static_cast<int>(flushSpecificCaches.to_ulong())));
EXPECT_FALSE(FlushSpecificCacheHelper::isUnTypedDataPortCacheFlushSet(static_cast<int>(flushSpecificCaches.to_ulong())));
EXPECT_TRUE(FlushSpecificCacheHelper::isCompressionControlSurfaceCcsFlushSet(static_cast<int>(flushSpecificCaches.to_ulong())));
}

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@ -1092,6 +1092,8 @@ HWTEST2_F(BlitTests, givenMemorySizeTwiceBiggerThanMaxWidthWhenFillPatternWithBl
}
}
using IsXeHPOrAbove = IsAtLeastProduct<IGFX_XE_HP_SDV>;
HWTEST2_F(BlitTests, givenEnabledGlobalCacheInvalidationWhenProgrammingGlobalSequencerFlushThenCommandsAreProgrammed, IsXeHPOrAbove) {
using MI_LOAD_REGISTER_IMM = typename FamilyType::MI_LOAD_REGISTER_IMM;
using MI_SEMAPHORE_WAIT = typename FamilyType::MI_SEMAPHORE_WAIT;