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build: update eudebug headers

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Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
This commit is contained in:
Mateusz Jablonski
2024-11-21 12:33:14 +00:00
committed by Compute-Runtime-Automation
parent 5f2dd41f8e
commit ec37a4f3b1
5 changed files with 100 additions and 39 deletions
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2
third_party/uapi-eudebug/drm/.version vendored
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@ -1,3 +1,3 @@
git_url: https://gitlab.freedesktop.org/miku/kernel/-/tree/eudebug-dev
git_revision: 84870d2970d06861d490470d74a60d92b058d6b1
git_revision: 0f42548c4fae7021f002867fc0faa2cff8fde7d8

59
third_party/uapi-eudebug/drm/drm.h vendored
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@ -35,13 +35,7 @@
#ifndef _DRM_H_
#define _DRM_H_
#if defined(__KERNEL__)
#include <linux/types.h>
#include <asm/ioctl.h>
typedef unsigned int drm_handle_t;
#elif defined(__linux__)
#if defined(__linux__)
#include <linux/types.h>
#include <asm/ioctl.h>
@ -141,11 +135,11 @@ struct drm_version {
int version_minor; /**< Minor version */
int version_patchlevel; /**< Patch level */
__kernel_size_t name_len; /**< Length of name buffer */
char __user *name; /**< Name of driver */
char *name; /**< Name of driver */
__kernel_size_t date_len; /**< Length of date buffer */
char __user *date; /**< User-space buffer to hold date */
char *date; /**< User-space buffer to hold date */
__kernel_size_t desc_len; /**< Length of desc buffer */
char __user *desc; /**< User-space buffer to hold desc */
char *desc; /**< User-space buffer to hold desc */
};
/*
@ -155,12 +149,12 @@ struct drm_version {
*/
struct drm_unique {
__kernel_size_t unique_len; /**< Length of unique */
char __user *unique; /**< Unique name for driver instantiation */
char *unique; /**< Unique name for driver instantiation */
};
struct drm_list {
int count; /**< Length of user-space structures */
struct drm_version __user *version;
struct drm_version *version;
};
struct drm_block {
@ -355,7 +349,7 @@ struct drm_buf_desc {
*/
struct drm_buf_info {
int count; /**< Entries in list */
struct drm_buf_desc __user *list;
struct drm_buf_desc *list;
};
/*
@ -363,7 +357,7 @@ struct drm_buf_info {
*/
struct drm_buf_free {
int count;
int __user *list;
int *list;
};
/*
@ -375,7 +369,7 @@ struct drm_buf_pub {
int idx; /**< Index into the master buffer list */
int total; /**< Buffer size */
int used; /**< Amount of buffer in use (for DMA) */
void __user *address; /**< Address of buffer */
void *address; /**< Address of buffer */
};
/*
@ -384,11 +378,11 @@ struct drm_buf_pub {
struct drm_buf_map {
int count; /**< Length of the buffer list */
#ifdef __cplusplus
void __user *virt;
void *virt;
#else
void __user *virtual; /**< Mmap'd area in user-virtual */
void *virtual; /**< Mmap'd area in user-virtual */
#endif
struct drm_buf_pub __user *list; /**< Buffer information */
struct drm_buf_pub *list; /**< Buffer information */
};
/*
@ -401,13 +395,13 @@ struct drm_buf_map {
struct drm_dma {
int context; /**< Context handle */
int send_count; /**< Number of buffers to send */
int __user *send_indices; /**< List of handles to buffers */
int __user *send_sizes; /**< Lengths of data to send */
int *send_indices; /**< List of handles to buffers */
int *send_sizes; /**< Lengths of data to send */
enum drm_dma_flags flags; /**< Flags */
int request_count; /**< Number of buffers requested */
int request_size; /**< Desired size for buffers */
int __user *request_indices; /**< Buffer information */
int __user *request_sizes;
int *request_indices; /**< Buffer information */
int *request_sizes;
int granted_count; /**< Number of buffers granted */
};
@ -431,7 +425,7 @@ struct drm_ctx {
*/
struct drm_ctx_res {
int count;
struct drm_ctx __user *contexts;
struct drm_ctx *contexts;
};
/*
@ -1024,6 +1018,13 @@ struct drm_crtc_queue_sequence {
__u64 user_data; /* user data passed to event */
};
#define DRM_CLIENT_NAME_MAX_LEN 64
struct drm_set_client_name {
__u64 name_len;
__u64 name;
};
#if defined(__cplusplus)
}
#endif
@ -1288,6 +1289,16 @@ extern "C" {
*/
#define DRM_IOCTL_MODE_CLOSEFB DRM_IOWR(0xD0, struct drm_mode_closefb)
/**
* DRM_IOCTL_SET_CLIENT_NAME - Attach a name to a drm_file
*
* Having a name allows for easier tracking and debugging.
* The length of the name (without null ending char) must be
* <= DRM_CLIENT_NAME_MAX_LEN.
* The call will fail if the name contains whitespaces or non-printable chars.
*/
#define DRM_IOCTL_SET_CLIENT_NAME DRM_IOWR(0xD1, struct drm_set_client_name)
/*
* Device specific ioctls should only be in their respective headers
* The device specific ioctl range is from 0x40 to 0x9f.
@ -1365,7 +1376,6 @@ struct drm_event_crtc_sequence {
};
/* typedef area */
#ifndef __KERNEL__
typedef struct drm_clip_rect drm_clip_rect_t;
typedef struct drm_drawable_info drm_drawable_info_t;
typedef struct drm_tex_region drm_tex_region_t;
@ -1407,7 +1417,6 @@ typedef struct drm_agp_binding drm_agp_binding_t;
typedef struct drm_agp_info drm_agp_info_t;
typedef struct drm_scatter_gather drm_scatter_gather_t;
typedef struct drm_set_version drm_set_version_t;
#endif
#if defined(__cplusplus)
}

2
third_party/uapi-eudebug/drm/drm_mode.h vendored
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@ -859,6 +859,8 @@ struct drm_color_lut {
/**
* struct drm_plane_size_hint - Plane size hints
* @width: The width of the plane in pixel
* @height: The height of the plane in pixel
*
* The plane SIZE_HINTS property blob contains an
* array of struct drm_plane_size_hint.

29
third_party/uapi-eudebug/drm/xe_drm.h vendored
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@ -3,8 +3,8 @@
* Copyright © 2023 Intel Corporation
*/
#ifndef _UAPI_XE_DRM_H_
#define _UAPI_XE_DRM_H_
#ifndef _XE_DRM_H_
#define _XE_DRM_H_
#include "drm.h"
@ -139,7 +139,7 @@ extern "C" {
* redefine the interface more easily than an ever growing struct of
* increasing complexity, and for large parts of that interface to be
* entirely optional. The downside is more pointer chasing; chasing across
* the __user boundary with pointers encapsulated inside u64.
* the boundary with pointers encapsulated inside u64.
*
* Example chaining:
*
@ -517,7 +517,9 @@ struct drm_xe_query_gt_list {
* containing the following in mask:
* ``DSS_COMPUTE ff ff ff ff 00 00 00 00``
* means 32 DSS are available for compute.
* - %DRM_XE_TOPO_L3_BANK - To query the mask of enabled L3 banks
* - %DRM_XE_TOPO_L3_BANK - To query the mask of enabled L3 banks. This type
* may be omitted if the driver is unable to query the mask from the
* hardware.
* - %DRM_XE_TOPO_EU_PER_DSS - To query the mask of Execution Units (EU)
* available per Dual Sub Slices (DSS). For example a query response
* containing the following in mask:
@ -1508,6 +1510,7 @@ struct drm_xe_oa_unit {
/** @capabilities: OA capabilities bit-mask */
__u64 capabilities;
#define DRM_XE_OA_CAPS_BASE (1 << 0)
#define DRM_XE_OA_CAPS_SYNCS (1 << 1)
/** @oa_timestamp_freq: OA timestamp freq */
__u64 oa_timestamp_freq;
@ -1657,6 +1660,22 @@ enum drm_xe_oa_property_id {
* to be disabled for the stream exec queue.
*/
DRM_XE_OA_PROPERTY_NO_PREEMPT,
/**
* @DRM_XE_OA_PROPERTY_NUM_SYNCS: Number of syncs in the sync array
* specified in @DRM_XE_OA_PROPERTY_SYNCS
*/
DRM_XE_OA_PROPERTY_NUM_SYNCS,
/**
* @DRM_XE_OA_PROPERTY_SYNCS: Pointer to struct @drm_xe_sync array
* with array size specified via @DRM_XE_OA_PROPERTY_NUM_SYNCS. OA
* configuration will wait till input fences signal. Output fences
* will signal after the new OA configuration takes effect. For
* @DRM_XE_SYNC_TYPE_USER_FENCE, @addr is a user pointer, similar
* to the VM bind case.
*/
DRM_XE_OA_PROPERTY_SYNCS,
};
/**
@ -1790,4 +1809,4 @@ struct drm_xe_debug_metadata_destroy {
}
#endif
#endif /* _UAPI_XE_DRM_H_ */
#endif /* _XE_DRM_H_ */

47
third_party/uapi-eudebug/drm/xe_drm_eudebug.h vendored
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@ -3,8 +3,8 @@
* Copyright © 2023 Intel Corporation
*/
#ifndef _UAPI_XE_DRM_EUDEBUG_H_
#define _UAPI_XE_DRM_EUDEBUG_H_
#ifndef _XE_DRM_EUDEBUG_H_
#define _XE_DRM_EUDEBUG_H_
#if defined(__cplusplus)
extern "C" {
@ -31,12 +31,14 @@ struct drm_xe_eudebug_event {
#define DRM_XE_EUDEBUG_EVENT_OPEN 2
#define DRM_XE_EUDEBUG_EVENT_VM 3
#define DRM_XE_EUDEBUG_EVENT_EXEC_QUEUE 4
#define DRM_XE_EUDEBUG_EVENT_EU_ATTENTION 5
#define DRM_XE_EUDEBUG_EVENT_VM_BIND 6
#define DRM_XE_EUDEBUG_EVENT_VM_BIND_OP 7
#define DRM_XE_EUDEBUG_EVENT_VM_BIND_UFENCE 8
#define DRM_XE_EUDEBUG_EVENT_METADATA 9
#define DRM_XE_EUDEBUG_EVENT_VM_BIND_OP_METADATA 10
#define DRM_XE_EUDEBUG_EVENT_EXEC_QUEUE_PLACEMENTS 5
#define DRM_XE_EUDEBUG_EVENT_EU_ATTENTION 6
#define DRM_XE_EUDEBUG_EVENT_VM_BIND 7
#define DRM_XE_EUDEBUG_EVENT_VM_BIND_OP 8
#define DRM_XE_EUDEBUG_EVENT_VM_BIND_UFENCE 9
#define DRM_XE_EUDEBUG_EVENT_METADATA 10
#define DRM_XE_EUDEBUG_EVENT_VM_BIND_OP_METADATA 11
#define DRM_XE_EUDEBUG_EVENT_PAGEFAULT 12
__u16 flags;
#define DRM_XE_EUDEBUG_EVENT_CREATE (1 << 0)
@ -72,6 +74,22 @@ struct drm_xe_eudebug_event_exec_queue {
__u64 lrc_handle[];
};
struct drm_xe_eudebug_event_exec_queue_placements {
struct drm_xe_eudebug_event base;
__u64 client_handle;
__u64 vm_handle;
__u64 exec_queue_handle;
__u64 lrc_handle;
__u32 num_placements;
__u32 pad;
/**
* @instances: user pointer to num_placements sized array of struct
* drm_xe_engine_class_instance
*/
__u64 instances[];
};
struct drm_xe_eudebug_event_eu_attention {
struct drm_xe_eudebug_event base;
@ -187,6 +205,7 @@ struct drm_xe_eudebug_vm_open {
/** @flags: flags */
__u64 flags;
#define DRM_XE_EUDEBUG_VM_SYNC_MAX_TIMEOUT_NSECS (10ULL * NSEC_PER_SEC)
/** @timeout_ns: Timeout value in nanoseconds operations (fsync) */
__u64 timeout_ns;
};
@ -218,6 +237,18 @@ struct drm_xe_eudebug_event_vm_bind_op_metadata {
__u64 metadata_cookie;
};
struct drm_xe_eudebug_event_pagefault {
struct drm_xe_eudebug_event base;
__u64 client_handle;
__u64 exec_queue_handle;
__u64 lrc_handle;
__u32 flags;
__u32 bitmask_size;
__u64 pagefault_address;
__u8 bitmask[];
};
#if defined(__cplusplus)
}
#endif