mirror of
https://github.com/intel/compute-runtime.git
synced 2025-09-15 13:01:45 +08:00
Remove default parameters from setArgSvm function.
Change-Id: I4408ddedfca464d56e24c4daa0c8c7b73791d6a0
This commit is contained in:

committed by
sys_ocldev

parent
c0d4122c26
commit
f6ceb8fb4f
@ -250,7 +250,7 @@ class BuiltInOp<HWFamily, EBuiltInOps::CopyBufferToBuffer> : public BuiltinDispa
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} else if (operationParams.dstMemObj) {
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kernelSplit1DBuilder.setArg(1, operationParams.dstMemObj);
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} else {
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kernelSplit1DBuilder.setArgSvm(1, operationParams.size.x + operationParams.dstOffset.x, operationParams.dstPtr);
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kernelSplit1DBuilder.setArgSvm(1, operationParams.size.x + operationParams.dstOffset.x, operationParams.dstPtr, nullptr, 0u);
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}
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// Set-up srcOffset
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@ -325,14 +325,14 @@ class BuiltInOp<HWFamily, EBuiltInOps::CopyBufferRect> : public BuiltinDispatchI
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if (operationParams.srcMemObj) {
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kernelNoSplit3DBuilder.setArg(0, operationParams.srcMemObj);
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} else {
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kernelNoSplit3DBuilder.setArgSvm(0, hostPtrSize, is3D ? operationParams.srcPtr : ptrOffset(operationParams.srcPtr, operationParams.srcOffset.z * operationParams.srcSlicePitch));
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kernelNoSplit3DBuilder.setArgSvm(0, hostPtrSize, is3D ? operationParams.srcPtr : ptrOffset(operationParams.srcPtr, operationParams.srcOffset.z * operationParams.srcSlicePitch), nullptr, CL_MEM_READ_ONLY);
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}
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// arg1 = dst
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if (operationParams.dstMemObj) {
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kernelNoSplit3DBuilder.setArg(1, operationParams.dstMemObj);
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} else {
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kernelNoSplit3DBuilder.setArgSvm(1, hostPtrSize, is3D ? operationParams.dstPtr : ptrOffset(operationParams.dstPtr, operationParams.dstOffset.z * operationParams.dstSlicePitch));
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kernelNoSplit3DBuilder.setArgSvm(1, hostPtrSize, is3D ? operationParams.dstPtr : ptrOffset(operationParams.dstPtr, operationParams.dstOffset.z * operationParams.dstSlicePitch), nullptr, 0u);
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}
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// arg2 = srcOrigin
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@ -415,7 +415,7 @@ class BuiltInOp<HWFamily, EBuiltInOps::FillBuffer> : public BuiltinDispatchInfoB
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kernelSplit1DBuilder.setArg(SplitDispatch::RegionCoordX::Right, 1, static_cast<uint32_t>(operationParams.dstOffset.x + leftSize + middleSizeBytes));
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// Set-up srcMemObj with pattern
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kernelSplit1DBuilder.setArgSvm(2, operationParams.srcMemObj->getSize(), operationParams.srcMemObj->getGraphicsAllocation()->getUnderlyingBuffer(), operationParams.srcMemObj->getGraphicsAllocation());
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kernelSplit1DBuilder.setArgSvm(2, operationParams.srcMemObj->getSize(), operationParams.srcMemObj->getGraphicsAllocation()->getUnderlyingBuffer(), operationParams.srcMemObj->getGraphicsAllocation(), CL_MEM_READ_ONLY);
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// Set-up patternSizeInEls
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kernelSplit1DBuilder.setArg(SplitDispatch::RegionCoordX::Left, 3, static_cast<uint32_t>(operationParams.srcMemObj->getSize()));
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@ -485,7 +485,7 @@ class BuiltInOp<HWFamily, EBuiltInOps::CopyBufferToImage3d> : public BuiltinDisp
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// Set-up source host ptr / buffer
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if (operationParams.srcPtr) {
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kernelNoSplit3DBuilder.setArgSvm(0, hostPtrSize, operationParams.srcPtr);
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kernelNoSplit3DBuilder.setArgSvm(0, hostPtrSize, operationParams.srcPtr, nullptr, CL_MEM_READ_ONLY);
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} else {
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kernelNoSplit3DBuilder.setArg(0, operationParams.srcMemObj);
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}
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@ -575,7 +575,7 @@ class BuiltInOp<HWFamily, EBuiltInOps::CopyImage3dToBuffer> : public BuiltinDisp
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// Set-up destination host ptr / buffer
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if (operationParams.dstPtr) {
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kernelNoSplit3DBuilder.setArgSvm(1, hostPtrSize, operationParams.dstPtr);
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kernelNoSplit3DBuilder.setArgSvm(1, hostPtrSize, operationParams.dstPtr, nullptr, 0u);
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} else {
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kernelNoSplit3DBuilder.setArg(1, operationParams.dstMemObj);
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}
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@ -1,5 +1,5 @@
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/*
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* Copyright (C) 2018 Intel Corporation
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* Copyright (C) 2018-2019 Intel Corporation
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*
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* SPDX-License-Identifier: MIT
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*
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@ -38,11 +38,11 @@ bool BuiltInOp<HWFamily, EBuiltInOps::AuxTranslation>::buildDispatchInfos(MultiD
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if (AuxTranslationDirection::AuxToNonAux == operationParams.auxTranslationDirection) {
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builder.setKernel(convertToNonAuxKernel.at(kernelInstanceNumber++).get());
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builder.setArg(0, memObj);
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builder.setArgSvm(1, allocationSize, reinterpret_cast<void *>(graphicsAllocation->getGpuAddress()));
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builder.setArgSvm(1, allocationSize, reinterpret_cast<void *>(graphicsAllocation->getGpuAddress()), nullptr, 0u);
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} else {
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UNRECOVERABLE_IF(AuxTranslationDirection::NonAuxToAux != operationParams.auxTranslationDirection);
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builder.setKernel(convertToAuxKernel.at(kernelInstanceNumber++).get());
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builder.setArgSvm(0, allocationSize, reinterpret_cast<void *>(graphicsAllocation->getGpuAddress()));
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builder.setArgSvm(0, allocationSize, reinterpret_cast<void *>(graphicsAllocation->getGpuAddress()), nullptr, 0u);
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builder.setArg(1, memObj);
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}
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@ -1,5 +1,5 @@
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/*
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* Copyright (C) 2017-2018 Intel Corporation
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* Copyright (C) 2017-2019 Intel Corporation
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*
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* SPDX-License-Identifier: MIT
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*
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@ -121,7 +121,7 @@ class Kernel : public BaseObject<_cl_kernel> {
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// API entry points
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cl_int setArg(uint32_t argIndex, size_t argSize, const void *argVal);
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cl_int setArgSvm(uint32_t argIndex, size_t svmAllocSize, void *svmPtr, GraphicsAllocation *svmAlloc = nullptr, cl_mem_flags svmFlags = 0);
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cl_int setArgSvm(uint32_t argIndex, size_t svmAllocSize, void *svmPtr, GraphicsAllocation *svmAlloc, cl_mem_flags svmFlags);
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cl_int setArgSvmAlloc(uint32_t argIndex, void *svmPtr, GraphicsAllocation *svmAlloc);
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void setKernelExecInfo(GraphicsAllocation *argValue);
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@ -1,5 +1,5 @@
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/*
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* Copyright (C) 2017-2018 Intel Corporation
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* Copyright (C) 2017-2019 Intel Corporation
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*
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* SPDX-License-Identifier: MIT
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*
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@ -378,7 +378,7 @@ struct AUBSimpleArgNonUniformFixture : public KernelAUBFixture<SimpleArgNonUnifo
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memset(expectedMemory, 0x0, sizeUserMemory);
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kernel->setArgSvm(1, sizeUserMemory, destMemory);
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kernel->setArgSvm(1, sizeUserMemory, destMemory, nullptr, 0u);
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outBuffer = createHostPtrAllocationFromSvmPtr(destMemory, sizeUserMemory);
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}
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@ -1,5 +1,5 @@
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/*
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* Copyright (C) 2017-2018 Intel Corporation
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* Copyright (C) 2017-2019 Intel Corporation
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*
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* SPDX-License-Identifier: MIT
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*
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@ -76,7 +76,7 @@ struct SimpleArgFixture : public FixtureFactory::IndirectHeapFixture,
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memset(pExpectedMemory, 0x22, sizeUserMemory);
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pKernel->setArg(0, sizeof(int), &argVal);
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pKernel->setArgSvm(1, sizeUserMemory, pDestMemory);
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pKernel->setArgSvm(1, sizeUserMemory, pDestMemory, nullptr, 0u);
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outBuffer = AUBCommandStreamFixture::createResidentAllocationAndStoreItInCsr(pDestMemory, sizeUserMemory);
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ASSERT_NE(nullptr, outBuffer);
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@ -1,5 +1,5 @@
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/*
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* Copyright (C) 2017-2018 Intel Corporation
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* Copyright (C) 2017-2019 Intel Corporation
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*
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* SPDX-License-Identifier: MIT
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*
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@ -1,5 +1,5 @@
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/*
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* Copyright (C) 2017-2018 Intel Corporation
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* Copyright (C) 2017-2019 Intel Corporation
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*
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* SPDX-License-Identifier: MIT
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*
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@ -878,7 +878,7 @@ TEST_F(DispatchInfoBuilderTest, setKernelArg) {
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EXPECT_EQ(CL_SUCCESS, diBuilder->setArg(0, sizeof(cl_mem *), pVal));
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char data[128];
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void *svmPtr = &data;
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EXPECT_EQ(CL_SUCCESS, diBuilder->setArgSvm(1, sizeof(svmPtr), svmPtr));
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EXPECT_EQ(CL_SUCCESS, diBuilder->setArgSvm(1, sizeof(svmPtr), svmPtr, nullptr, 0u));
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MockGraphicsAllocation svmAlloc(svmPtr, 128);
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EXPECT_EQ(CL_SUCCESS, diBuilder->setArgSvmAlloc(2, svmPtr, &svmAlloc));
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@ -945,17 +945,17 @@ TEST_F(DispatchInfoBuilderTest, SetArgSplit) {
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//Set arg SVM
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clearCrossThreadData();
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builder1D.setArgSvm(SplitDispatch::RegionCoordX::Left, 1, sizeof(svmPtr), svmPtr);
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builder1D.setArgSvm(SplitDispatch::RegionCoordX::Left, 1, sizeof(svmPtr), svmPtr, nullptr, 0u);
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for (auto &dispatchInfo : mdi1D) {
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EXPECT_EQ(svmPtr, *(reinterpret_cast<void **>(dispatchInfo.getKernel()->getCrossThreadData() + 0x30)));
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}
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clearCrossThreadData();
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builder2D.setArgSvm(SplitDispatch::RegionCoordX::Left, SplitDispatch::RegionCoordY::Top, 1, sizeof(svmPtr), svmPtr);
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builder2D.setArgSvm(SplitDispatch::RegionCoordX::Left, SplitDispatch::RegionCoordY::Top, 1, sizeof(svmPtr), svmPtr, nullptr, 0u);
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for (auto &dispatchInfo : mdi2D) {
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EXPECT_EQ(svmPtr, *(reinterpret_cast<void **>(dispatchInfo.getKernel()->getCrossThreadData() + 0x30)));
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}
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clearCrossThreadData();
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builder3D.setArgSvm(SplitDispatch::RegionCoordX::Left, SplitDispatch::RegionCoordY::Top, SplitDispatch::RegionCoordZ::Front, 1, sizeof(svmPtr), svmPtr);
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builder3D.setArgSvm(SplitDispatch::RegionCoordX::Left, SplitDispatch::RegionCoordY::Top, SplitDispatch::RegionCoordZ::Front, 1, sizeof(svmPtr), svmPtr, nullptr, 0u);
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for (auto &dispatchInfo : mdi3D) {
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EXPECT_EQ(svmPtr, *(reinterpret_cast<void **>(dispatchInfo.getKernel()->getCrossThreadData() + 0x30)));
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}
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@ -978,7 +978,7 @@ TEST_F(DispatchInfoBuilderTest, setKernelArgNegative) {
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diBuilder->bake(multiDispatchInfo);
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EXPECT_NE(CL_SUCCESS, diBuilder->setArg(0, sizeof(cl_mem *), pVal));
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EXPECT_EQ(CL_SUCCESS, diBuilder->setArgSvm(1, sizeof(void *), nullptr));
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EXPECT_EQ(CL_SUCCESS, diBuilder->setArgSvm(1, sizeof(void *), nullptr, nullptr, 0u));
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delete diBuilder;
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delete[] buffer;
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@ -1000,7 +1000,7 @@ TEST_F(DispatchInfoBuilderTest, setKernelArgNullKernel) {
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diBuilder->bake(multiDispatchInfo);
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EXPECT_EQ(CL_SUCCESS, diBuilder->setArg(0, sizeof(cl_mem *), pVal));
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EXPECT_EQ(CL_SUCCESS, diBuilder->setArgSvm(1, sizeof(svmPtr), svmPtr));
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EXPECT_EQ(CL_SUCCESS, diBuilder->setArgSvm(1, sizeof(svmPtr), svmPtr, nullptr, 0u));
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EXPECT_EQ(CL_SUCCESS, diBuilder->setArgSvmAlloc(2, svmPtr, &svmAlloc));
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delete diBuilder;
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@ -1,5 +1,5 @@
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/*
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* Copyright (C) 2017-2018 Intel Corporation
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* Copyright (C) 2017-2019 Intel Corporation
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*
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* SPDX-License-Identifier: MIT
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*
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@ -420,7 +420,7 @@ HWCMDTEST_F(IGFX_GEN8_CORE, CloneKernelTest, cloneKernelWithArgDeviceQueue) {
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TEST_F(CloneKernelTest, cloneKernelWithArgSvm) {
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char *svmPtr = new char[256];
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retVal = pSourceKernel->setArgSvm(0, 256, svmPtr);
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retVal = pSourceKernel->setArgSvm(0, 256, svmPtr, nullptr, 0u);
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ASSERT_EQ(CL_SUCCESS, retVal);
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EXPECT_EQ(1u, pSourceKernel->getKernelArguments().size());
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@ -1,5 +1,5 @@
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/*
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* Copyright (C) 2017-2018 Intel Corporation
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* Copyright (C) 2017-2019 Intel Corporation
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*
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* SPDX-License-Identifier: MIT
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*
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@ -82,7 +82,7 @@ typedef Test<KernelArgSvmFixture_> KernelArgSvmTest;
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TEST_F(KernelArgSvmTest, SetKernelArgValidSvmPtr) {
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char *svmPtr = new char[256];
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auto retVal = pKernel->setArgSvm(0, 256, svmPtr);
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auto retVal = pKernel->setArgSvm(0, 256, svmPtr, nullptr, 0u);
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EXPECT_EQ(CL_SUCCESS, retVal);
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auto pKernelArg = (void **)(pKernel->getCrossThreadData() +
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@ -98,7 +98,7 @@ TEST_F(KernelArgSvmTest, SetKernelArgValidSvmPtrStateless) {
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pKernelInfo->usesSsh = false;
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pKernelInfo->requiresSshForBuffers = false;
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auto retVal = pKernel->setArgSvm(0, 256, svmPtr);
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auto retVal = pKernel->setArgSvm(0, 256, svmPtr, nullptr, 0u);
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EXPECT_EQ(CL_SUCCESS, retVal);
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EXPECT_EQ(0u, pKernel->getSurfaceStateHeapSize());
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@ -112,7 +112,7 @@ HWTEST_F(KernelArgSvmTest, SetKernelArgValidSvmPtrStateful) {
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pKernelInfo->usesSsh = true;
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pKernelInfo->requiresSshForBuffers = true;
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auto retVal = pKernel->setArgSvm(0, 256, svmPtr);
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auto retVal = pKernel->setArgSvm(0, 256, svmPtr, nullptr, 0u);
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EXPECT_EQ(CL_SUCCESS, retVal);
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EXPECT_NE(0u, pKernel->getSurfaceStateHeapSize());
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@ -317,7 +317,7 @@ class KernelArgSvmTestTyped : public KernelArgSvmTest {
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struct SetArgHandlerSetArgSvm {
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static void setArg(Kernel &kernel, uint32_t argNum, void *ptrToPatch, size_t allocSize, GraphicsAllocation &alloc) {
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kernel.setArgSvm(argNum, allocSize, ptrToPatch, &alloc);
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kernel.setArgSvm(argNum, allocSize, ptrToPatch, &alloc, 0u);
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}
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static constexpr bool supportsOffsets() {
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@ -1,5 +1,5 @@
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/*
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* Copyright (C) 2017-2018 Intel Corporation
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* Copyright (C) 2017-2019 Intel Corporation
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*
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* SPDX-License-Identifier: MIT
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*
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@ -77,11 +77,11 @@ TEST_F(PatchedKernelTest, givenKernelWithAllArgsSetWithSvmWhenIsPatchedIsCalledT
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uint32_t size = sizeof(int);
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auto argsNum = kernel->getKernelArgsNumber();
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for (uint32_t i = 0; i < argsNum; i++) {
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kernel->setArgSvm(0, size, nullptr, nullptr);
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kernel->setArgSvm(0, size, nullptr, nullptr, 0u);
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}
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EXPECT_FALSE(kernel->isPatched());
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for (uint32_t i = 0; i < argsNum; i++) {
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kernel->setArgSvm(i, size, nullptr, nullptr);
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kernel->setArgSvm(i, size, nullptr, nullptr, 0u);
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}
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EXPECT_TRUE(kernel->isPatched());
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}
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@ -97,7 +97,7 @@ TEST_F(PatchedKernelTest, givenKernelWithOneArgumentToPatchWhichIsNonzeroIndexed
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kernel.reset(mockKernel.mockKernel);
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kernel->initialize();
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EXPECT_FALSE(kernel->Kernel::isPatched());
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kernel->setArgSvm(1, size, nullptr, nullptr);
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kernel->setArgSvm(1, size, nullptr, nullptr, 0u);
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EXPECT_TRUE(kernel->Kernel::isPatched());
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kernel.release();
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}
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