Commit Graph

759 Commits

Author SHA1 Message Date
Maciej Plewka ff01b9361e Return error code when there is no space for scratch/private
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
2022-11-02 11:55:18 +01:00
Katarzyna Cencelewska bbd75959d5 Calculate CS timestamp based on OA timestamp and frequencies ratio
Changes affect cores up to xe_hpg

Resolves: NEO-7346
Signed-off-by: Katarzyna Cencelewska <katarzyna.cencelewska@intel.com>
2022-10-28 16:26:53 +02:00
Dunajski, Bartosz fad7f10b7b Remove fallback path for PAT index programming
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2022-10-25 16:24:43 +02:00
Maciej Plewka bbc31e6aac Return error code for unsuported image arg in gen12lp
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
2022-10-24 16:54:10 +02:00
Jim Snow f976c7a313 Revert "Allocate RTDispatchGlobals as unboxed array"
This reverts commit eaa4965ae8.

Signed-off-by: Jim Snow <jim.m.snow@intel.com>
2022-10-24 05:16:03 +02:00
Artur Harasimiuk 9ad3f6190f do not sleep in ULTs
Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com>
2022-10-21 19:37:52 +02:00
Krystian Chmielewski c224fd0666 Require LWS to be in ascending format X >= Y >= Z
This change fixes problem with memory locality.
When calculating work group size do not take into account
work group sizes where there's bigger number of elements in
higher dimensions namely: Y>X or Z>Y.

Related-To: NEO-5719

Signed-off-by: Krystian Chmielewski <krystian.chmielewski@intel.com>
2022-10-18 13:23:57 +02:00
Compute-Runtime-Validation 7c6783c4a1 Revert "Return error when image arg does not support media block commands"
This reverts commit e56d18b69f.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
2022-10-12 03:58:33 +02:00
Joshua Santosh Ranjan 6944baaca8 Add check to verify UUID platform support
Related-To: LOCI-3495

Signed-off-by: Joshua Santosh Ranjan <joshua.santosh.ranjan@intel.com>
2022-10-12 01:44:57 +02:00
Maciej Plewka e56d18b69f Return error when image arg does not support media block commands
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
2022-10-11 15:47:27 +02:00
Szymon Morek 3f5ac0b4d0 Reuse heaps for immediate cmd lists
Signed-off-by: Szymon Morek <szymon.morek@intel.com>
2022-10-11 13:02:13 +02:00
Dunajski, Bartosz ad2d3d0289 Remove not used method
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2022-10-05 17:10:51 +02:00
Szymon Morek 17655e3ed3 [L0][XE_HPC]Perform memcpy on CPU by default
Related-To: NEO-7237

Signed-off-by: Szymon Morek <szymon.morek@intel.com>
2022-10-05 14:12:39 +02:00
Compute-Runtime-Validation cfd96980a0 Revert "[L0][XE_HPC]Perform memcpy on CPU by default"
This reverts commit 383f33b482.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
2022-10-05 08:17:23 +02:00
Szymon Morek 383f33b482 [L0][XE_HPC]Perform memcpy on CPU by default
Related-To: NEO-7237

Signed-off-by: Szymon Morek <szymon.morek@intel.com>
2022-10-04 11:39:30 +02:00
Yates, Brandon 71bef6094d Use max enabled slice in debugger thread mapping
Signed-off-by: Yates, Brandon <brandon.yates@intel.com>
2022-10-03 18:11:50 +02:00
Dunajski, Bartosz 48824acab2 Improve SBA programming
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2022-09-30 12:07:16 +02:00
Compute-Runtime-Validation 9a1102bb7a Revert "Add debug flag to enable specific PIPE_CONTROL fields"
This reverts commit 2e7c90e58f.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
2022-09-29 10:22:25 +02:00
Compute-Runtime-Validation dc68cf0fe2 Revert "[L0][XE_HPC]Perform memcpy on CPU by default"
This reverts commit 7ded401615.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
2022-09-29 08:07:46 +02:00
Krzysztof Gibala 2e7c90e58f Add debug flag to enable specific PIPE_CONTROL fields
FlushSpecificCache equivalent in value:

dcFlushEnable 	 				0b000000000001
renderTargetCacheFlushEnable  			0b000000000010
instructionCacheInvalidateEnable  		0b000000000100
textureCacheInvalidationEnable  		0b000000001000
pipeControlFlushEnable  			0b000000010000
vfCacheInvalidationEnable  			0b000000100000
constantCacheInvalidationEnable  		0b000001000000
stateCacheInvalidationEnable  			0b000010000000
tlbInvalidation  				0b000100000000
hdcPipelineFlush 				0b001000000000
unTypedDataPortCacheFlush 			0b010000000000
compressionControlSurfaceCcsFlush 		0b100000000000

Setting multiple cache at once for example:

constantCacheInvalidationEnable
textureCacheInvalidationEnable
vfCacheInvalidationEnable 			0b000001101000

Related-To: NEO-6049
Signed-off-by: Krzysztof Gibala <krzysztof.gibala@intel.com>
2022-09-28 11:17:03 +02:00
Jim Snow eaa4965ae8 Allocate RTDispatchGlobals as unboxed array
Previously we used an array-of-pointers approach, but using an
array-of-structures is in some ways simpler.

We also split out the RTStack as a separate allocation.

Related-To: LOCI-2966

Signed-off-by: Jim Snow <jim.m.snow@intel.com>
2022-09-28 03:42:14 +02:00
Szymon Morek 7ded401615 [L0][XE_HPC]Perform memcpy on CPU by default
Related-To: NEO-7237

Enable copy on cpu by default.
This commit also changes barrierCounter to bool
barrierCalled

Signed-off-by: Szymon Morek <szymon.morek@intel.com>
2022-09-27 17:32:56 +02:00
Szymon Morek ec04de61a7 [L0][XE_HPC]Perform memcpy on CPU for non-usm ptrs
Related-To: NEO-7237

If size is small enough, it is more efficient to
perform copy through locked ptr on CPU.
This change also introduces experimental flag to
enable this.

Signed-off-by: Szymon Morek <szymon.morek@intel.com>
2022-09-26 13:20:40 +02:00
Compute-Runtime-Validation f5575a1370 Revert "Remove fallback path for PAT index programming"
This reverts commit faf8d51f6d.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
2022-09-23 20:46:31 +02:00
Dunajski, Bartosz 6175a3e785 Debug flag to force stateless mocs encryption bit
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2022-09-23 15:19:26 +02:00
Maciej Bielski 56cb1f757b programStateBaseAddress: improve code reuse
Another step towards cleaner callers of
StateBaseAddressHelper<>::programStateBaseAddress.

Export programming state base address into a separate function to
improve code reuse and reduce copy-pasted fragments, which make code
modifications or maintenance more and more difficult over time. Use
specialization for gen-specific variations.

Related-To: NEO-6774
Signed-off-by: Maciej Bielski <maciej.bielski@intel.com>
2022-09-21 11:54:57 +02:00
Dunajski, Bartosz faf8d51f6d Remove fallback path for PAT index programming
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2022-09-21 10:46:43 +02:00
Lukasz Jobczyk efac290ba3 Do not use selector copy engine
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2022-09-20 21:49:00 +02:00
Mateusz Jablonski cfe51ff2ba Remove not used isSimulation functions
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2022-09-20 11:01:55 +02:00
Michal Mrozek 3d5e34f727 Reduce the size of masks to 4.
32 is not required.

Signed-off-by: Michal Mrozek <michal.mrozek@intel.com>
2022-09-19 21:53:40 +02:00
Lukasz Jobczyk 24b1cfbff5 Change internal copy engine to BCS3
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2022-09-15 16:08:10 +02:00
Zbigniew Zdanowicz 218a98f7f7 Refactor of pipeline select programming
Adding new interface to cooperate with hw context state
Simplify programming removing unnecessary functions
Code optimization that stop using expensive call and instead
stores configuration parameter

Related-To: NEO-5019

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2022-09-15 15:38:10 +02:00
Zbigniew Zdanowicz cee520b311 simplify systolic mode code and reduce double implementation
Related-To: NEO-5019

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2022-09-15 11:57:54 +02:00
Krystian Chmielewski 1f6c09ba1d zebin: sanitize scratch space size
Sanitize scratch space size to value programmable on GPU.

Signed-off-by: Krystian Chmielewski <krystian.chmielewski@intel.com>
2022-09-09 11:50:09 +02:00
Dunajski, Bartosz 84872812f2 Remove not used helper
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2022-09-06 16:02:56 +02:00
Dunajski, Bartosz 16d9000429 Add option to change GRF mode
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2022-09-06 13:00:17 +02:00
Dominik Dabek 16798467ac Add api specific config for allocation cache
Currently disabled for both opencl and level zero

Related-To: NEO-6893

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
2022-09-05 21:15:18 +02:00
Lukasz Jobczyk 0d6bef0753 Add BCS split to api specific config
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2022-09-05 11:13:10 +02:00
Zbigniew Zdanowicz c3f7e40a8d Rename special pipeline select mode to systolic
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2022-08-31 22:16:26 +02:00
Lukasz Jobczyk 399758ef17 Change default engines for BCS split
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2022-08-31 21:34:36 +02:00
Dominik Dabek 8cc0177f1c Change DG2 l1 cache policy to WB
With compiler LSC WAs this gives better performance.

If debugger is active, policy will not be changed ie.
will be WBP.

Related-To: NEO-7003

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
2022-08-31 14:31:23 +02:00
Patryk Wrobel 9f2cfc6f9d Limit files included by fence.h and csr_definitions.h
This change introduces usage of forward declarations
and removes unneeded includes from the mentioned files.

Signed-off-by: Patryk Wrobel <patryk.wrobel@intel.com>
2022-08-30 13:13:40 +02:00
Compute-Runtime-Validation 2621460e80 Revert "Change DG2 l1 cache policy to WB"
This reverts commit a820e73dd7.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
2022-08-27 08:04:19 +02:00
Patryk Wrobel c0342a0ab5 Optimize binaries' size by adjusting linkage of constants in headers
When header is included for the first time in translation unit,
then preprocessor simply copy-pastes its content. If we define a
constant in a header file and this constant has internal linkage
then each and every translation unit, which includes this header
will have its own copy of this constant.

C++17 introduces inline variables, which are meant to allow creation
of variables in header files, which do not cause multiple instances.

The inline variable has a single instance when:
- constexpr is used without static (constexpr implicitly implies inline)
- inline is used without static
- inline const is used without static (const does not imply internal linkage
when used with inline)

Signed-off-by: Patryk Wrobel <patryk.wrobel@intel.com>
2022-08-26 22:52:04 +02:00
Dominik Dabek a820e73dd7 Change DG2 l1 cache policy to WB
With compiler LSC WAs this gives better performance.

If debugger is active, policy will not be changed ie.
will be WBP.

Related-To: NEO-7003

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
2022-08-26 12:58:45 +02:00
Zbigniew Zdanowicz f656707fc0 Use hardware support flags for state compute mode state changes
Related-To: NEO-5019

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2022-08-25 18:46:37 +02:00
Compute-Runtime-Validation a5b4a13452 Revert "Return error when image arg does not support media block commands"
This reverts commit 8388e6cf4a.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
2022-08-24 06:23:22 +02:00
Dunajski, Bartosz 595cfebaef Refactor PIPE_CONTROL programming
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2022-08-23 13:55:25 +02:00
Maciej Plewka 8388e6cf4a Return error when image arg does not support media block commands
Related-To: NEO-7168

Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
2022-08-23 12:07:29 +02:00
Wrobel, Patryk a6c7f341dd Improve safety of makeCopy() function
The mentioned function allocates and copies elements
of size 1. Therefore, the implementation was simplified
and additional check was added to avoid possible UBs.

Signed-off-by: Wrobel, Patryk <patryk.wrobel@intel.com>
2022-08-22 17:16:53 +02:00