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3013 Commits

Author SHA1 Message Date
Jobczyk, Lukasz 0528c6803c Enhance enqueue SVM tests 
Change-Id: Ie3b99ee596a0795814c566deb9e3c37ea57c92c5
Signed-off-by: Jobczyk, Lukasz <lukasz.jobczyk@intel.com>
 2019-08-29 10:54:46 +02:00
Mrozek, Michal 817e62e01c Limit redundancy in main.cpp 
- Some functions were called twice, this commit limits this.

Change-Id: Ib362cc038a2f0669dbfbb62f0c00b67cf980d316
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
 2019-08-29 09:55:48 +02:00
Jacek Danecki 4d6d4a02af doc: add information about iHD dependency 
Change-Id: Ie3c8504eab9fa8d4f04cdc6ee2f7b5e433ecb304
Signed-off-by: Jacek Danecki <jacek.danecki@intel.com>
 2019-08-29 09:55:17 +02:00
Dunajski, Bartosz 386fa40241 Rename HWTEST_F_T to HWTEST_TEMPLATED_F 
Change-Id: I2db1eca61f180a3986e58a36fde7d8a523109303
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-08-29 08:32:51 +02:00
Andrzej Swierczynski 91af33d825 Update images to work in media compression scenarios 
Related-To: NEO-3613
Change-Id: I338f465435207400156d42a45e5d5b5915489715
Signed-off-by: Andrzej Swierczynski <andrzej.swierczynski@intel.com>
 2019-08-28 14:15:52 +02:00
Mrozek, Michal a54dcd98b3 Register cache flushes when ISA allocation is destroyed. 
- when ISA is being destroyed , check what are the users of it and register
instruction cache flushes there.
- For subsequent enqueue commands this would result in properly flushed
instruction cache.

Change-Id: I3791cd77ee42da9f87508c64a65cdc6238950858
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
 2019-08-28 14:15:19 +02:00
Dongwon Kim 25d9e4533d DRM Graphic allocation assigns original hostPtr as cpuPtr 
Change-Id: I9ba282b130b5fb9b674e1ceb2f87183f218ab140
Signed-off-by: Dongwon Kim <dongwon.kim@intel.com>
 2019-08-28 13:35:18 +02:00
Dunajski, Bartosz 04c45967b9 Change BcsBufferTests to HWTEST_F_T and start using HwHelperHw in Setup 
Change-Id: Iaccad06e854c5321d1f5907ae136d50ce64057e4
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-08-28 13:17:04 +02:00
Igor Venevtsev 3371ed12f6 Refactor DrmMemoryManager::freeGraphicsMemoryImpl 
- remove default value from synchronousDestroy param in
  DrmMemoryManager::unreference
- unreference BufferObject in synchronous mode  before release
  GPU and CPU memory
- add ULTs

Related-To: NEO-2877

Change-Id: I8065c27923cf4259a0fcd0f6d8d6d5b7c4b810c0
Signed-off-by: Igor Venevtsev <igor.venevtsev@intel.com>
 2019-08-28 12:30:20 +02:00
Mateusz Jablonski 18982bd016 Move memory for slm window to memory manager 
remove redundant methods from MockDevice

Related-To: NEO-3007

Change-Id: I9cc819b9c9118dbb667f5bf87d1bf15787f9b67f
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2019-08-28 12:09:17 +02:00
Dunajski, Bartosz 89824aa848 Update TimestampPacketTests to use HwHelperHw for low priority engine 
Change-Id: I4c7bb2c48daa245224ccdc084f152f98197b908c
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-08-28 11:46:11 +02:00
Dunajski, Bartosz 6a5c89c9f7 Remove redundant test 
Change-Id: Ie8aa1aeca169fcbe23edd1712143cfed437c95c5
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-08-28 11:26:08 +02:00
Jobczyk, Lukasz c7ad27d430 Add a HostToHost copy type in the Memcpy 
Related-To: NEO-3570, NEO-3610

Change-Id: I84f8e2150b2d3760d968e94ae85638d91cb77a54
Signed-off-by: Jobczyk, Lukasz <lukasz.jobczyk@intel.com>
 2019-08-28 10:55:07 +02:00
Dunajski, Bartosz 40d4314670 Templated SetUp and TearDown in fixtures 
Change-Id: I86b0e88db1ed52966ed5f0a6474deda09a415768
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-08-28 10:43:42 +02:00
Mrozek, Michal e7a4635dd6 Add mechanism to register instruction cache flushes. 
- With this mechanism csr with add pipe control with instruction cache flush
prior to enqueue, to make sure that this cache is flushed.

Change-Id: I664f212427686e9957027c7cf6c0dab17d2a3cac
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
 2019-08-28 07:56:41 +02:00
Krzysztof Gibala 84c801e28b Remove OCL object from MemoryProperties 8/n 
Refactor MemoryPropertiesFlags to bitfield

Related-To: NEO-3132
Change-Id: I7092b16d15cec962e94c992696bd9845ce86f642
Signed-off-by: Krzysztof Gibala <krzysztof.gibala@intel.com>
 2019-08-27 17:28:47 +02:00
Maciej Plewka 90266b4a37 Move autogenerated files to core directory 
Change-Id: Ie23411f9cfce068390f116c557000a665a62a337
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
 2019-08-27 17:19:39 +02:00
Mrozek, Michal be17471f8a Wire in L1 MOCS index for stateless accesses to csr. 
Change-Id: I1712a696e9c02ef042a08c80bfa87e80e82ada5f
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
 2019-08-27 15:48:12 +02:00
Mateusz Jablonski c7c6068d1f Add classes for sub devices concept 
Related-To: NEO-3007

Change-Id: I27dd4b91e286ba1b75f4b50bec96d98df37983e1
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2019-08-27 15:38:10 +02:00
Jobczyk, Lukasz 4503e04083 Align a unified memory pointer during memcpy 
Related-To: NEO-3570, NEO-3610

Change-Id: Id4d41da17a28ef512ba4c90bd71f419a24608d88
Signed-off-by: Jobczyk, Lukasz <lukasz.jobczyk@intel.com>
 2019-08-27 15:37:41 +02:00
Mrozek, Michal bd8405aa3d Fix revision id setting. 
Change-Id: I510ae6a497a9233e4fdd1dcd2a22f2dbd47b247b
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
 2019-08-27 14:29:11 +02:00
Dunajski, Bartosz b218c7fa16 Add helper for low priority engine type 
Change-Id: I1d46e73f94d2827ba44de86a752d03830ff2b7e3
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-08-27 14:13:53 +02:00
Mrozek, Michal bd6c2b0f1e Revert "Flush instruction cache." 
This reverts commit 3d062620a7.

Change-Id: I615d6d7e4298588cffd8f543e1c56045278c8c98
 2019-08-27 13:40:03 +02:00
Mateusz Jablonski 7749f28f70 Remove not needed methods from Device. 
Change-Id: I179089a4b248ba1ebd6502e001fda18238c4767b
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2019-08-27 09:07:10 +02:00
Maciej Plewka 7a5bc461eb Add residency handler for TBX 
Change-Id: I6c01d065ff3372fe7583ed50ed51595ebeb53e54
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
 2019-08-27 07:59:47 +02:00
Mrozek, Michal cb4e5576cb Pass proper dispatch flags. 
- add new policy to select L1 caching
- this is when kernel doesn't have any stateless writes

Change-Id: I3948e652797420976159bbfec2c2a154eb9e18ee
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
 2019-08-26 18:15:54 +02:00
Mrozek, Michal ea095418ad Stop using cache policy defines. 
- Replaced by Hardware Helper code.

Change-Id: I55026ee33fcaaffbfb529e1878ae4f7033f62ee5
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
 2019-08-26 17:36:50 +02:00
Daria Hinz 6566eb3193 Move Linear Stream to core folder 
Change-Id: I962ebd6e9075fcab9d7b6211524093109e62d382
Signed-off-by: Daria Hinz <daria.hinz@intel.com>
 2019-08-26 17:00:53 +02:00
Mrozek, Michal e851359e32 Start using real mocs index to call state base address programming. 
- After this change we start using real MOCS index as an argument to sba
programming
- We also start tracking real MOCS index in Command Stream Receiver.

Change-Id: Id34cffd7e58cb7363df02ac76f82bf377f4bbd77
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
 2019-08-26 16:14:36 +02:00
Dunajski, Bartosz aeb84b3e20 y-tiling interface cleanup 
Change-Id: If7e5ab7135eaa71d9215c87c2fc46188ffd42b02
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-08-26 15:00:26 +02:00
Mrozek, Michal ba2233dc6a Move getMocsIndex to BDW plus file. 
Change-Id: I0b169981a293e86446d0cfe563ec73db26c83a62
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
 2019-08-26 14:09:11 +02:00
Dunajski, Bartosz 8135babfc4 Dont use default engine tag address in DeviceQueue 
Change-Id: I84b9ecd9a9e7c1ffe620af8ad54fd5d48532fa5b
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-08-26 13:30:18 +02:00
Mrozek, Michal 3d062620a7 Flush instruction cache. 
Change-Id: I2ae0c40ae99cd8e0c126c8588e6df293e29d3db3
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
 2019-08-26 11:25:51 +02:00
Filip Hazubski b0f662a148 Remove bitwise operations on bools from os_interface/linux 
Change-Id: Id92840417824dc0b95d5d8b4ab8cda940f8fa8f4
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2019-08-26 09:42:05 +02:00
Mrozek, Michal a3f5e70e6a Remove not needed virtual. 
Change-Id: Ifb335a67753bc99a74d4c991d48c8d83e9e3d826
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
 2019-08-26 09:25:59 +02:00
Mrozek, Michal 918711c865 Add helper function to return proper mocs index basing on inputs. 
Change-Id: I062891d02607fec932e0cb9ae84fe858e9d9e098
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
 2019-08-26 09:17:09 +02:00
ocldev 6eb106875c igc revision update 
Change-Id: I8309d19ba04ad3b2ef090827b1b9e96d4e702ce7
 2019-08-26 04:22:51 +02:00
Maciej Dziuban f86bbd99d2 Include hw_cmds for specific gen when possible 
Change-Id: I3fc55321f92d02419c4c04e6d1bc28b09b306c0f
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2019-08-24 11:09:26 +02:00
Artur Harasimiuk 5f2de3e083 infrastructure update 
Change-Id: Id80fb2bc930002f00b9c09aaab18d0a64ece346d
Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com>
 2019-08-23 16:10:10 +02:00
Igor Venevtsev ffe2bd359a Add ULTs for OsAgnosticMemoryManager 
Related-To: NEO-2877

Change-Id: Id80fd66ced9d711ff74d85fa48741c95f9f750bb
Signed-off-by: Igor Venevtsev <igor.venevtsev@intel.com>
 2019-08-23 15:26:27 +02:00
Mrozek, Michal c24bbac25f Refactor scratch offset programming. 
- no need for virtual functions and helpers, this is just a constant that
is the same everywhere.

Change-Id: Id0ebfd2eed26e26f90f104ec456dcc997be70211
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
 2019-08-23 13:42:58 +02:00
Chodor, Jaroslaw 84d1461ccc Fixing execution model tests 
Tests were reliyng on order of kernels within device binary

Change-Id: Ic66430ce76d44556f579e9d1217b25caf448aa72
 2019-08-23 12:31:15 +02:00
Dunajski, Bartosz 4692bc1289 Update GMM H/V alignment API 
Change-Id: I2713b912cd93ae28de6c7ef6a8348107f0902368
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-08-23 12:15:33 +02:00
Mrozek, Michal 9a67b2d784 Add flag to kernel that specifies whether stateless writes are used. 
- currently no compiler support yet, hence it returns true.
- minor cleanup of kernel tests.

Change-Id: Ic153810b1a6062d0bae22d6faab5db601764dd98
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
 2019-08-23 11:56:04 +02:00
ocldev b09b946c54 dependencies update 
Change-Id: Idc9281253e3bcdc91f4bde188c7585ec357dc952
 2019-08-23 11:30:51 +02:00
Mrozek, Michal fdda152ebd Improve blocked path mocs testing. 
Change-Id: I9812e8d28d1c3e8e5523a0a597f417a548f7b1d7
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
 2019-08-23 11:30:21 +02:00
Dunajski, Bartosz 51d0219f65 Add helper method for ForceOtherHVALIGN4 flag 
Change-Id: I3823792b44459fabd3b4576ba80b6e5c6d7a3887
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-08-23 10:36:00 +02:00
Krzysztof Gibala 7912b9fa94 Remove OCL object from MemoryProperties 7/n 
Wire in MemoryPropertiesFlags support to:
-isLinearStorageForced

Related-To: NEO-3132
Change-Id: Ib29c4b1c8a30f2449d7fcb2778cb827baf61915e
Signed-off-by: Krzysztof Gibala <krzysztof.gibala@intel.com>
 2019-08-23 10:08:23 +02:00
Krzysztof Gibala bd63618190 Remove OCL object from MemoryProperties 6/n 
Wire in MemoryPropertiesFlags support to:
Image functions:
-validate
-validatePackedYUV
-validateImageTraits

Related-To: NEO-3132
Change-Id: I4d71d4170704d2117d6d17602f5f2ad0f30ab1f8
Signed-off-by: Krzysztof Gibala <krzysztof.gibala@intel.com>
 2019-08-23 09:28:23 +02:00
Mrozek, Michal f362739521 Refactor L3 programming. 
- Do not do it via member setting.
- Utilize DispatchFlags

Change-Id: I75d4c8ea6c1e10ca0edeeb0d1c3883a549c1cb1f
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
 2019-08-23 08:46:27 +02:00