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2406 Commits

Author SHA1 Message Date
Maciej Dziuban 0c9995d447 Update internal 
Change-Id: I37a7e58cd80f7c260274fc84746980e14e323df5
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2019-05-10 13:49:08 +02:00
Hoppe, Mateusz 97245a2ca6 Refactor MemoryManager::allocateGraphicsMemoryInDevicePool 
- create MemoryAllocation for OsAgnosticMemoryManager so that
freeGraphicsMemory is freeing correct object type
- other memory managers do not go this path

Change-Id: If2ada9b77bb4a41d09f82b79502594e0eda9f11b
Signed-off-by: Hoppe, Mateusz <mateusz.hoppe@intel.com>
 2019-05-10 13:14:08 +02:00
Hoppe, Mateusz eefb2bb488 SVM buffer tests: setup hwInfo with 48 bit gpu address space 
- to use SVM, proper GPU address space is needed

Change-Id: I01f217fd4af958fd6c1e306d4d9146253163eb0e
Signed-off-by: Hoppe, Mateusz <mateusz.hoppe@intel.com>
 2019-05-10 12:15:05 +02:00
Dunajski, Bartosz 7eb5db4fc7 Manifest update 
Change-Id: I9812560482f823fdbe13a55552dcaf6cc50f8ad4
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-05-10 10:51:55 +02:00
Maciej Dziuban 69c3304692 Extract methods to aub_command_stream_receiver_hw_base.inl 
Related-To: NEO-3016
Change-Id: I6efcd9cb1f2470c17b8caec2e8fb54d7ca45b448
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2019-05-10 10:13:49 +02:00
Dunajski, Bartosz 67d39b19db Add pitch programming to Blit dispatch and align max width to cacheline 
Change-Id: I37a15ddc64c9e41cd4cd718133b17d572bb71ba2
Related-To: NEO-3020
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-05-09 16:08:06 +02:00
Jobczyk, Lukasz c7d7346fd0 Remove deprecated GMM api 
Resolves: NEO-3143

Change-Id: I34e18c25f7a1f8073926a6725d479958af722d1a
Signed-off-by: Jobczyk, Lukasz <lukasz.jobczyk@intel.com>
 2019-05-09 10:59:29 +02:00
Dunajski, Bartosz 0f87e9aa1a Rename HardwareInfo members 
Change-Id: I85f56b677bafdd75dd958b488522393fc18b68af
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-05-09 09:13:55 +02:00
Dunajski, Bartosz de988d067c Fix ExecutionEnvironment test and rename hwInfoHelper to hardwareInfo 
Change-Id: I849b9f5a9f449f063e5717ea9758e80c6662c5a5
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-05-09 08:53:24 +02:00
Hoppe, Mateusz 4541b324a7 Use GPU address in TBX submitBatchBuffer as start address 
Related-To: NEO-2407

Change-Id: Ia7e2183f13fd5118f3125b415242a365dc6cc214
Signed-off-by: Hoppe, Mateusz <mateusz.hoppe@intel.com>
 2019-05-08 18:11:57 +02:00
Dunajski, Bartosz bb80d327c7 Move HardwareInfo ownership to ExecutionEnvironment [1/n] 
Change-Id: I5e5b4cc45947a8841282c7d431fb69d9c397a2d4
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-05-08 16:11:01 +02:00
Dunajski, Bartosz b2aee82f41 Add cmake flag to disable PCH on Windows 
Change-Id: Idcdb7e642fd4a92a21fee9b7b801488e26a6038a
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-05-08 14:00:32 +02:00
Artur Harasimiuk db8cccbaa5 infrastructure update 
Change-Id: Ibb491252e4f237e2e888871a689da7f990a5502f
Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com>
 2019-05-08 10:24:40 +02:00
Milczarek, Slawomir 6c8b14c918 OmitTimestampPacketDependencies to omit node dependency in timestamp packet 
Makes subcapture feature work with timestamp packet enabled.

Related-To: NEO-2747

Change-Id: Ifa45f1c066129671a02dc708b537b285f5a05d7f
Signed-off-by: Milczarek, Slawomir <slawomir.milczarek@intel.com>
 2019-05-07 16:05:00 +02:00
Mrozek, Michal bc35cd250a Do not use max power saving mode in VA sharing scenarios. 
-This can be achieved by passing CL_QUEUE_THROTTLE_LOW_KHR as throttle hint
to command queue.
- This gives much better control about the granularity of this feature
instead of triggering this for the whole context user may still have
power saving mode queues.

Change-Id: I066729f963119ddc1f62ad2785c342af2fea588e
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
 2019-05-07 15:23:13 +02:00
Mateusz Jablonski cadc461712 Create storage info while getting allocation data 
Related-To: NEO-3127

Change-Id: I716a1d5624cf34d74bafd8c9ab3f5cc5ded43275
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2019-05-07 14:17:34 +02:00
Artur Harasimiuk 58492b846f infrastructure update 
Change-Id: I3197414f8a304594ce26fcf37552cfa35562b6e6
Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com>
 2019-05-07 11:48:49 +02:00
Milczarek, Slawomir 10d87404b6 AUB with kernel names in case of kernel split 
Related-To: NEO-2747

Change-Id: I49d3e4716db4634da6744fe91ecfb0763f67722a
Signed-off-by: Milczarek, Slawomir <slawomir.milczarek@intel.com>
 2019-05-07 10:14:32 +02:00
ocldev ce78f0336f igc revision update 
Change-Id: Iff55df44b63c23503c5c024d8ea487787084c716
 2019-05-06 15:53:15 +02:00
Mrozek, Michal 4f0c58003c Remove redundant code. 
Change-Id: Ia037d05484d3ee70e5f915346884fde9eb7df180
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
 2019-05-06 15:13:29 +02:00
Mateusz Jablonski 42e255969a Move createStorageInfoFromProperties method to MemoryManager class 
Change-Id: I09bbc19aeb377d8fabfe144920c6377cf68066d2
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2019-05-06 11:30:37 +02:00
Piotr Fusik f153fca90a Add Drm::queryEngineInfo. 
Related-To: NEO-3008

Change-Id: I2a4d21bfa1f078b5da2f893bdb7554d502df8522
Signed-off-by: Piotr Fusik <piotr.fusik@intel.com>
 2019-04-30 15:52:19 +02:00
Jobczyk, Lukasz ed2d3318df Adding mocks for IgcOclTranslationCtx 3 
Related-To: NEO-2260

Change-Id: I1bee967485e0a9f949d541dc0242e2979ac18b38
Signed-off-by: Jobczyk, Lukasz <lukasz.jobczyk@intel.com>
 2019-04-30 14:02:50 +02:00
ocldev 016cfea8e2 dependencies update 
Change-Id: I085af005e70254adaf3627928201473bf46bc11b
 2019-04-30 08:50:23 +02:00
Jobczyk, Lukasz 27c52714bb Add performance hints when kernel's argument requires aux translation 
Resolves: NEO-2931

Change-Id: I3756265d0d8a774805b0b35088b7477b09b5a7bf
Signed-off-by: Jobczyk, Lukasz <lukasz.jobczyk@intel.com>
 2019-04-29 15:55:42 +02:00
Maciej Dziuban e0e19c2432 Change TBX 'coherence' terminology to 'download' 
Related-To: NEO-3054
Change-Id: Ic2d7fe76dc85b007acfe19ee2c29f8dd8539ccbc
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2019-04-29 15:23:54 +02:00
Mateusz Hoppe d106980df6 ocloc: allow options to be used when using spirv input 
Related-To: NEO-3128

Change-Id: Ib46e17003c81aff0cec23273674b639b9572c80f
Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
 2019-04-29 14:58:57 +02:00
Milczarek, Slawomir 20e0d8c7ab Add flag to control Binding Table Base Address programming 
Related-To: NEO-2747

Change-Id: I30b52875f37b4f75a0b63eb199fc388d1e495dec
Signed-off-by: Milczarek, Slawomir <slawomir.milczarek@intel.com>
 2019-04-29 14:28:19 +02:00
Katarzyna Cencelewska a6aac141d1 Move setting of featureTable flags 
ftrL3IACoherency, ftrGpGpuMidBatchPreempt, ftrGpGpuThreadGroupLevelPreempt
from configureHardwareCustom to setupFeatureAndWorkaroundTable

Related-To: NEO-2755

Change-Id: I508ad321c60bfd88eef3654b3f418343fc5b6b31
Signed-off-by: Katarzyna Cencelewska <katarzyna.cencelewska@intel.com>
 2019-04-29 13:44:22 +02:00
Katarzyna Cencelewska 41ca0a0033 Enable preemption FeatureFlags for GEN11 
Resolves: NEO-2910

Change-Id: I2dfe92f3f4e3cf42a3772775ed329b6c5a2c50e6
Signed-off-by: Katarzyna Cencelewska <katarzyna.cencelewska@intel.com>
 2019-04-29 10:16:00 +02:00
Jobczyk, Lukasz e871852601 Force linear storage for images 
Related-To: NEO-3114

Change-Id: I20dd6c7fdf4a223d45f1c3587d8a1327268742d8
Signed-off-by: Jobczyk, Lukasz <lukasz.jobczyk@intel.com>
 2019-04-29 07:58:14 +02:00
Filip Hazubski ddcd3fbbed Simplify getAllocationProperties 
Change-Id: I006337ec700e50259c46be1fd73fde34562c8b83
Related-To: NEO-2535
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2019-04-26 15:47:22 +02:00
Mateusz Hoppe 068a8d7189 Call submitBatchBuffer on HardwareContext 
Related-To: NEO-3052

Change-Id: I51cae4d953260c0b6a49c40b8a8771630c721731
Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
 2019-04-26 15:22:42 +02:00
Piotr Fusik 92584d8c64 Minor cleanup. 
Change-Id: I0f345c4fbf49f6464dce7bafd8b8d59347ff2d77
Signed-off-by: Piotr Fusik <piotr.fusik@intel.com>
 2019-04-26 14:34:58 +02:00
Zdunowski, Piotr 148774ee7a Temporarily remove printf test case. 
Related-To: NEO-3136

Change-Id: I033c033e5b1bdde0066fd5efa3fc1a0df00b994e
Signed-off-by: Zdunowski, Piotr <piotr.zdunowski@intel.com>
 2019-04-26 12:59:16 +02:00
Mateusz Hoppe 4733e51770 Extended format support in VA sharing 
- enabled with Debug Variable
- allow P010 surface sharing

Related-To: NEO-3049

Change-Id: I837d9f2e31a4ea2a9cf763430021929222cf3001
Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
 2019-04-26 12:28:33 +02:00
Filip Hazubski 445ee08ace Fix typo 
Change-Id: I8cd853e00da7a09d20e7a43e366f1e2c45a7230c
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2019-04-25 20:22:50 +02:00
Dunajski, Bartosz a2ed01bc3e Use waitForTaskCountWithKmdNotifyFallback in blitFromHostPtr method 
Change-Id: Ib70df07e2a7cef514037c9327575ef8e867e6ca6
Related-To: NEO-3020
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-04-25 17:09:43 +02:00
Mateusz Hoppe 582fc9cf10 Return true from 48BitAddressing when GTT size > max64BitAppAddress 
Related-To: NEO-3133

Change-Id: I18711642a5f092be423fb921bc4940ef9b6312d4
Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
 2019-04-25 13:17:53 +02:00
Venevtsev, Igor 188c0797b6 Revert "[2/n] Use GfxPartition for 32-bit allocations - DrmMemoryManager" 
This reverts commit 1ce2f9564a.

Related-To: NEO-2877

Change-Id: Id17e0bce560ed1d934412067f9e41d39c529018f
Signed-off-by: Venevtsev, Igor <igor.venevtsev@intel.com>
 2019-04-25 10:34:32 +02:00
Mateusz Hoppe 016d6eda4b Return 48Bit addressing based on I915_CONTEXT_PARAM_GTT_SIZE 
Change-Id: I54dcce1708d0e7d2280da1b4acb06ee1a1da6c7f
Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
 2019-04-25 09:09:43 +02:00
ocldev 70c0a9f52d igc revision update 
Change-Id: Iff3abdc9f57e74ccaa357332347bf60a8237438f
 2019-04-25 00:01:50 +02:00
Mrozek, Michal ef19a5312f Add unrecoverable in case of failure. 
Change-Id: I886e698727cf239d92acbce592c65186b9bf9169
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
 2019-04-24 23:11:24 +02:00
Jacek Danecki 3d1d8ba256 ci: update Arch system before Neo build 
Signed-off-by: Jacek Danecki <jacek.danecki@intel.com>

https://github.com/intel/compute-runtime/pull/162

Change-Id: Icad6475cf24fb18f0b6b17c32f94995ec12645df
 2019-04-24 22:47:04 +02:00
Jacek Danecki f2fc85cb7b Add information about ppa packages for Ubuntu 18.04 
Change-Id: I03a25b4f83def249fe3767ae4d888c3c7d6c40ae
Signed-off-by: Jacek Danecki <jacek.danecki@intel.com>
 2019-04-24 22:16:29 +02:00
Artur Harasimiuk eb3c54415c cmake: fix compilation flags setting for unit tests 
Change-Id: I50ec358d6d2ac997d354d359864304201e648867
Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com>
 2019-04-24 20:06:16 +02:00
Artur Harasimiuk ac383d0129 infrastructure update 
Change-Id: I7fdb543eae7128dc97ded88d3b4c8d1a7edcfcab
Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com>
 2019-04-24 05:40:11 -07:00
Mrozek, Michal c269bc062f Limit overestimation in multi kernel scenarios. 
- There was overestimation that resulted in each kernel getting
page aligned estimation size.
- After this change every kernel aligns only to cache line and final
size is aligned to page size.

Change-Id: Iee06bdd0083724ea7e9415f3d0fe70198acca407
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
 2019-04-23 17:46:53 +02:00
Dunajski, Bartosz 6cf2dc411d Dispatch blit operation during Buffer creation 
Change-Id: I59298030b4132a3ac95cc57d0608c8e6a350dafd
Related-To: NEO-3020
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-04-23 17:31:42 +02:00
Filip Hazubski dd442a213b Fix typo in variable name 
Change-Id: I8ffa5e7627c791a4c35e84a0f01a89643e3eb595
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2019-04-23 17:27:06 +02:00