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Author SHA1 Message Date
Filip Hazubski d30cc221df Update disabling caching for a resource 
Change-Id: I00eac0add01f75a1b82d04cf42652c15b776a457
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2019-02-01 10:50:21 +01:00
Dunajski, Bartosz 32ecd91401 Add parameters to HardwareContext read call 
Change-Id: Iba70d4b90d76199df6f0bf90c95adb7dc059c715
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-02-01 10:22:15 +01:00
Milczarek, Slawomir 6ef2822643 TBX CSR to call writeMemory on aubManager 
Change-Id: Ie10a30944e0c3a8e136816fa91ff501887a3d0d2
 2019-01-31 16:18:57 +01:00
Dunajski, Bartosz 783f408f9f Dont pass EngineType or Index as parameter in Aub/Tbx CSR 
Change-Id: I4583a09a9fa5dd5b0508132c86156c91aaf24c28
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-01-31 10:30:05 +01:00
Dunajski, Bartosz 666d8854f8 Remove setCsrProgrammingMode() method from AUB CSR 
Change-Id: I04f86e367d919ddd5afd98e9ed07bc505306bcc7
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-01-30 13:32:04 +01:00
Mateusz Jablonski f157943610 Allocate internal allocations through preferred pool 
Change-Id: Ib17431ceefc1eb72f86625e0998f679baaa7cb0d
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2019-01-30 11:18:15 +01:00
Venevtsev, Igor 303014582a Extend semaphore synchronization for different command stream receivers. 
Change-Id: Ic904b8c1e052adbb7b2ef82a6dec74ec69837f9f
 2019-01-30 09:33:41 +01:00
Milczarek, Slawomir b11e0825c9 AUB capture with support for allocation dumps 
Change-Id: I90a2b75043c33af92e4557be37cde4b9699582c6
 2019-01-28 21:20:08 +01:00
Zdanowicz, Zbigniew 72da161769 Add function to detect conditions to reset CSR 
Change-Id: I76d21eee26e22e841670180392c1b9262f6b59e1
 2019-01-28 17:00:00 +01:00
Dunajski, Bartosz c878590162 Remove EngineInstance parameter from pollForCompletion call 
Change-Id: I07652db2de656032cdb3452239b671edbe876b75
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-01-28 16:49:25 +01:00
Maciej Dziuban 5c66211537 Extract mask and value for pollForCompletion in AubCsr from pollForCompletion 
Change-Id: Ice43f5d57ff7281735d002d389255abe4135feec
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2019-01-27 13:50:31 +01:00
Mateusz Jablonski f332bf369e Set allocation's lock state only in lockResource and unlockResource methods 
Change-Id: I60f35801287166f5bdb0dfcd31ff0118c56ec22a
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2019-01-24 15:15:27 +01:00
Milczarek, Slawomir b2fe74ca9d AUB capture with writeMemory on aubManager 
Change-Id: Ie954b0d0f72b093f12ef33c93af5a3dc845559dc
 2019-01-23 13:54:28 +01:00
Milczarek, Slawomir 21f855b719 AubStream update (1/n) 
Change-Id: I6579e7af2015493490c5edcc413dcb2e6c804b9f
 2019-01-22 12:19:21 +01:00
Zdanowicz, Zbigniew 158f200476 Add HW commands const definitions 
Change-Id: If2e9d7f7f707b7b8c7bd8dbd3853ab3b6dad0c9a
 2019-01-18 12:13:25 +01:00
Pawel Wilma 9036882d11 Refactoring of additional MMIO registers in AubDump 
Change-Id: I97c0cc25aa24c6abcff4ba7469d6a6e3f0c12b86
 2019-01-16 11:16:54 +01:00
Zdanowicz, Zbigniew f18f9a5f88 Use queue command buffer to program media sampler at submit 
Change-Id: I7cc410a7432564b5f15dbb6943f48b577dfa6936
 2019-01-15 15:45:44 +01:00
Dunajski, Bartosz 1de0bda212 Initialize HardwareContext with valid deviceIndex and engineIndex 
Change-Id: I8848936340e8f4b33ac5ed5d0ae85d9f580171ca
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-01-15 15:33:42 +01:00
Mateusz Jablonski 06600f169b Define GPGPU engines per gen 
Change-Id: Ie0e565d11184c5355b5bf09f5b10a567deb5c106
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2019-01-15 12:05:19 +01:00
Zdanowicz, Zbigniew 84d35c8951 Add media programming call at the end of command buffer 
Change-Id: Ie60bc384c9385071aa77d2516e1d3649298a1233
 2019-01-15 11:35:58 +01:00
Filip Hazubski ec03210687 Update clEnqueueVerifyMemory 
- return success also for non aub CSRs

Change-Id: Iac7fdcd58e4b76a325ef67fd266f183d779ca956
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2019-01-14 14:37:09 +01:00
Dunajski, Bartosz 8ae7de7b0e Create HardwareContext only when osContext is available 
Change-Id: I8bcf2cb20f0e1e6b9da98b477f5be206407a7a57
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-01-13 15:12:07 +01:00
Dunajski, Bartosz 6ea2d8c2a9 Extract creating aub file name to separate function 
Change-Id: Ie0506f1847684cc3aabd8bee153c944b2f49bdb8
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-01-09 20:45:04 +01:00
Milczarek, Slawomir ea028d2a9b Moved TBX and AUB CSR members to SimulatedCommonHw CSR 
Change-Id: I4b49b0cf886c70127a9983dd1c9d7b15f7a45b7a
 2019-01-08 09:39:28 +01:00
Mateusz Jablonski aee69779fa Minor renaming in a scope of multi os context allocations: 
shareable -> multiOsContextCapable
resetTaskCount -> releaseUsageInOsContext
resetResidencyTaskCount -> releaseResidencyInOsContext
isUsedByContext -> isUsedByOsContext

Change-Id: If824246a0e393b962bd12f8c63d429a0fcfcda25
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2019-01-07 11:42:43 +01:00
Milczarek, Slawomir 9083761dce Add AUBFillBuffer test with concurrent execution on CS 
Change-Id: Ia01614a9763ff67d27ed68c46a5ae1b9f7dd0ee8
 2019-01-04 17:04:55 +01:00
Filip Hazubski 7e3884e22d Add clEnqueueVerifyMemory API 
Change-Id: I15a514b14b9efdaeb182c7abd98b8e236932d50f
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2019-01-04 08:30:02 +01:00
Venevtsev, Igor 73a63c7689 Fix Read/WriteBuffer for unaligned offsets 
Change-Id: I08d33e80243f41174f4629c8a611e286629d2e10
 2018-12-31 14:50:07 +01:00
Hoppe, Mateusz e195b0e380 Initialize TBX stream only when hardwareContext is not created 
Change-Id: I05d8c5c395cc342ea699333dd59966913f9a98df
 2018-12-31 12:14:55 +01:00
Artur Harasimiuk b2c1d68a91 Revert "Revert "Revert "Fix Read/WriteBuffer for unaligned offsets""" 
This reverts commit f6757c02a4.

Change-Id: I239528e7588dc9766b10a7ce7e517d6b2cdd6375
Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com>
 2018-12-21 08:57:45 +01:00
Venevtsev, Igor f6757c02a4 Revert "Revert "Fix Read/WriteBuffer for unaligned offsets"" 
This reverts commit 71f6524197.

Change-Id: I4f31fb6fa14fb5e3b8d8bf0a1745429bcdacd5af
 2018-12-20 14:16:07 +01:00
Milczarek, Slawomir 541ab5af50 TBX CSR with an option to create and operate on hardware context 
Change-Id: Ib5febc8e36e61195a5fcce91e1783117717ff6cb
 2018-12-20 10:59:53 +01:00
Kowalczuk, Jakub d3ac1be3aa Replacing typedef with using in common csr 
Change-Id: Idc4e7b1b0ffe577627feac4072888080decbd41b
 2018-12-19 14:31:35 +01:00
Kowalczuk, Jakub 53fb222fe7 Unify AUB and TBX CSRs part 3 
Move:
- getCsTraits
- initEngineMMIO
- submitLRCA
to common CSR

Change-Id: I8f172b017be2e8f7c54efc8420edd2671d99a927
 2018-12-19 12:02:24 +01:00
Mateusz Jablonski b138ff5750 Minor refactoring related to residency task count 
Change-Id: I49c9a5b37637e19fa12b7e6d91c352fb78bb117a
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2018-12-19 11:38:49 +01:00
Pawel Wilma 068582445d Move physical address allocator to CommandStreamReceiverSimulatedHw 
Change-Id: Ic3c397fe1a93eccae9235f1315a26ae31a3f5b60
Signed-off-by: Pawel Wilma <pawel.wilma@intel.com>
 2018-12-19 09:26:31 +01:00
Dunajski, Bartosz 403fedfb7b Improve EngineInstance usage in Aub CSR 
Change-Id: I9097f7cc8c930fcf531744af9bddfa38b2c5e1da
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-12-18 12:11:00 +01:00
Mateusz Jablonski 8ec072d39c Simplify Memory Manager API [3/4] 
- remove method allocateGraphicsMemory(size_t size)
- pass allocation type in allocation properties
- set allocation type in allocateGraphicsMemoryInPreferredPool

Change-Id: Ia9296d0ab2f711b7d78aff615cb56b3a246b60ec
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2018-12-17 10:42:16 +01:00
Zdunowski, Piotr 0ca8ee7f30 Additional programming for source level debugger. 
- always program STATE_BASE_ADDRESS and STATE_SIP

Change-Id: Iea6327d062b4efdddd3b0060d3105b29745b9cba
 2018-12-14 11:30:54 +01:00
Dunajski, Bartosz 010e1a4738 VFE state programming cleanup 
Change-Id: I38fb47b00211a1d28244369ac417427ada145f61
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-12-13 17:44:40 +01:00
Mateusz Jablonski a6be6533ea Simplify Memory Manager API [2/n] 
- make AllocationData a protected structure
- use AllocationProperties instead of AllocationFlags
- refactor methods: allocateGraphicsMemory64kb, allocateGraphicsMemoryForSVM
- call AllocateGraphicsMemoryInPreferredPool in AllocateGraphicsMemory
  where there is no host ptr

Change-Id: Ie9ca47b1bccacd00f8486e7d1bf6fb3985e5cb12
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2018-12-11 13:12:00 +01:00
Kowalczuk, Jakub 9e53740130 Unify AUB and TBX CSRs part 2 
Move:
- getEngineIndexFromInstance
- getEngineIndex
to common CSR
Unification of arguments of some AUB/TBX methods

Change-Id: I46f25e16aa9fbad10ffc3890cc31915fa5edb1d9
 2018-12-10 12:23:27 +01:00
Hoppe, Mateusz e88548a251 Do not call submit on HardwareContext with zero-sized command buffer 
Change-Id: I53b9233b30f58e2fcb354142eb1186a20c834d62
 2018-12-10 10:02:46 +01:00
Dunajski, Bartosz 7f7808fb71 Select RCS1 for low priority CommandQueue 
Change-Id: I1f86b0afedb8f6e76fee896c2751a0bf196996d7
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-12-07 13:18:13 +01:00
Kowalczuk, Jakub 2dd71c2e25 Unify AUB and TBX CSRs part 1 
Move:
- getPPGTTAdditionalBits
- getGTTData
- getMemoryBankForGtt
to common CSR

Change-Id: I7c9616bc18a4cffb0673d7964af168ea3ddad2dd
 2018-12-07 09:24:54 +01:00
Mrozek, Michal 3719c7a767 Limit AUB SSH size to 64KB. 
Change-Id: I1a23aa2a253a93ed9633ab7fda0a6180050add83
 2018-12-06 17:36:49 +01:00
Mateusz Jablonski c8748b77a0 Simplify memory manager API [1/n] 
pass struct with properties to allocate graphics memory methods:
for protected methods use AllocationData
for public methods use AllocationProperties

Change-Id: Ie1c3cb6b5e330bc4adac2ca8b0bf02d30ec76065
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2018-12-06 15:09:25 +01:00
Maciej Dziuban 43fd32b3ad Enable aggregating command buffers with multiple osContexts 
- Store inspectionId for each osContext in GraphicsAllocation
- Pass osContextId to aggregateCommandBuffer and use it to select inspectionId

Change-Id: I2c377ad7577a8c882cc89c1205430cb581c2c0d5
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2018-12-06 10:11:07 +01:00
Pawel Wilma fe228ea5f7 Use GPU address in calculateNewGSH() 
Change-Id: I82add7aab4b26444f288a9c4dbce6328578a03d2
Signed-off-by: Pawel Wilma <pawel.wilma@intel.com>
 2018-12-05 10:33:35 +01:00
Milczarek, Slawomir 1bf98c7f80 Added support for expectMemory call from aub stream 
Change-Id: I8acf27eff8b2f38dcb8d9873e03c35bfab6f3298
 2018-12-04 12:03:36 -08:00
Dunajski, Bartosz b728526c4e Allow Device creating multiple CSRs [8/n] 
Use OsContextId instead of DeviceIndex for residency

Change-Id: Ib2367b32b5b3e320252d8254f1042f1c3d497068
 2018-12-04 15:36:59 +01:00
Mrozek, Michal 38fb8cd9c3 Refactor mmio programming. 
Change-Id: I2ec9294b800adcd537f03d69fd4ba4e015e8db7a
 2018-12-03 14:40:00 +01:00
Milczarek, Slawomir 80fa9d0260 Decouple aub stream memoryFree from makeNonResident 
Change-Id: Ic4614441aff131356ce3ec03330d7dc42b5b0ecb
 2018-11-29 08:28:21 -08:00
Zdanowicz, Zbigniew 7dbd0ea4f3 Move Scratch Space functionality to dedicated class 
Change-Id: Ic7655c4b971513961aba6823478a139ffc943466
 2018-11-29 11:55:56 +01:00
Dunajski, Bartosz d39309adf2 Use const values instead of constexpr from std::array::size() 
Change-Id: I705888b77801cd32487c4d53fc320cf839ec9079
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-11-28 22:57:33 +01:00
Milczarek, Slawomir 42ba6c10fc AUB CSR with an option to create and operate on hardware context 
Change-Id: If8e060ef184d6c077e09741144ef870c96360645
 2018-11-28 09:24:18 -08:00
Dunajski, Bartosz 3e7fa3754c Replicate OsContext to CommandStreamReceiverWithAUBDump 
Change-Id: If2f83d01d58891209c6cf82f47e5634f8d348de4
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-11-28 13:11:52 +01:00
Dunajski, Bartosz b0de2a11d2 Set OsContext as reference 
Change-Id: I3b682fabde9c2ddb2c33a95aef77bf6ce400a21f
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-11-27 15:32:14 +01:00
Piotr Fusik 87bb6afa56 Move stamps allocators from memory manager to CSR. 
Change-Id: Ib399e462cdddad89fcc470df4c4f0f5e4591a6b2
 2018-11-27 14:52:06 +01:00
Dunajski, Bartosz 2d77b86e70 Allow Device creating multiple CSRs [5/n] 
- Move Engine type to OsContext
- Move OsContext to CSR
- Improve EngineMapper logic
- CompletionStamp cleanup

Change-Id: I935cb7169c8c48cd09837e20e3da06f6dd3437b9
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-11-27 14:25:04 +01:00
Pawel Wilma 71f6524197 Revert "Fix Read/WriteBuffer for unaligned offsets" 
This reverts commit 6ea863e440.

Change-Id: Ib58cfe4cffc022b1514c42131914eb2fe64fcbe0
 2018-11-27 12:35:03 +01:00
Milczarek, Slawomir 3b8ff44d55 AUB CSR with a separate function to write memory 
Move common code related to writing memory to dedicated function

Change-Id: I4ac8ec779cb40146bd27b8e40728d81d3b5b4276
 2018-11-26 20:21:19 -08:00
Dunajski, Bartosz 7781089740 Allow Device creating multiple CSRs [4/n] 
- Introduce additional RCS engine
- Set fixed size for Engines array

Change-Id: I06533a425684b64214f956783b07877e6157935b
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-11-26 09:40:44 +01:00
Milczarek, Slawomir cd5f85052e AUB CSR with a separate function to submit batch buffer 
Move code related to batch buffer submission from flush to dedicated function
Add parameter to pass aub file name from AubCenter to AubManager

Change-Id: I20abb3c8bd92114b3bc9caa2a6291dc1bbddad2a
 2018-11-25 18:02:25 -08:00
Mrozek, Michal 61e7ae9280 Refactor pipe control post sync programming. 
Change-Id: I81f4840345494c6d32679e29faaff786677cb4b0
 2018-11-23 11:42:32 +01:00
Mateusz Jablonski 352450adaa Pass number of os contexts to Graphics Allocation constructor 
Mark unshareable allocations

Change-Id: Ie745dc639d8c6b01e2275d29ee1fb4c6343df2bc
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2018-11-21 17:38:02 +01:00
Pawel Wilma 2f15ca0508 Add AUB registry key for additional MMIO registers list 
Change-Id: Ib478e91d8df21c48f83bfa97a4ea72c41c2f065d
Signed-off-by: Pawel Wilma <pawel.wilma@intel.com>
 2018-11-21 16:41:44 +01:00
Dunajski, Bartosz d6870a896b Reduce tag pool size to 1 for AUBs 
Change-Id: I3a3513250b10e899795e149bff2739193a725f84
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-11-20 11:42:32 +01:00
Venevtsev, Igor 6ea863e440 Fix Read/WriteBuffer for unaligned offsets 
Change-Id: Ia8daff3e95bd724a9f678eb471dbb44a66cc0bc7
 2018-11-20 09:25:12 +01:00
Dunajski, Bartosz ac15e7f3ac Unify expectMemory in Aubs and introduce expectMemoryNotEqual 
Change-Id: Ifd52f2d3ad3badf6ea9dac2c2b9873a40efa8482
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-11-19 10:39:45 +01:00
Mateusz Jablonski 66492a53a4 Change type of residency task count to uint32_t 
Move definitions of objectNotUsed and objectNotResident to GraphicsAllocation

Change-Id: I2aec604a865cc6c975e9d1121028cbdd35c0b18a
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2018-11-16 16:04:48 +01:00
Mrozek, Michal 08424d798f Enable power saving mode for queues created with throttle hint low. 
- When queue is created with throttle hint low it should be power conservative
- With this change whenever queues with low throttle setting requests wait
for GPU completion, such wait will be handled in power conservative manner.
- Whenever GPU is not completed, waiting thread will be put to sleep and will
for GPU completion that triggers the wake up interrupt.

Change-Id: I9f34872a38ab9f5952f9d9623ea43503fc3dd587
 2018-11-16 15:20:31 +01:00
Dunajski, Bartosz 9345b25352 AUB services update 
Change-Id: I451794f78fa0379c3f5f8cd7a913f350d0decb3c
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-11-16 11:08:47 +01:00
Mrozek, Michal b102f8556e Add missing makeResident call on debug surface. 
Change-Id: I9c2d1bcf608dbfc71a3859b237e249d41810c153
 2018-11-16 09:38:55 +01:00
Mateusz Jablonski 0e0a280803 Create structure UsageInfo for task count and residency task count 
Change-Id: I0899c88d9e567a09ba46461ae69cf6c80f713e67
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2018-11-15 14:07:05 +01:00
Piotr Fusik e66920a8f8 Fix typos. 
Change-Id: Ie7add32684f812e11281668d9b93910384086c62
 2018-11-15 12:18:03 +01:00
Piotr Fusik 76efeae9d8 Pass more information to programPipelineSelect. 
Change-Id: Iaabe60742269b721f8defe71306dd6e87d60d546
 2018-11-15 11:45:45 +01:00
Milczarek, Slawomir 1a4628cd8e AUB file with information about driver version 
Change-Id: I7f8e01236962580515f36d72805d33af40d5fd2d
 2018-11-14 19:46:45 +01:00
Hoppe, Mateusz 0942edd6af Update aub_stream headers 
- pass hwInfo and localMemoryEnabled to AubCenter ctor
- initialize AubCenter in Platform:intialize() when Device is
 created - only when CSR is not CsrHw
- move aub_center files to runtime/aub directory

Change-Id: Iceb4bf1cb2bb55b42d438502cca667a449f11411
 2018-11-13 18:09:30 +01:00
Hoppe, Mateusz 12ece3a220 Reorder STATE_BASE_ADDRESS and STATE_SIP 
- STATE_SIP should be added after STATE_BASE_ADDRESS
- tests refactor.

Change-Id: I000316b70db714fb227b6174f793d4bf8806ea9a
 2018-11-13 17:57:51 +01:00
Milczarek, Slawomir aa18a62d70 A partial unification of AUB and TBX CSR classes 
This commit moves initialization of global MMIOs from AUB CSR to Simulated CSR

Change-Id: I93a612d4f0c82e7135287f6508870190790141bc
 2018-11-10 13:12:22 -08:00
Woloszyn, Wojciech 549b73510c Flush L3 for reduced address space platforms 
Change-Id: I5a73e72f8e309137328930920ab174ba6f1378dc
 2018-11-06 14:26:59 +01:00
Mateusz Jablonski 815ae851b7 Graphics Allocation: store task count per context id 
Move definition of allocations list method to internal_allocation_storage.cpp

Change-Id: I4c6038df8fd1b9335e8a74edbab33b78f9293d8f
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2018-11-06 12:43:47 +01:00
Zdanowicz, Zbigniew ce75767ca3 Add AUB registry key to override MMIO offset value 
Change-Id: Iac3bf9074e544a03e38fc437d7b21ea478d9cc5d
 2018-11-03 00:33:50 +01:00
Hoppe, Mateusz e6b93941ee Add aub_stream headers 
Change-Id: I4d9420210e2a06d8a36abc0cf272901514ff3547
 2018-11-02 14:29:45 +01:00
Mrozek, Michal 7ece16ee7a Graphics Allocation cleanup. 
- remove one constructor
- start using mock graphics allocation in tests

Change-Id: Idb8f4a35dbc2cae8d6bf667bab5542d8e91d6e0d
 2018-10-31 11:54:24 +01:00
Milczarek, Slawomir 4a8f4aa47b Add hash function for AUB dump handle 
Change-Id: I3f53f187a31ca47e7cf2717f328c216469171f90
 2018-10-30 19:54:36 -07:00
Milczarek, Slawomir b051528258 Add getter for handle to AUB dump allocations 
Change-Id: I30251145775e9d81e307c983236bd2cc0568a74d
 2018-10-30 12:06:17 -07:00
Mateusz Jablonski ead2e2ea6d Move createAllocationForHostPtr method to command stream receiver 
Remove not needed includes from command_queue.h

Change-Id: I45963bf005471bd7716d55471474299a15e27b62
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2018-10-30 17:49:08 +01:00
Mateusz Jablonski d3f71cfb04 Move allocation lists to internal allocation storage 
Change-Id: I543f1551c8fb161cf99c5870de44afec390415b2
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2018-10-30 13:49:31 +01:00
Mateusz Jablonski a30c70d84b Remove cleaning allocation lists methods from memory manager 
Change-Id: I4a58a5373e7dc4cf8dc5d90390e84c4f23689139
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2018-10-29 10:35:03 +01:00
Milczarek, Slawomir 7b1d19eaec Moved header with engine node definitions 
Change-Id: Iaa78bb0584589e354b1bb469b729844121decb8f
 2018-10-27 14:51:02 -07:00
Mateusz Jablonski baa9ce74a7 Remove obtainReusableAllocation method from memory manager 
Change-Id: I629044d109822f02cfddc6418f025010e62ab65b
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2018-10-26 09:06:20 +00:00
Mateusz Jablonski d5c9816428 Remove store allocation methods from memory manager 
Move setGPUAddress method to WddmAllocation

Change-Id: I91d877c3791e9eff69276e4258e3ce9c3111ca45
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2018-10-26 10:53:43 +02:00
Mrozek, Michal 56d10d7fb9 Enhance AUB comments. 
Change-Id: I1ff53c9f60950cfe34706153578e86f8d36fc941
 2018-10-25 17:58:44 +02:00
Milczarek, Slawomir cd8f08b94b AUB CSR functions to operate on engine instance 
Change-Id: I928cf5f7c25980fdfb2da825cbe062b5497c328a
 2018-10-24 16:33:11 -07:00
Mateusz Jablonski a531751001 Remove ULT code from runtime 
Change-Id: I2faf52070f980d031788fc6946df8534d96c639b
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2018-10-24 17:45:08 +02:00
Milczarek, Slawomir 9be4850213 AUB capture with a capability to get engine instance 
Change-Id: I52c47505476053d6e692fc9d89cca25a6e122a63
 2018-10-23 11:58:13 +02:00
Mateusz Jablonski 7bd92190d9 Create class to operate on command stream receiver's allocation lists 
Change-Id: I4262f46aa31948ed70d1152d172619b5619a2333
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2018-10-23 09:42:31 +02:00
Mateusz Jablonski 3bd8d71f0a Don't call command stream receiver's cleanupResources twice 
Change-Id: I9cce3eacbb805770658be91c55e1fa69dc4bae5d
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2018-10-19 15:31:01 +02:00
Dunajski, Bartosz ef65e6433e Improve EnableTimestampPacket debug variable usage 
Change-Id: I864f0dc756a7fe17a08d1bcca2d91e9b78fb730a
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-10-18 14:25:46 +02:00
Dunajski, Bartosz 6d610983f1 Deferred Pipe Control programming and CSR flush on Barrier request 
Change-Id: Iabae0f9159bb455518cedf7da068c7d3da72b840
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-10-17 09:31:34 +02:00
Mateusz Jablonski 4f028d13a1 Command stream receiver: use memory manager from execution environment 
Change-Id: I236218a73bd7dac6e5744e3596f146b77b5ca1c8
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2018-10-16 12:14:55 +02:00
Piotr Fusik 7543c1fb2a Flush AUB before HW or TBX. 
Change-Id: Ia997c6c05b2a1cb5c1968113b94ca66fbf1efe89
 2018-10-13 10:52:19 +02:00
Mateusz Jablonski 8a9d0a81df Move temporary and reusable allocation lists to command stream receiver 
Change-Id: I40df6fe39b367e243e3710c5fdeaab3c85198d9d
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2018-10-11 15:32:12 +02:00
Dunajski, Bartosz 66427f60c6 Handle TimestampPackets for non-kernel enqueues 
Change-Id: I52ec4f43b10bf6e2a10b2455d32a90a606645d29
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-10-10 04:21:30 +02:00
Pawel Wilma a05f832f80 Fix for batch buffer flattening 
Change-Id: Ib13ec6573b985cf03876bd7e37a31606b230a790
 2018-10-09 12:28:40 +02:00
Maciej Dziuban 130a7ac8b8 Delete TypeSelector helper 
Change-Id: Iff5fe62d31fa7b07658cfcf81ebd2c12d47e2b3b
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2018-10-08 13:18:36 +02:00
Hoppe, Mateusz 2f7158e035 Move createPhysicalAllocator() to a common CSR class 
- AUB and TBX use this method and it was duplicated,
- moving to common base class allows to remove duplicates

Change-Id: Ia9f08dfb0967de1b5968ac0e531733c5b868e504
 2018-10-08 11:38:57 +02:00
Dunajski, Bartosz 73b2e947a5 Multiple TimestampPackets handling 
Change-Id: Ia5936c3d0a34b892aa4444026a5aebc681f126c2
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-10-05 01:54:35 +02:00
Maciej Dziuban bc4700a193 Add OsContext argument to MemoryManager::makeNonResidentEvictionAllocations 
OsContext has to propagate through following calls first:
- WddmCommandStreamReceiver<GfxFamily>::processEviction
- CommandStreamReceiver::makeSurfacePackNonResident

Change-Id: I7559c7406b2860c51905c9961cec251fac231b08
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2018-10-05 01:28:31 +02:00
Koska, Andrzej 2110ba6ca4 Passing correct taskCount to waitForTaskCountAndCleanAllocationList 
Change-Id: Ib0d2474bcd5827f8030331f7ef45ffc2805b955b
 2018-10-04 23:53:43 +02:00
Milczarek, Slawomir 61000c0dd4 CSR AUB + HW mode - flush to poll MMIO for completion 
Ensures that each submit of LRCA be serialized through the simulator
like it is for AUBs captured in the standalone mode.

Change-Id: I1e3ad500012dce960d0e64b56af1cb60142772da
 2018-10-04 10:32:08 +02:00
Mateusz Jablonski b602cd2bb8 Pass execution environment to memory manager 
Change-Id: If43cf9d1353b4cbc02ea269fb9105c01cc4e0876
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2018-10-03 22:12:26 +02:00
Milczarek, Slawomir ec48ccecdb AUB CSRs to use a shared address mapper (CPU VA to GTT VA) 
This commit moves address mapper from CSR to execution environment
in order to generate unique GTT VA for LRCA, HWSP and ring buffer
between different CSRs.
Additionally, moved the rest of AUB file stream tests to separate module.

Change-Id: I02ae44202c0255277a7ac17532485419e0c403ab
 2018-10-03 12:50:25 +02:00
Milczarek, Slawomir 2227386eb7 CSR with AUB dump to call makeNonResident on AUB CSR 
AUB CSR can implement additional actions to be taken on makeNonResident
such as dumping buffer and image resources.

Change-Id: Iab76081116011e0882de3c902db74a5dc4dd0b36
 2018-09-29 00:23:40 +02:00
Maciej Dziuban 41e8d70363 Change makeSurfacePackNonResident argument to a reference 
Change-Id: Ic95ad2406184e91a78c152fad3fe6f0f4ebb24ae
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2018-09-28 18:08:18 +02:00
Dunajski, Bartosz cbd017d495 Handle TimestamPacket with implicit dependencies ownership 
Change-Id: I22a4de4e9eb904c359583e235e0de54a7c743e07
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-09-28 01:48:02 +02:00
Hoppe, Mateusz 7ddf1d554b Move getAddressSpace from AUB & TBX CSRs to CSRSimulatedHw 
Change-Id: Iaa6164445f55efba3681fc41e2ec614f999e1362
 2018-09-27 10:43:00 -07:00
Pawel Wilma e06aa17dfc Grf configuration 
Change-Id: I3741f53a38c6707b0c8ad82ae553ea65ae6917e4
Signed-off-by: Pawel Wilma <pawel.wilma@intel.com>
 2018-09-27 17:57:19 +02:00
Hoppe, Mateusz 465e1a3165 Fixes for AUBs 
Change-Id: Iac55927eb96db8dd68b86d21e66392039ba1f058
 2018-09-27 06:38:19 +02:00
Hoppe, Mateusz 64c891f0fd Use specific address for Allocator32Bit in AUB CSR 
Change-Id: If3fd466fcfea21c1967b10def57acf67ccfdc5e6
 2018-09-26 16:01:07 -07:00
Milczarek, Slawomir efdbde245a AUB CSRs to use a shared physical address allocator 
This commit introduces AUB-specific control class to execution environment.

Change-Id: I525c9c93a4f10f769dbedb7d097674c35693f0b1
 2018-09-26 20:31:56 +02:00
Maciej Dziuban 95e4dc4152 Delete unneeded residency/eviction allocations mutators 
Change-Id: Ic73ea4c4e3ebf422f935a440a1b4789fe1c15494
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2018-09-26 13:02:19 +02:00
Mrozek, Michal 4912f41759 Add additional layer for common AUB & TBX stuff. 
- Move one function there.
- This layer will cover common functions that are not branch specific.

Change-Id: Ia8a288f8f51647a333a73f35cf999df9f2d5f5b1
 2018-09-26 02:20:59 +02:00
Mrozek, Michal f564792895 Create common class for TBX & AUB. 
- Move one method there.

Change-Id: I96cc0a64e24e4931a8d71a552f5cbf22bf99bfc2
 2018-09-26 01:24:59 +02:00
Hoppe, Mateusz dfd4e767e0 Introducing AubFixture with minimum required initialization 
- fixture is creating AUBCsr or TBXWithAubCsr only and sets
executionEnvironment used by Device
- this sequence ensures correct initialization without redundant
objects creation
- adding new AUB test: AubWriteCopyReadBufferTest

Change-Id: I678410585c91c008fc53a44b13e885e970fd315b
 2018-09-25 23:03:21 +02:00
Maciej Dziuban f48b90ffee Change CommandStreamReceiver::flush() argument to a reference 
Change-Id: Ic933a297d4c4e243138d0d62323ba82a8b91240f
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2018-09-25 17:28:44 +02:00
Milczarek, Slawomir ee797c2f14 Multiple AUB CSRs to operate on a single file stream 
This commit introduces AUB stream provider class to produce
a single file stream in multi device scenarios with multiple AUB CSRs.

Change-Id: Id70e0d680459d34f4291b9e56aa39d960f025ac6
 2018-09-23 05:41:00 +02:00
Hoppe, Mateusz 91aaa92fb6 Refactor PhysicalAddressAllocator 
- create allocator dynamically in AUB & TBX CSRs

Change-Id: I3b01a3fc2f4824b552ef27cbda5bdcc140e92e53
 2018-09-21 21:48:57 +02:00
Hoppe, Mateusz a470aa2072 Get AddressSpace to expectMemory from page table entry bits 
Change-Id: I1aacdf98f436261b523765e0ca591e8d8333274e
 2018-09-21 16:44:55 +02:00
Piotr Fusik 7de297763f Fix duplicate include. 
Change-Id: Iaecbf3664bd09006070b31e1e7490d297dcd3de1
 2018-09-21 05:20:15 +02:00
Artur Harasimiuk 40146291ad Update copyright headers 
Updating files modified in 2018 only. Older files remain with old style
copyright header

Change-Id: Ic99f2e190ad74b4b7f2bd79dd7b9fa5fbe36ec92
Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com>
 2018-09-20 18:02:35 +02:00
Mrozek, Michal 78f828fcd1 Make residency in graphics allocation OsContext dependent. 
- Graphics Allocation now holds residency control per OsContext.

Change-Id: Ie0a0d3aa9fdaf542fdd42dee3aba236a5af635c7
 2018-09-20 16:44:04 +02:00
Hoppe, Mateusz c39f9c0c66 Add addressSpace to AubFileStream::expectMemory 
- addressSpace can be passed as argument from layers above
where address space is known

Change-Id: If9075dde4e207296df91b46eccecd0b5fa183aa9
 2018-09-20 15:23:15 +02:00
Venevtsev, Igor 7c94409ce8 Change MemoryManager::allocateGraphicsMemoryInPreferredPool() signature. 
Remove allocateMemory param.
Add AllocationFlags and DeviceIndex params.

Change-Id: I3ba048f8ea9840a047a3222dc1e97be2105c2222
 2018-09-20 13:04:21 +02:00
Hoppe, Mateusz 4af432ae10 Store page entry bits in PageTable entries 
- set Present bit when entry is allocated regardless entry bits passed.

Change-Id: Ib1393927f66c4ed0b577a4df58d2760fbff86df7
 2018-09-20 09:25:34 +02:00
Dunajski, Bartosz 097d09c593 Make resident all TimestampPacket allocations from Events 
Change-Id: Ic4d2d1a328dca204675c4d0aee6a7efb5a71f940
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-09-19 01:53:12 +02:00
Milczarek, Slawomir 65dc5fb7de Generate multiple devices in AUB and TBX CSR modes 
This commit adds a capability for a driver to generate multiple devices
and hwinfo in AUB and TBX CSR modes.

Change-Id: Icc0eac7c16760d3d4ae6ef08cd0be950b45d35e7
 2018-09-18 18:03:41 +02:00
Hoppe, Mateusz 619d2217cb Pass AubHelper to reserveAddressPPGTT(). 
- get PageTable entry data hints and address space from AubHelper
based on local memory flag
- add enableLocalMemory flag in CSR HW

Change-Id: I061bda62be8da55d52cff48ecddcf26c4212dc67
 2018-09-17 18:48:06 +02:00
Maciej Dziuban ac1d2b9901 Change processResidency argument to a reference 
Change-Id: Ie313a8cc4e479a314bcf170917397c13fbb70d14
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2018-09-14 13:36:20 +02:00
Hoppe, Mateusz 610eda5ad1 Add PhysicalAddressAllocator to PageTables 
- Allocator is responsible for physical pages allocation

Change-Id: I3a9034c87292484da8f4f0eb1d1e0cc5122a4d8a
 2018-09-14 13:23:07 +02:00
Maciej Dziuban 8df30ceac1 Move residency and eviction allocations from MemoryManager to CSR 
Change-Id: I44185b35375f4cc9d58cac14cac1edefaacde652
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2018-09-14 13:19:55 +02:00
Maciej Dziuban da5a292e54 Delegate MemoryManager residency and eviction calls through CSR 
MemoryManager::getEvictonAllocations()
MemoryManager::pushAllocationForEviction()
MemoryManager::clearEvictionAllocations()
MemoryManager::clearResidencyAllocations()

Change-Id: Iaa3051965bc9dfc09384e2bd5e9e0c372b5e722a
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2018-09-14 08:18:04 +02:00
Maciej Dziuban fafde2ec15 Delegate all MemoryManager::getResidencyAllocations() calls through CSR 
Change-Id: I9cfbfd86d39b5341598ff2bd8883e13605c58b72
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2018-09-13 14:56:06 +02:00
Zdanowicz, Zbigniew 888b067adc Encapsulate creation of Scratch Space surface 
Change-Id: Ifd1d794e0d8b7053cf5c37bdd867ab64f84241cc
 2018-09-13 14:49:28 +02:00
Maciej Dziuban 81a1e435f9 Delegate all MemoryManager::pushAllocationForResidency() calls through CSR 
This prepares for moving this method from MemoryManager to CSR.

Change-Id: I82393289c48990f26ed3ac922bcd64e2b6c11f28
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2018-09-13 14:33:16 +02:00
Milczarek, Slawomir a7d41d95b4 AUB subcapture in filter mode to define start/end indexes to a given kernel 
This commit introduces new controls to define start/end indexes
that apply only to the kernel specified by name for a sub-capture

Change-Id: I7ad7674d115f9addd35c44d824aee0731060881e
 2018-09-13 11:13:33 +02:00
Mrozek, Michal 8e33ec04c5 Create separate command stream receiver for every device. 
Change-Id: I8073380941e2a3bfe57610e6e437bdc177dcc2d5
 2018-09-12 09:32:41 +02:00
Maciej Dziuban d24a0accd9 Get rid of processResidency() calls with null ResidencyContainer 1/n 
Change-Id: Ifeed7d1154ed07988ee2196a95013eae4d5a80d0
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2018-09-11 15:32:11 +02:00