Commit Graph

79 Commits

Author SHA1 Message Date
165d1e4e55 Use GfxPartition for GPU address range allocations
[2/n] - OsAgnosticMemoryManager

Related-To: NEO-2877

Change-Id: I887126362381ac960608a2150fae211631d3cd5b
Signed-off-by: Venevtsev, Igor <igor.venevtsev@intel.com>
2019-06-25 12:54:20 +02:00
3e88907201 Enqueue Read/Write operations with blitter
- Program dependencies from Event and IOQ
- Obtain new TimestampPacket
- Update output TimestampPacket if needed

Change-Id: I4ad020f5c5b05ceca8b096fafe1257523e2bc343
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
Related-To: NEO-3020
2019-06-17 12:01:37 +02:00
74a8406cb8 Support offsets in blitWithHostPtr
Related-To: NEO-3020

Change-Id: I8476cc80311495bb16324d1fe8427a77c2e04556
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
2019-06-05 13:07:44 +02:00
c8c2e64ec6 Add blocking flag for bliter operations
Change-Id: I61f672780c2108961eaed40b5d5be257f3c34566
Related-To: NEO-3020
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2019-06-04 21:39:43 +02:00
befbffc967 Support offsets in blitter
Related-To: NEO-3020

Change-Id: I7ce13f0cf890c47fd40e92b5bb20c4f4ce291653
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
2019-06-04 16:16:37 +02:00
b98b51b0d9 Move ptr.h to core folder
Change-Id: Icf0db7c767b2b1ea44fccc02b135f0f6c1f78c8f
Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
2019-05-29 00:11:34 -07:00
52dc359511 Return zero as scratch required GSBA when no scratch allocation present
Change-Id: Idc59b6d0193b7310d9330432df8ccf300a93a912
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2019-05-23 11:41:19 +02:00
7390e456a4 Add getter of Scratch Controller to the CommandStreamReceiver class
Change-Id: Iba0a9d7e4a9f141e1e31de428d50e7c745ad993a
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2019-05-21 17:25:05 +02:00
b82cdd6b8e Program MI_SEMAPHORE_WAIT for dependencies during blit operations
Change-Id: I8b0e467886bfb23d026a0c13be514343a22a20a1
Related-To: NEO-3020
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2019-05-21 14:18:16 +02:00
4f4ef14b9b Accept different copy directions during blit operations
Change-Id: Idb59458b46337ca0095056857dbd75bf116b6723
Related-To: NEO-3020
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2019-05-16 18:53:30 +02:00
a3ad3b9fa2 Clean temporary allocations after Blit operation
Change-Id: I5c9b6778c93c7422bb84ee367dbf298df5e06cab
Related-To: NEO-3020
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2019-05-10 14:55:27 +02:00
67d39b19db Add pitch programming to Blit dispatch and align max width to cacheline
Change-Id: I37a15ddc64c9e41cd4cd718133b17d572bb71ba2
Related-To: NEO-3020
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2019-05-09 16:08:06 +02:00
a2ed01bc3e Use waitForTaskCountWithKmdNotifyFallback in blitFromHostPtr method
Change-Id: Ib70df07e2a7cef514037c9327575ef8e867e6ca6
Related-To: NEO-3020
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2019-04-25 17:09:43 +02:00
62e2ca05e1 Update latestSentTaskCount before flush during blit dispatch
Change-Id: I44e1f4e8a70c17b902164491c6d58e8523160ac3
Related-To: NEO-3020
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2019-04-16 14:30:51 +02:00
e40a82336c Flush constructed Blitter command buffer
Related-To: NEO-3020

Change-Id: Ib5f4e111b3a64964ff2c79d4c057a616cdbf8d07
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2019-04-16 09:55:53 +02:00
9371bfb51f Add residency handling during blit dispatch
Change-Id: I797267af40ce8236a06d5b86fce2b673380c21a8
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2019-04-11 16:29:58 +02:00
ccd93e1ea8 Add method to dispatch blit operation from hostPtr to Buffer
Related-To: NEO-3020

Change-Id: If76f2c659c3ee343693a6d3ced86a47d7ed0bf61
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2019-04-10 15:17:44 +02:00
e201725dd5 Add dedicated map allocation
Related-To: NEO-2917

Change-Id: Ieeca40f5faf29433a5c464d2c3ca3b8910695a9b
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2019-04-09 16:16:31 +02:00
9e52684f5b Change namespace from OCLRT to NEO
Change-Id: If965c79d70392db26597aea4c2f3b7ae2820fe96
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
2019-03-26 15:48:19 +01:00
16aee8cc46 [2/n] Move Hardware Info to Execution Environment
- remove hwInfo from the csr functions where it was passed as a parameter,
now csr functions have access to hwInfo by Execution Environment

Change-Id: I756ae63d9728c9c963571147bab97f9e1c15797b
Signed-off-by: Adam Stefanowski <adam.stefanowski@intel.com>
2019-03-22 10:08:26 +01:00
8b57d28116 clang-format: enable sorting includes
Include files are now grouped and sorted in following order:
1. Header file of the class the current file implements
2. Project files
3. Third party files
4. Standard library

Change-Id: If31af05652184169f7fee1d7ad08f1b2ed602cf0
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
2019-02-27 11:50:07 +01:00
767f27a483 Add calculation of default SSH size in ULTs
Change-Id: I682f7cc671ab18de7a9976e0034842df0f6134bf
2019-01-04 09:28:21 +01:00
0ca8ee7f30 Additional programming for source level debugger.
- always program STATE_BASE_ADDRESS and STATE_SIP

Change-Id: Iea6327d062b4efdddd3b0060d3105b29745b9cba
2018-12-14 11:30:54 +01:00
010e1a4738 VFE state programming cleanup
Change-Id: I38fb47b00211a1d28244369ac417427ada145f61
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2018-12-13 17:44:40 +01:00
fe228ea5f7 Use GPU address in calculateNewGSH()
Change-Id: I82add7aab4b26444f288a9c4dbce6328578a03d2
Signed-off-by: Pawel Wilma <pawel.wilma@intel.com>
2018-12-05 10:33:35 +01:00
13f23dffdb Refactor UltCommandStreamReceiverTest test
- remove unnecessary dynamic allocations

Change-Id: I2580244c91fd3f6864c55807090823556b4c7906
2018-12-05 07:13:11 +01:00
7dbd0ea4f3 Move Scratch Space functionality to dedicated class
Change-Id: Ic7655c4b971513961aba6823478a139ffc943466
2018-11-29 11:55:56 +01:00
12ece3a220 Reorder STATE_BASE_ADDRESS and STATE_SIP
- STATE_SIP should be added after STATE_BASE_ADDRESS
- tests refactor.

Change-Id: I000316b70db714fb227b6174f793d4bf8806ea9a
2018-11-13 17:57:51 +01:00
40146291ad Update copyright headers
Updating files modified in 2018 only. Older files remain with old style
copyright header

Change-Id: Ic99f2e190ad74b4b7f2bd79dd7b9fa5fbe36ec92
Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com>
2018-09-20 18:02:35 +02:00
ad9710bec2 Refactor around binding table programming
Change-Id: I4cad63b11937531e36ea9d92cee606ea8941c9ef
2018-08-29 14:35:52 +02:00
1ad70dfebe Decouple memory manager and device
Change-Id: Ia64cc955e1d290cad4c50b6a2a41052d9acf0eec
2018-08-20 13:44:31 +02:00
1599ea800e Pass execution environment to command stream receiver.
Change-Id: I598f67f8b005b5ce8249b638e080657eb6dc3547
2018-08-08 17:10:39 +02:00
e18e9fb94e Move static methods from Gmm to new GmmHelper class
Change-Id: I84fbe94f0e1072324164086b456c71a46ae5040c
2018-06-27 16:46:09 +02:00
a9566e0c05 Return true in Device::isSimulation() when AUB or TBX CSR is selected
- when CSR is set to AUB or TBX (with AubDump) Device should
return true in isSimulation(). This method is used to set flag
m_IsSimulation in deviceQueue which is used by scheduler kernel

Change-Id: Ibdf07d4c940335fb0bb8448071b66d47e9391d71
2018-06-06 14:24:24 +02:00
413487e1d5 Split CommandStreamReceiver tests into multiple files
Change-Id: Ib114d4da3c94c8a20ff0551d2f9001da7f091000
2018-06-05 12:47:44 +02:00
996cb52370 Refactor ULTs and AUB tests around HW commands
Change-Id: Ie00822b9e0864af6ede3e967039efa911d1dbb6f
2018-05-22 13:59:30 +02:00
b27eee1f7a Refactoring ULTs around HW tests
Splitting HW tests into CMD-unrelated HW tests
and CMD-related HW tests

Change-Id: Ifbdcabdd0d6f4082e976363a3d8bcd5e7a9ce6c1
2018-05-18 11:45:45 +02:00
41f570ab50 Fix overestimation of MediaVfeState in CommandStreamReceiver
Change-Id: I38fd00f6b994f6a62921bcc09f293cabc95773d4
2018-05-15 11:13:20 +02:00
749d89a9bf L3 programming refactor 4/n
- Fix overestimation of preemption programming in preamble

Change-Id: I4ddfc6a2dacbe1160c68cdcef08125a5d5e74835
2018-05-14 15:39:28 +02:00
621a2dfcd1 [34/N] Internal 4GB allocator.
- Change dirty state helpers to work on IndirectHeaps.
- Instead of comparing size in bytes and cpu pointers, compare gpu base
address and size of the heap in pages
- That allows to not have dirty flag for heaps that are coming from 4GB
allocator.

Change-Id: I0ff81e3c0945b32e4f872a100cd10b332b27ed24
2018-05-12 16:01:30 +02:00
2bc2869fe1 Refactor ult's for preemption enabling part 2
Change-Id: If8e335e87f3a78d35cab12a17880fb1922d479f5
2018-05-10 13:12:03 +02:00
44d35b3534 L3 programming refactor 2/n
- Rename misnamed test function
- Adjust 2 tests, so they use CSR size getters instead of hardcoded values
- Move getSizeRequiredPreambleCS() into CommandStreamReceiverHw class
- Improve PreambleHelper size estimating

Change-Id: I3f292d50e08f3d10d190c9f8722e1f0498481154
2018-04-27 13:10:28 +02:00
82c9acddde Improve including common reg_configs header
Change-Id: I7fa22c2caffd0004269eb0d4f4fcdfd7621572af
2018-04-26 14:48:50 +02:00
a0c044e6d2 Extend batch buffer flattening in AubCSR to BatchedDispatch mode
- batch buffer flatening in batched mode
    - added MI_USER_INTERRUPT command
    - added GUC Work Queue Item

Change-Id: I35142da34b30d3006bb4ffc1521db7f6ebe68ebc
2018-04-26 12:45:02 +02:00
ace0fcfb83 Improve commands size expectations in flush task tests
Change-Id: I45c40a21ef0f4a789da4be29ec00d40abe19e589
2018-04-24 22:20:51 +02:00
1392b79b58 L3 programming refactor 1/n
- Clean up size estimation functions
- Make some tests gen specific

Change-Id: If9c15f311306282ba035b380e6d4cadc17584815
2018-04-20 22:34:35 +02:00
59df78cc18 [32/n] Internal 4GB allacator.
- Ensure that heaps passed as IndirectHeap to flushTask

Change-Id: Ib633e3d3027e142a1fdb51e78b970fb1bd1b9b0c
2018-04-18 08:49:08 +02:00
8583c68c8c [29/n] Internal 4GB allocator.
- Internal allocations may now coexists with non internal on reusable list.
- Caller now specifies if internal allocation is needed.
- If criteria are not met , then allocation is not returned.

Change-Id: I7da3a4f944768b7c8a873e44fd47248f1d76bf9e
2018-04-17 06:42:56 +02:00
079f94cd2d Refactor ult for preemption enabling
Refactoring in ULTs around preemption:
    -refactoring ULTS to not fail with default preemption mode
    -fixing ULT memory leaks observed after enabling preemption
    -mocking getSipKernel in ULTs (to minimize ULT execution time)

Change-Id: I194b56173d7cb23aae94eeeca60051759c817e10
2018-04-16 12:55:30 +02:00
e898b9e218 Source Level Debugger: SIP programming in preamble
- program SIP_STATE when either MidThread preemption is enabled
or kernel debugging is active
- device creates correct sip based on preemption mode and
active kernel debugging

Change-Id: I3e43b66ad00d24c2389fa4fc766dd47044b6af80
2018-04-13 14:40:08 +02:00