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39 Commits

Author SHA1 Message Date
Koska, Andrzej 4a49e7396a Replace imageRowPitch with imageSlicePitch 
Related-To: NEO-2665
Replace imageRowPitch with imageSlicePitch
  for read/write CL_MEM_OBJECT_IMAGE1D_ARRAY
Signed-off-by: Koska, Andrzej <andrzej.koska@intel.com>
Change-Id: I67bd0567dcee05027f3d25ef65796e332b9a4773
 2019-06-04 22:54:07 +02:00
Milczarek, Slawomir 1bf263f061 AUBDumpAllocsOnEnqueueReadOnly to not activate in path with map image 
Related-To: NEO-2717

Change-Id: Ida017557a58533323a214c59febfd8794ef4cf17
Signed-off-by: Milczarek, Slawomir <slawomir.milczarek@intel.com>
 2019-04-19 13:09:56 +02:00
Zbigniew Zdanowicz 0c6823afd6 Add map allocation for images 
Related-To: NEO-3097

Change-Id: I5bfd89fd597a8d55597ff7a2aa05b2abd278d5bd
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2019-04-18 14:46:06 +02:00
Mateusz Hoppe 4296588aa9 Use GPU address to compare with SurfaceBaseAddress in ULTs 
- remove redundant casts

Change-Id: I175801869f24be47dc6703b61bf26c0f8a1c77c6
Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
 2019-03-26 20:49:54 +01:00
Maciej Plewka 9e52684f5b Change namespace from OCLRT to NEO 
Change-Id: If965c79d70392db26597aea4c2f3b7ae2820fe96
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
 2019-03-26 15:48:19 +01:00
Maciej Dziuban 33c07c875f Do not insert PipeControl WA or DC Flush when not needed 
Change-Id: I71030273708f243324a566232528bce00a0361df
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2019-03-22 12:37:27 +01:00
Filip Hazubski 8b57d28116 clang-format: enable sorting includes 
Include files are now grouped and sorted in following order:
1. Header file of the class the current file implements
2. Project files
3. Third party files
4. Standard library

Change-Id: If31af05652184169f7fee1d7ad08f1b2ed602cf0
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2019-02-27 11:50:07 +01:00
Hoppe, Mateusz 3c47c418a9 Refactor HardwareParse::getSurfaceState() to return CPU memory 
- if SSH indirectHeap is passed, use CPU address instead of GPU
address programed in SBA command

Change-Id: Id2c8973db0dfe2d9562ee835a27c4d3c28ea3351
 2019-02-04 17:49:00 +01:00
Milczarek, Slawomir b11e0825c9 AUB capture with support for allocation dumps 
Change-Id: I90a2b75043c33af92e4557be37cde4b9699582c6
 2019-01-28 21:20:08 +01:00
Dunajski, Bartosz 3ad33bf1b8 Allow Device creating multiple CSRs [3/n] 
Add CSR from Device to CommandQueue

Change-Id: Iaccf3c73d25e357242837677777d0513e81f520e
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-11-23 10:51:34 +01:00
Mateusz Jablonski d3f71cfb04 Move allocation lists to internal allocation storage 
Change-Id: I543f1551c8fb161cf99c5870de44afec390415b2
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2018-10-30 13:49:31 +01:00
Mateusz Jablonski 8a9d0a81df Move temporary and reusable allocation lists to command stream receiver 
Change-Id: I40df6fe39b367e243e3710c5fdeaab3c85198d9d
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2018-10-11 15:32:12 +02:00
Filip Hazubski c75dc23b6e Change HWCMDTEST_F() tests to HWTEST_F() where possible 
Change-Id: Ibfe147a12b53f832723f83809770e1b203159f8f
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2018-10-02 17:29:46 +02:00
Artur Harasimiuk 40146291ad Update copyright headers 
Updating files modified in 2018 only. Older files remain with old style
copyright header

Change-Id: Ic99f2e190ad74b4b7f2bd79dd7b9fa5fbe36ec92
Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com>
 2018-09-20 18:02:35 +02:00
Maciej Dziuban 049ba5c625 Revert "Improve build time: command_queue tests" 
This reverts commit 76c78f017e.

Change-Id: Icb7eb473a17de5c072ba1833812fa084c4873465
 2018-09-10 14:54:55 +02:00
Maciej Dziuban 76c78f017e Improve build time: command_queue tests 
Change-Id: I22f7788bacd4a36488d5b6d56bae79b1f4788625
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2018-09-07 13:38:22 +02:00
Artur Harasimiuk 02b8055897 Revert "Improve build time: command_queue tests" 
This reverts commit 41811852db.

Change-Id: I74d4dba4aa0d840ddd8eeacf5b40503ff54b7c5a
Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com>
 2018-08-27 19:17:52 +02:00
Dunajski, Bartosz 41811852db Improve build time: command_queue tests 
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
Change-Id: Ia80a8bfed28789c6c7a53478cdd56f883d61adf3
 2018-08-27 14:13:06 +02:00
Hoppe, Mateusz aaf2f94887 Fix zeroCopy property for images 
- zeroCopy means no need for data transfer when cpu transfer is
chosen during map/unmap operations
- tests cleanup

Change-Id: Id312267e51d593781c6fe536b6e96f42f32e5c02
 2018-08-23 16:45:05 +02:00
Milczarek, Slawomir f6f9c0f456 Add notify functions to enqueue read buffer and image calls 
This commit adds notifications to enqueue read buffer and image calls
and setters/getters to mark/check if an allocation is dumpable.

Change-Id: I123f24752d2a86abcf934e0d404f4e0ecf1729cc
 2018-08-22 21:43:17 +02:00
Maciej Dziuban b91c14f70e Delete Device::getBuiltIns() 
Change-Id: I9d1968dfb2ba4a56020fd17152119add726106e1
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2018-08-22 16:54:53 +02:00
Zdanowicz, Zbigniew 00170eb998 Refactor ULTs checking DSH usage 
Change-Id: I02d1aece9a13c75508feef0af7a7322dd9fc7852
 2018-08-22 10:33:38 +02:00
Maciej Dziuban e0e48203d2 Move BuiltIns to ExecutionEnvironment 
Change-Id: Ib2a1b82cc7858c898bb32820aad106a01d1325ad
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2018-08-21 23:15:47 +02:00
Stefanowski, Adam 623314665b Set valid "max number of threads" in MEDIA_VFE_STATE 
Change-Id: Icd55fe6b5cae5a92021d2692fe09c19535e64121
 2018-07-19 15:17:17 +02:00
Zdanowicz, Zbigniew b27eee1f7a Refactoring ULTs around HW tests 
Splitting HW tests into CMD-unrelated HW tests
and CMD-related HW tests

Change-Id: Ifbdcabdd0d6f4082e976363a3d8bcd5e7a9ce6c1
 2018-05-18 11:45:45 +02:00
Maciej Dziuban 541735d932 L3 programming refactor 3/n 
- Add L3UltHelper to be able to tell if L3 config is programmable
- Run L3 config kernel tests according to its output

Change-Id: I55b76e2da325d28f62b0bde20250b68f02154ae2
 2018-05-10 12:43:10 +02:00
Dunajski, Bartosz 82c9acddde Improve including common reg_configs header 
Change-Id: I7fa22c2caffd0004269eb0d4f4fcdfd7621572af
 2018-04-26 14:48:50 +02:00
Artur Harasimiuk 75d497a9a9 separate BuiltinDispatchInfoBuilder from built_ins.h 
We don't need BuiltinDispatchInfoBuilder in every place where built ins
are used. specifically in .cpp files generated from kernel binary.

Change-Id: Ie739951cdc93873993f78ad14cee656122af51fd
Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com>
 2018-04-19 12:32:13 +02:00
Mrozek, Michal de315db953 [24/n] Internal 4GB allocator. 
- Refactor tests for better maintenance
- Remove duplicated code.

Change-Id: I154cad43610497d2e1cabf99217820735d3868cd
 2018-03-30 09:12:08 +02:00
Mrozek, Michal 9bdf01468e [20/n] Internal 4GB allocator. 
- Switch to internal heap for kernel ISA allocations.
- remove IH from various functions
- remove IHState from CSR , IH is never dirty
- ISA is no longer copied on enqueue calls.

Change-Id: I0099cf2a9ebab6192ea03a74dd35f7da963fd5a5
 2018-03-28 16:07:26 +02:00
Woloszyn, Wojciech 0ad81024b7 Implement cl_khr_mipmap_image [1/n] 
- Add mipmap image handling for clEnqueueReadImage, clEnqueueWriteImage
- Fix mipmap image handling for clCreateImage

Change-Id: I42938a330b55c7e69a16c26dce3ab5d66f8a8938
 2018-03-21 10:51:13 +01:00
Jobczyk, Lukasz 37443c19a2 Fix enqueueWriterImage and enqueueReadImage test 
- set proper regions
- fix typos
- set proper expectations

Change-Id: I3d57cb7e3f9273fe7515f6bb7fb3beaa10e969eb
 2018-03-20 15:59:33 +01:00
Mrozek, Michal 1602fa5a88 [7/n] Internal 4GB allocator 
- rename getBase to getCpuBase
- change some test names accordingly.

Change-Id: I6fb2e4714298250147ea7766a916d7f5d62edc54
 2018-03-05 22:16:14 +01:00
Zdanowicz, Zbigniew 45dedb37f3 For HostPtr surfaces of enqueue calls use GPU address 
Change-Id: I67bf5076d23d43438f5e82c5cb6cbd3b9ed2f152
 2018-02-14 15:44:27 +01:00
mplewka 4db1e3af6a Check zeroCopy flag for r/w images/buffers 
Change-Id: I7047ae8458bdf3528d6014137522a37561d15ab6
 2018-02-08 13:55:44 +01:00
mplewka 21c1dce943 Enable zero copy for enqueueImage r/w with hints 
Change-Id: I6d4379b4bebaca162f859ea790f6a77475f7e94e
 2018-02-06 19:00:15 +01:00
Mateusz Jablonski 13ac81f465 Change pipeline select programing 
- Program one PS with gpgpu selection and media sampler
- Program PS only when media sampler requirement changed
  or when preamble was not sent

Change-Id: I85ba3f74087733e79d048e120aeb8b4b04796e00
 2018-01-18 14:39:47 +01:00
Chodor, Jaroslaw 044fd1ab81 Fixing IntDescr programing for blocked cmd and MT 
Fixing InterfaceDescriptor programming for
blocked commands when MidThread preemption is
enabled
Additionally, fixing couple of tests that block
global preemption enabling in ULTs

Change-Id: I454c9608f8606f23d7446785ac24c7c7d8701ae0
 2018-01-17 12:19:07 +01:00
Brandon Fliflet 7e9ad41290 Initial commit 
Change-Id: I4bf1707bd3dfeadf2c17b0a7daff372b1925ebbd
 2017-12-21 00:45:38 +01:00