Commit Graph

117 Commits

Author SHA1 Message Date
64f735481d Cleanup includes 48
Cleaned up files:
shared/source/command_container/command_encoder.inl
shared/source/os_interface/hw_info_config.h

Related-To: NEO-5548
Signed-off-by: Warchulski, Jaroslaw <jaroslaw.warchulski@intel.com>
2023-02-10 17:23:02 +01:00
a2e6a8284b Cleanup includes 47
Cleaned up files:
level_zero/tools/source/debug/windows/debug_session.h
level_zero/tools/source/sysman/memory/windows/os_memory_imp.h
level_zero/tools/source/sysman/windows/kmd_sys_manager.h
opencl/test/unit_test/aub_tests/command_stream/copy_engine_aub_tests_xehp_and
shared/source/command_container/command_encoder.inl
shared/source/command_stream/command_stream_receiver_hw_xehp_and_later.inl
shared/source/helpers/blit_commands_helper_base.inl
shared/test/unit_test/image/image_surface_state_fixture.h
shared/test/unit_test/os_interface/windows/os_interface_win_tests.h

Related-To: NEO-5548
Signed-off-by: Warchulski, Jaroslaw <jaroslaw.warchulski@intel.com>
2023-02-10 17:07:30 +01:00
7e0401d280 Add improvements to heap estimation in level zero command lists
- add estimation parameter for interface descriptor data count
- add to the heap estimation alignment parameter for dynamic and surface heaps
- extend encode interface and implementations to allow child heaps

Related-To: NEO-5055

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2023-02-03 20:26:27 +01:00
2484c7ceb2 refactor: rename hw_helper files to gfx_core_helper files
Related-To: NEO-6853
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
2023-02-01 19:37:51 +01:00
27393c76ea refactor: don't use global ProductHelper getter 11/n
Related-To: NEO-6853
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
2023-01-26 08:16:52 +01:00
49837b7bb5 Cleanup includes 39
Cleaned up files:
shared/source/command_container/command_encoder.h

Related-To: NEO-5548
Signed-off-by: Warchulski, Jaroslaw <jaroslaw.warchulski@intel.com>
2023-01-23 11:56:42 +01:00
ce059e7fe3 fix: align up surface size in surface state
don't abort when surface size is not aligned
underlying memory size is always aligned

Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2023-01-20 05:55:47 +01:00
9f3fc6858e Cleanup includes 16
Cleaned up files:
shared/source/built_ins/built_ins.h
shared/source/command_container/command_encoder.h
shared/source/helpers/hw_helper.h
shared/source/memory_manager/allocation_properties.h
shared/source/xe_hpc_core/hw_cmds.h
shared/test/common/test_macros/test_excludes.h

Related-To: NEO-5548

Signed-off-by: Warchulski, Jaroslaw <jaroslaw.warchulski@intel.com>
2022-12-29 15:12:37 +01:00
f275eea6ec Cleanup includes 14
Cleaned up files:
shared/source/device/device.h

Related-To: NEO-5548

Signed-off-by: Warchulski, Jaroslaw <jaroslaw.warchulski@intel.com>
2022-12-23 10:46:34 +01:00
d2c218efe3 Add a patch to command encoder for samplers when DSH is dirty.
Signed-off-by: Tratnack, Geoffrey geoffrey.tratnack@intel.com
Related-To: LOCI-3365
2022-12-09 11:08:23 +01:00
818db03a68 LOCI-3365: Cleanup MediaInterfaceDescriptorLoad logic in command encoder
Add a patch to command encoder when DSH is dirty.

Signed-off-by: Tratnack, Geoffrey <geoffrey.tratnack@intel.com>
Related-To: LOCI-3365
2022-12-08 17:07:53 +01:00
4bd5765a06 L0 Debug - Fix imm cmdlist mode on windows
Single Address Space SBA programming was using incorrect BB
level and not loading GPR15

Related-to: NEO-7517
Signed-off-by: Yates, Brandon <brandon.yates@intel.com>
2022-11-25 20:37:14 +01:00
acb8186744 Change default GPR offsets
Related-To: NEO-7458

Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2022-11-22 18:27:52 +01:00
4aa1697e3c Move hwInfoConfig ownership to RootDeviceEnvironment 2/n
Related-To: NEO-6853
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>

Use RootDeviceEnvironment getHelper<ProductHelper> for
- adjustSamplerState
- adjustPlatformForProductFamily.
2022-11-14 13:04:31 +01:00
77b6918f30 Revert "LOCI-3365: Cleanup MediaInterfaceDescriptorLoad logic in command enco...
This reverts commit cb3f7234f0.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
2022-11-12 16:05:11 +01:00
cb3f7234f0 LOCI-3365: Cleanup MediaInterfaceDescriptorLoad logic in command encoder
Add a patch to command encoder for samplers when DSH is dirty.

Signed-off-by: Tratnack, Geoffrey <geoffrey.tratnack@intel.com>
Related-To: LOCI-3365
2022-11-10 23:28:58 +01:00
002184586c Add command buffer helpers: Conditional BB_START and GPR Inc/Dec
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2022-11-10 18:56:24 +01:00
918d7b1da4 Helper for MI_SET_PREDICATE programming
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2022-11-08 14:20:01 +01:00
ddbaa5e8c9 Revert "Cleanup MediaInterfaceDescriptorLoad logic in command encoder"
This reverts commit 349af0bd5e.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
2022-11-07 02:20:27 +01:00
349af0bd5e Cleanup MediaInterfaceDescriptorLoad logic in command encoder
Add a patch to command encoder for samplers when DSH is dirty.

Signed-off-by: Tratnack, Geoffrey <geoffrey.tratnack@intel.com>
Related-To: LOCI-3365
2022-11-06 03:27:23 +01:00
6cf8b4daca Correct tg dispatch size heuristic
Multiply available thread count by tile count
if implicit scaling is used

Related-To: NEO-6989

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
2022-10-27 17:24:53 +02:00
1b9c510614 Update to command_encoder, fix bug changing dynamic state memory
Adding ULT for encode and command container changes
Refactor getHeapSpaceAllowGrow and getHeapWithRequiredSizeAndAlignment

Signed-off-by: Tratnack, Geoffrey <geoffrey.tratnack@intel.com>
Related-To: LOCI-3365
2022-10-11 03:40:25 +02:00
3d92186362 Add heap sharing to immediate command lists
This change is intended to be used in immediate command lists that are
using flush task functionality.
With this change all immediate command list using the same csr will consume
shared allocations for dsh and ssh heaps. This will decrease number of SBA
commands dispatched when multiple command lists coexists and dispatch kernels.
With this change new SBA command should be dispatched only when current heap
allocation is exhausted.
Functionality is currently disabled and available under debug key.
Functionality will be enabled by default for all immediate command lists
with flush task functionality enabled.

Related-To: NEO-7142

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2022-10-03 18:50:10 +02:00
0d0d6a300e Debugger: simplify captureStateBaseAddress()
So far captureStateBaseAddress() was a wrapper around
programSbaTrackingCommands(), doing an additional checking before
calling the latter. The checking is apparently no longer relevant, so
unify the distinction and remove part of the code which is no longer
needed.

In practice, keep the captureStateBaseAddress() while moving the body of
programSbaTrackingCommands() into it. This imposes lower diff-impact
onto the class hierarchy. Remove the second function. Simplify the
caller which had to distinct these two functions previously.

Related-To: NEO-6774
Signed-off-by: Maciej Bielski <maciej.bielski@intel.com>
2022-09-13 17:08:31 +02:00
410fd7d909 Correct binding table prefetch
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
Related-To: NEO-6075

Binding table entry count was zeroed even when
ForceBtpPrefetchMode debug flag was enabled
2022-09-13 14:34:30 +02:00
e1b80ba1a8 Cleanup: updateStreamProperties(), SBA tracking
Fixes found out while working on the StateBaseAddress adaptation to
StreamProperties. Removing unused parameters, improving code reuse
(further improvements come with following commits).

Related-To: NEO-6774
Signed-off-by: Maciej Bielski <maciej.bielski@intel.com>
2022-09-12 17:56:28 +02:00
a4b9b3b837 Extend encode class for start and end hw commands
Related-To: NEO-5019

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2022-09-02 16:29:36 +02:00
8cc0177f1c Change DG2 l1 cache policy to WB
With compiler LSC WAs this gives better performance.

If debugger is active, policy will not be changed ie.
will be WBP.

Related-To: NEO-7003

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
2022-08-31 14:31:23 +02:00
2621460e80 Revert "Change DG2 l1 cache policy to WB"
This reverts commit a820e73dd7.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
2022-08-27 08:04:19 +02:00
a820e73dd7 Change DG2 l1 cache policy to WB
With compiler LSC WAs this gives better performance.

If debugger is active, policy will not be changed ie.
will be WBP.

Related-To: NEO-7003

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
2022-08-26 12:58:45 +02:00
ed0c36117e Apply heuristics when setting TG dispatch size on XE_HPC_CORE
The default TG dispatch size can be changed
to a better value based on number of threads in TG or
currently available amount of threads on GPU.
Decision on what TG dispatch size should be are based on
implemented heuristics.

Signed-off-by: Rafal Maziejuk <rafal.maziejuk@intel.com>
Related-To: NEO-6989
2022-08-08 16:43:10 +02:00
98d776867f Add initial support for KernelArgsBuffer allocation
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2022-08-03 20:28:21 +02:00
61b2ee45cd Use LogicalStateHelper to encode SystemMemoryFence
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
2022-06-24 13:29:58 +02:00
8de043b71f Stop redundant SBA programming due to global atomics
For all platforms different than XE_HP_SDV (ATS) stop considering the
`useGlobalAtomics` flag as a decisive factor for trigerring the SBA
(StateBaseAddress) programming on the HW. Only XE_HP_SDV supports such
flag.

For consistency of the implementation, keep the related logic in one
place only, that is a helper in `command_encoder` and then just reuse it
in different places (`command_stream_receiver`).

Related-To: NEO-6953
Signed-off-by: Maciej Bielski <maciej.bielski@intel.com>
2022-06-08 10:39:56 +02:00
96e1eb7467 Move variables baseDieRev and baseDieA0Masked from xe_hpc to pvc
Pvc specific variables should be located in pvc struct

Related-To: NEO-6738
Signed-off-by: Katarzyna Cencelewska <katarzyna.cencelewska@intel.com>
2022-05-17 12:19:16 +02:00
d643c587b9 style: correct variable naming
Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com>
2022-05-16 15:02:15 +02:00
db9c0d1103 Refactor and enable MI_MEM_FENCE programming for DirectSubmission dispatch
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
2022-04-07 12:53:56 +02:00
f4407064a4 Refactor store register mem encoder to include partition parameter
Related-To: NEO-6811

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2022-04-06 14:00:56 +02:00
beff0019d1 SBA tracking for single address space
Related-To: NEO-6539


Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
2022-04-01 15:24:11 +02:00
3eab7009ac Move SCM related WAs logic from CSR to EncodeComputeMode
This will help with unifying the logic between APIs and GENs.

Related-To: NEO-6728

Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
2022-03-11 14:00:53 +01:00
e24322f266 Debug flag to control MI_ARB_CHECK prefetcher
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
2022-03-10 12:50:05 +01:00
dd63f1d2f9 Add new function append3dStateBtd
Signed-off-by: Katarzyna Cencelewska <katarzyna.cencelewska@intel.com>
2022-02-03 14:42:10 +01:00
9d8ce7aace Command container appends BB_END on cmd buffer allocation end
When linear stream created for command container has not enough space
for command and BB_END it will program BB_END and allocate new command
buffer allocation. Pointer returned from getSpace in this case will
return storage from new command buffer allocation.

Related-To: NEO-5707

Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
2022-01-31 16:15:37 +01:00
f8c104feaa Use fw declaration of IndirectHeap in CommandContainer
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
2022-01-26 13:30:26 +01:00
5e238dc7f1 Unify surface state programming logic related to implicit scaling
OCL image surface state programming for Xe Hp core is now reusing logic
of EncodeSurfaceState helper

Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2022-01-25 09:02:28 +01:00
5cd76aef6a Refactor surface state programming, add enum value for default halign value
Related-To: NEO-6466
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2022-01-19 14:31:28 +01:00
9a450d1b74 Pass hwInfo to appendMiFlushDw
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
2021-12-22 15:22:47 +01:00
66bf806018 Remove magic number from set/getBatchBufferStartAddressGraphicsaddress methods
rename methods to set/getBatchBufferStartAddress

Related-To: NEO-6466
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2021-12-16 19:03:01 +01:00
47dbe359bf Add command encoder for store data command
Related-To: NEO-6262

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2021-12-02 20:56:07 +01:00
55959d4d1d Helper method to check if allocation is compressed
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
2021-12-02 16:13:53 +01:00