Commit Graph

425 Commits

Author SHA1 Message Date
Pawel Wilma fac8c94c1e Revert "Built-in kernels refactor"
This reverts commit 40b00c7e8a.

Change-Id: I8c13be5134c051272db1fe1b7b15764cf8ad6953
2019-07-04 16:33:01 +02:00
Mateusz Jablonski 009dbc45e2 Update test for reusing heap memory
Change-Id: Iab447afd8633e05947b6732a2d1fcf9762e521a8
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2019-07-04 12:24:12 +02:00
Pawel Wilma 40b00c7e8a Built-in kernels refactor
Related-To: NEO-3220

Change-Id: I4a44a71fe30abd38409de7e9741a3b389b967612
Signed-off-by: Pawel Wilma <pawel.wilma@intel.com>
2019-07-03 14:58:32 +02:00
Mrozek, Michal 25083960ac Add parameter to setGpgpuWalkerThreadData.
Change-Id: I931f27ad3a21d3d151b19ac9226e245134295b98
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
2019-07-03 13:14:51 +02:00
Daria Hinz 42b87654eb Add preemption allocation for each of the Csr
Change-Id: Id14fbfbf6e9a6a85f035e75b4a20ca198c0996e5
Signed-off-by: Hinz <daria.hinz@intel.com>
2019-07-03 08:17:38 +02:00
Dunajski, Bartosz 3441b5288d Update DispatchFlags in enqueueCommandWithoutKernel path
Change-Id: Ic1a8de5ee3e6d387d93b7238ab74bf1e3a8e0990
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2019-07-01 14:41:35 +02:00
Mateusz Jablonski 27f3f8ea8f Pass private scratch size to scratch space controller
Related-To: NEO-3190

Change-Id: I6f1e71481679492516d898226de6a1e721896e81
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2019-06-28 14:32:06 +02:00
Mrozek, Michal 1bc5f7b142 Ensure that events without commands have proper flush stamps.
Change-Id: I937efef7f87fa7df9e9b1a903269e3637eca73ad
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
2019-06-26 09:08:58 +02:00
Dunajski, Bartosz 8263d488c6 Submit Semaphore dependency for enqueue read/write without Kernel
Change-Id: I22e1743b4cbd6e8285527fdfe25424a6cb3ff462
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
Related-To: NEO-3020
2019-06-25 14:21:57 +02:00
Venevtsev, Igor 165d1e4e55 Use GfxPartition for GPU address range allocations
[2/n] - OsAgnosticMemoryManager

Related-To: NEO-2877

Change-Id: I887126362381ac960608a2150fae211631d3cd5b
Signed-off-by: Venevtsev, Igor <igor.venevtsev@intel.com>
2019-06-25 12:54:20 +02:00
Filip Hazubski a9b8c07293 Update enqueueKernel
Return CL_INVALID_GLOBAL_WORK_SIZE error if global_work_size contains 0 for
OpenCL older than 2.1
Do not throw exception if global_work_size contains 0

Related-To: NEO-3111

Change-Id: If7b7884465117d9c0615ace2bb682b3b1c7d8bdb
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
2019-06-19 15:28:39 +02:00
Mrozek, Michal 2e8e625024 [5/n] Unified Shared Memory
- Add kernel support for host um allocations
- During make resident call choose only appropriate resources for residency
- change resource types to binary bit friendly values
- enhance memory manager to only make resident compatible types

Related-To: NEO-3148

Change-Id: Ic711a4425a0d8db151a335e0357440312dc09b7e
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
2019-06-17 15:47:30 +02:00
Mrozek, Michal be48b56732 Kernel refactor.
- Change function names to indicate they work on SVM allocations.
- Remove one function used only in tests.

Change-Id: I9b18d9fee3d4f2a46a7f458ca73d39b3863ce6d3
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
2019-06-14 10:27:21 +02:00
Jobczyk, Lukasz 329d940285 Add multiStorageResource flag to AllocationProperties
Related-To: NEO-3242

Change-Id: If31adaead389acd3bef6af1931b91396c43b305e
Signed-off-by: Jobczyk, Lukasz <lukasz.jobczyk@intel.com>
2019-06-14 06:59:28 +02:00
Mrozek, Michal 4188f6dce8 [1/n] Unified Shared Memory
- Add Internal Allocation type to differentiate SVM allocs from UM allocs.
- Add API to make internal allocations resident.
- Add API to allocate UM.

Related-To: NEO-3148

Change-Id: I9787891c5a0ffccac45c43bc5fde4ea50f37d703
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
2019-06-13 14:48:02 +02:00
Milczarek, Slawomir 8998f89886 HostPtr allocation with life time of image object for CL_MEM_USE_HOST_PTR
Related-To: NEO-3231

Change-Id: I4869e55b3c4b5217c83cc0b53d8c9f8c14b524b2
Signed-off-by: Milczarek, Slawomir <slawomir.milczarek@intel.com>
2019-06-13 10:35:48 +02:00
Koska, Andrzej 9be74b5f3e Replace imageRowPitch with imageSlicePitch
Related-To: NEO-2665
Replace imageRowPitch with imageSlicePitch
  for read/write CL_MEM_OBJECT_IMAGE1D_ARRAY
Change-Id: I0d5931629571f538f242e112c502e2f798ffd896
Signed-off-by: Koska, Andrzej <andrzej.koska@intel.com>
2019-06-12 21:06:32 +02:00
Dunajski, Bartosz 70f92cf03c Rename KernelCommandsHelper to HardwareCommandsHelper
Change-Id: I0b92a2d74bc96658274e4a02fec0f322e87681b2
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2019-06-12 13:45:12 +02:00
Koska, Andrzej d11e61b5ee Revert "Replace imageRowPitch with imageSlicePitch"
This reverts commit 4a49e7396a
Related-To: NEO-3265
Change-Id: Ia521f850e10bea174db282bd2de68ff626aea943
Signed-off-by: Koska, Andrzej <andrzej.koska@intel.com>
2019-06-06 08:15:26 +02:00
Milczarek, Slawomir 8e210941f8 AUB subcapture to work with multi CSRs
Related-To: NEO-2747

Change-Id: I2149cafb59bd1a6374da140e3f7e76a4cb3bb417
Signed-off-by: Milczarek, Slawomir <slawomir.milczarek@intel.com>
2019-06-05 10:52:05 +02:00
Koska, Andrzej 4a49e7396a Replace imageRowPitch with imageSlicePitch
Related-To: NEO-2665
Replace imageRowPitch with imageSlicePitch
  for read/write CL_MEM_OBJECT_IMAGE1D_ARRAY
Signed-off-by: Koska, Andrzej <andrzej.koska@intel.com>
Change-Id: I67bd0567dcee05027f3d25ef65796e332b9a4773
2019-06-04 22:54:07 +02:00
Dunajski, Bartosz ab8e3e472f Remove redundant cpuCopyAllowed flag
Change-Id: I8609af0c64d408b87a54d9ac082de7dd0cc83a79
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2019-05-30 13:15:23 +02:00
Jaime Arteaga b98b51b0d9 Move ptr.h to core folder
Change-Id: Icf0db7c767b2b1ea44fccc02b135f0f6c1f78c8f
Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
2019-05-29 00:11:34 -07:00
Maciej Plewka f2a8fc7ea9 Print_formatter refactor
Change-Id: Icb03697281b009c853d91a63d5d21ffcde545a8f
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
2019-05-23 21:37:50 +02:00
Koska, Andrzej 3d3e6b9531 Testing enqueueSVMMemcpy with host pointer
Related-To: NEO-3011
Change-Id: I179089e078361dd2449f78e75f1d6edd3f5235de
Signed-off-by: Koska, Andrzej <andrzej.koska@intel.com>
2019-05-23 09:47:29 +02:00
Koska, Andrzej fa3d4f39f4 Enabling clEnqueueSVMMemcpy between SVM and host pointer
Related-To: NEO-3011
Change-Id: I89aad599d7238ea2d319a4b1c72dffea2dba952b
Signed-off-by: Koska, Andrzej <andrzej.koska@intel.com>
2019-05-20 09:10:56 +02:00
Hoppe, Mateusz 4d9db473a0 Skip ZeroSizeEnqueueHandlerTest SVM tests when ftrSVM == false
Related-To: NEO-3157

Change-Id: I807dbe8a71faff6df5244a43a6451b00eb5a02c3
Signed-off-by: Hoppe, Mateusz <mateusz.hoppe@intel.com>
2019-05-15 11:12:32 +02:00
Mateusz Jablonski b8fb5e683b Move basic_math.h and vec.h to core directory
Change-Id: I143b7af450ff48d4958b4bc7137b393a2dc0eb64
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2019-05-14 21:32:55 +02:00
Filip Hazubski 8f17c70e9e Remove CommandQueueHw::requiresCacheFlushAfterWalkerBasedOnProperties
Change-Id: Ibdc6f7b883bfef471926a4351ed7437173c4a6a6
Related-To: NEO-2535
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
2019-05-14 17:31:53 +02:00
Hoppe, Mateusz 2b09ed85d6 Run EnqueueSvmMemFillTest only when SVM is supported
Related-To: NEO-3157

Change-Id: I29d1a0bd99cef4644c31d896ff2dfe96a5fee81c
Signed-off-by: Hoppe, Mateusz <mateusz.hoppe@intel.com>
2019-05-14 12:24:45 +02:00
Hoppe, Mateusz f6dfa1ac9d Skip EnqueueSvmTest / EnqueueSvmTestLocalMemory when SVM unavailable
Related-To: NEO-3157

Change-Id: Icc1b2f4be099f4295c441a9042a004b314fef0b0
Signed-off-by: Hoppe, Mateusz <mateusz.hoppe@intel.com>
2019-05-13 14:14:59 +02:00
Milczarek, Slawomir cc6a94b5b6 Fixed TBX with AUB dump mode without AubStream
Related-To: NEO-3150

Change-Id: I9ee7fc3c44f3021c61db7c27c01522cbe7d7445d
Signed-off-by: Milczarek, Slawomir <slawomir.milczarek@intel.com>
2019-05-10 14:23:17 +02:00
Dunajski, Bartosz 0f87e9aa1a Rename HardwareInfo members
Change-Id: I85f56b677bafdd75dd958b488522393fc18b68af
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2019-05-09 09:13:55 +02:00
Dunajski, Bartosz bb80d327c7 Move HardwareInfo ownership to ExecutionEnvironment [1/n]
Change-Id: I5e5b4cc45947a8841282c7d431fb69d9c397a2d4
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2019-05-08 16:11:01 +02:00
Milczarek, Slawomir 10d87404b6 AUB with kernel names in case of kernel split
Related-To: NEO-2747

Change-Id: I49d3e4716db4634da6744fe91ecfb0763f67722a
Signed-off-by: Milczarek, Slawomir <slawomir.milczarek@intel.com>
2019-05-07 10:14:32 +02:00
Mrozek, Michal c269bc062f Limit overestimation in multi kernel scenarios.
- There was overestimation that resulted in each kernel getting
page aligned estimation size.
- After this change every kernel aligns only to cache line and final
size is aligned to page size.

Change-Id: Iee06bdd0083724ea7e9415f3d0fe70198acca407
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
2019-04-23 17:46:53 +02:00
Filip Hazubski fae1d882f8 Add SvmAllocationProperties
Change-Id: Ie96aeab5597a1b3f2db8611a8a04597516730ce8
Related-To: NEO-2535
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
2019-04-23 10:30:04 +02:00
Milczarek, Slawomir 1bf263f061 AUBDumpAllocsOnEnqueueReadOnly to not activate in path with map image
Related-To: NEO-2717

Change-Id: Ida017557a58533323a214c59febfd8794ef4cf17
Signed-off-by: Milczarek, Slawomir <slawomir.milczarek@intel.com>
2019-04-19 13:09:56 +02:00
Zbigniew Zdanowicz 0c6823afd6 Add map allocation for images
Related-To: NEO-3097

Change-Id: I5bfd89fd597a8d55597ff7a2aa05b2abd278d5bd
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2019-04-18 14:46:06 +02:00
Milczarek, Slawomir c6247873f5 Add comments with kernel names to AUB files
Related-To: NEO-2783

Change-Id: Ib00e969b106301d712dc4c14af8208456bcabdb3
Signed-off-by: Milczarek, Slawomir <slawomir.milczarek@intel.com>
2019-04-17 14:56:24 +02:00
Venevtsev, Igor 2ca97d3881 Introduce MemoryManager::getExternalHeapBaseAddress()
Related-To: NEO-2877

Change-Id: I4307224c3be9609f7fc60d7fcb4f91ccdc8a9883
Signed-off-by: Venevtsev, Igor <igor.venevtsev@intel.com>
2019-04-16 13:30:10 +02:00
Milczarek, Slawomir 1b7014e10c AUBDumpAllocsOnEnqueueReadOnly to not activate in path with map buffer
Related-To: NEO-2717

Change-Id: I7999928e23f8d9cb4a88978ec44e4615eebb97b6
Signed-off-by: Milczarek, Slawomir <slawomir.milczarek@intel.com>
2019-04-15 17:27:53 +02:00
Mrozek, Michal 50270d74f7 Force blocking when device enqueue requires aux translation.
Change-Id: Ia1af6d8d3f18fc0a40994ffe10d50573b884345c
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
2019-04-15 16:13:35 +02:00
Maciej Plewka da19e924f5 Add events support for cache flushes
Related-To: NEO-2536

Change-Id: Iea9e9b08df0225ce5a126ab950621576b3880bbe
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
2019-04-15 15:44:25 +02:00
Piotr Fusik dd4b3a9f14 Simplify HwTimeStamps operations.
Related-To: NEO-2872

Change-Id: Id8e49082b88d7233b9d3ceb9074ce093c100ec14
Signed-off-by: Piotr Fusik <piotr.fusik@intel.com>
2019-04-15 10:51:09 +02:00
Zbigniew Zdanowicz 971cbd55f3 Add new SVM types
Related-To: NEO-2917

Change-Id: Ica127129799c1e617a326a110348c2f70160b15c
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2019-04-11 15:27:38 +02:00
Zbigniew Zdanowicz e201725dd5 Add dedicated map allocation
Related-To: NEO-2917

Change-Id: Ieeca40f5faf29433a5c464d2c3ca3b8910695a9b
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2019-04-09 16:16:31 +02:00
Mateusz Jablonski 91a64c8518 Fix locking resource logic for enqueue read/write buffer call
Change-Id: I261ed4904d617a2f4600ea2a5ec7fd34f534c191
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2019-04-09 13:16:59 +02:00
Mrozek, Michal 794fba189e Remove code.
Change-Id: I7e578ab0bc7e490520159bfaa4f8f193db40b23e
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
2019-04-08 14:07:49 +02:00
Maciej Plewka d0abc34d97 Add override annotate to isCacheFlushCommand mock
Related-To: NEO-2536

Change-Id: If006b53481d34df1348aa795520cc2a7d4002fd7
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
2019-04-08 10:14:37 +02:00
Maciej Plewka 4eb48e3d06 Add function to flush caches
Related-To: NEO-2536

Change-Id: Ifbf7e7a42514dd66eb0914f9d13407287481e123
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
2019-04-05 09:48:50 +02:00
Mrozek, Michal 387fdc5682 Make sure that timestamp is properly connected to mapBuffer event.
Related-To: NEO-2317

Change-Id: I607211e9e8bb05e0c4103a10087c10f6959f2008
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
2019-04-04 11:36:06 +02:00
Filip Hazubski b2e16b7897 Update allocationForCacheFlush method
Related-To: NEO-2535

Change-Id: Ia24556814188263e2ebb54b6419feddd5d8ed707
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
2019-04-03 18:07:13 +02:00
Mateusz Jablonski f76c0e84fb Don't copy compressed buffer on CPU
Change-Id: I9c36ee8f23284286bb846fd9a0fd196733d0f8f9
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2019-04-03 13:15:41 +02:00
Mrozek, Michal 4cb060fc46 Remove not needed code.
Change-Id: Idcbc53f22cc3a3f1c3acb4b2a620372d6102b12b
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
2019-04-03 12:17:53 +02:00
Mateusz Jablonski f3d17008ee TransferProperties: lock resource only when transfer on CPU is requested
Change-Id: Ic93b4fd438e75f5d54cbae9bec332c4b18c6b1ee
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2019-04-01 14:02:49 +02:00
Jobczyk, Lukasz a025dc6985 Reverse logic of creating Memory Manager - part 6
-Remove a redundant condition from the MemoryManager constructor

Change-Id: I4b6c56f30a19e77a7a20f68c6d85516aaa52d102
Signed-off-by: Jobczyk, Lukasz <lukasz.jobczyk@intel.com>
2019-04-01 10:27:29 +02:00
Mateusz Hoppe 4296588aa9 Use GPU address to compare with SurfaceBaseAddress in ULTs
- remove redundant casts

Change-Id: I175801869f24be47dc6703b61bf26c0f8a1c77c6
Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
2019-03-26 20:49:54 +01:00
Maciej Plewka 9e52684f5b Change namespace from OCLRT to NEO
Change-Id: If965c79d70392db26597aea4c2f3b7ae2820fe96
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
2019-03-26 15:48:19 +01:00
Filip Hazubski cdd46679c8 Add getIntelQueueInfo helper function
Change-Id: I5daed24c36db8f5da143db8665b4353582dbc94b
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
2019-03-26 11:31:35 +01:00
Mateusz Hoppe 047f2bec87 Program correct addresses in EnqueueReadWriteBufferRect scenarios
- SurfaceBaseAddress should be programmed with aligned address
this was not the case for certain origin and region values
- offset from aligned address added to operationParams

Change-Id: I0742b826dd0b70f0a6dedf436b850734fa015688
Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
2019-03-26 10:37:46 +01:00
Mateusz Hoppe c5ddf11e78 Use GPU address in EnqueueCopyBufferToImageTest
Change-Id: I2724fb9f2cac9222cacfff913e648df1d1531ccd
Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
2019-03-26 08:38:04 +01:00
Maciej Dziuban 33c07c875f Do not insert PipeControl WA or DC Flush when not needed
Change-Id: I71030273708f243324a566232528bce00a0361df
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
2019-03-22 12:37:27 +01:00
Stefanowski, Adam 16aee8cc46 [2/n] Move Hardware Info to Execution Environment
- remove hwInfo from the csr functions where it was passed as a parameter,
now csr functions have access to hwInfo by Execution Environment

Change-Id: I756ae63d9728c9c963571147bab97f9e1c15797b
Signed-off-by: Adam Stefanowski <adam.stefanowski@intel.com>
2019-03-22 10:08:26 +01:00
Mateusz Jablonski 395e79fee8 Add support for many GMMs in Graphics Allocation
Change-Id: I955b8dd50b502f91700c5529d0a0a291632aa157
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2019-03-13 15:44:45 +01:00
Koska, Andrzej fcdfcb3fc4 Pass enqueued values to enqueueHandler
Change-Id: I991818657c7cafaf8911ce711a87a6c7b4531517
Signed-off-by: Koska, Andrzej <andrzej.koska@intel.com>
2019-03-13 11:23:37 +01:00
Piotr Fusik ec72787b98 Remove MemoryManager::allocateGraphicsMemoryForHostPtr.
Change-Id: I629f2299a183fc135135dbaff89216b966554a95
Signed-off-by: Piotr Fusik <piotr.fusik@intel.com>
2019-03-12 15:51:32 +01:00
Maciej Plewka e53a8e8709 Add postSyncAddress to flush after walker
Change-Id: I7fdfaf8e0acc365998cc74306ab715ea3d9c7d72
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
2019-03-04 14:47:53 +01:00
Zbigniew Zdanowicz 10a25e405a Remove debug flag ForceMultiEngineQueue
Change-Id: Iabf38999a03be3422c25c12978808731df77a899
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2019-02-28 16:06:36 +01:00
Mateusz Jablonski 6fb28dd828 Refactor GraphicsAllocation class
move most of members to protected section
merge related members into structs

Change-Id: Ief2e092aa5e61ca6f13308f9d9b1937ea6c913b4
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2019-02-28 14:09:11 +01:00
Filip Hazubski 8b57d28116 clang-format: enable sorting includes
Include files are now grouped and sorted in following order:
1. Header file of the class the current file implements
2. Project files
3. Third party files
4. Standard library

Change-Id: If31af05652184169f7fee1d7ad08f1b2ed602cf0
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
2019-02-27 11:50:07 +01:00
Hoppe, Mateusz 432b8f20a7 Allow cpu copy with debug keys only when ready waitlist events
Change-Id: If9293787c76b8248a84e25d03cbf9a9b5aaf7cca
2019-02-22 17:39:57 +01:00
Maciej Dziuban 90e970cee6 Create GraphicsAllocation during dispatch when queue is blocked
Change-Id: I8a6f9e14ff57e7ed2920260af291317805f4df13
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
2019-02-21 15:28:17 +01:00
Katarzyna Cencelewska c9a8f9b1be GlSharingFunction tests update
Add mock of opengl32.dll to check that sharing functions are loaded

Change-Id: I361707ee9a506e84db51d4fa9c98823db2550fae
2019-02-20 16:05:32 +01:00
Mrozek, Michal 4139e88982 Allocate command buffers with proper allocation type.
Change-Id: I912dd41cf68fa16ab481bb003c4f5ae63f1f04c4
2019-02-20 12:52:45 +01:00
Jobczyk, Lukasz 2bcecf3e62 Align command buffers to 64KB
Change-Id: Id1fbd7c6f1aee48c4b69ec305d5332cb0aa86507
Signed-off-by: Jobczyk, Lukasz <lukasz.jobczyk@intel.com>
2019-02-18 09:58:45 +01:00
Mrozek, Michal 0e7fd2ffed Add multiEngine field to command queue with debug variable to override it.
Change-Id: I3c1e424a7ad545e166e178d1726595e6d9502ca7
2019-02-12 12:22:24 +01:00
Kamil Diedrich a7b46ccdbd Add RAII for cl_objects
- add removeVirtualEvent to cmdQueue fixture
- add const keyword in event functions

Change-Id: I11354eb8fceb15ae2c58bddd327863a15aab6393
2019-02-12 11:19:35 +01:00
Venevtsev, Igor 5e8fb19e5d Remove OCL Events concept from EnqueueOperation and dispatchWalker
Change-Id: Iec55b0be673a2a40b9621212add224a33d4abc5d
2019-02-12 08:46:18 +01:00
Kamil Diedrich 89410a6733 Add DCFlush before resolving
Change-Id: Id5f82edc4631aa16baa55b26b8bde69f4a30572c
2019-02-11 16:33:34 +01:00
Dunajski, Bartosz dc181defba Use GpuAddress for TimestampPacket programming
Change-Id: I1303605c33e2e0267a1716e12a0bfcb341fcfbd7
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2019-02-11 15:31:17 +01:00
Chodor, Jaroslaw 43856e88b5 Refactor around cache flush and command queue
Change-Id: I277e27cbc60fbbb015c0024f171697408879ec0b
2019-02-10 17:59:33 +01:00
Kamil Diedrich e1eab521e7 use release for cl-objects instead of delete
- fix for data race in events
- modification of the addition child event

Change-Id: I6ea3a413f13f13a91d37d20d8b9fad37d0ffafb9
2019-02-05 14:09:32 +01:00
Hoppe, Mateusz 3c47c418a9 Refactor HardwareParse::getSurfaceState() to return CPU memory
- if SSH indirectHeap is passed, use CPU address instead of GPU
address programed in SBA command

Change-Id: Id2c8973db0dfe2d9562ee835a27c4d3c28ea3351
2019-02-04 17:49:00 +01:00
Hoppe, Mateusz 509ed273c4 Refactor Ults finding hardware commands
- use CPU address for found dynamicStateHeap address in
StateBaseAddress command

Change-Id: I2d857c5a069f5a8f46169d2047cdb27efd3502b8
2019-02-04 17:26:37 +01:00
Mateusz Jablonski ce4a75e121 Require same allocation type when obtaining reusable allocation
Change-Id: I829301b83a6214bcfb4fc9f2692f21ae9a002456
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2019-02-01 16:10:28 +01:00
Koska, Andrzej 395d053f02 Limiting the value of LWS to the value of GWS
Change-Id: I24e89125e586ed77d396ba9e40dd039f1ab213fe
2019-02-01 12:49:54 +01:00
Mateusz Jablonski f157943610 Allocate internal allocations through preferred pool
Change-Id: Ib17431ceefc1eb72f86625e0998f679baaa7cb0d
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2019-01-30 11:18:15 +01:00
Chodor, Jaroslaw 311de0c644 Adding support for excluding tests per platform
Change-Id: I5c41cadd0f44d05640593673f1c00da84d428711
2019-01-30 01:37:10 +01:00
Milczarek, Slawomir b11e0825c9 AUB capture with support for allocation dumps
Change-Id: I90a2b75043c33af92e4557be37cde4b9699582c6
2019-01-28 21:20:08 +01:00
Mateusz Jablonski 128bf4552f Remove debug flag ForceResourceLockOnTransferCalls
Unlock locked resoures in freeGraphicsMemory method

Change-Id: I2baae7b7f9d8260f19a4b083849c5bf0d1a764f3
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2019-01-25 14:03:29 +01:00
Zdanowicz, Zbigniew 158f200476 Add HW commands const definitions
Change-Id: If2e9d7f7f707b7b8c7bd8dbd3853ab3b6dad0c9a
2019-01-18 12:13:25 +01:00
Pawel Wilma 14e8fdd8f8 Fix for incorrect timestamp offset calculation in event profiling info
Change-Id: I634c29daf4734b24e4075542dc6550c531977f0a
Signed-off-by: Pawel Wilma <pawel.wilma@intel.com>
2019-01-11 16:39:05 +01:00
Mrozek, Michal ef73bb8c11 Move Walker specific code to dedicated method.
- move cache flushes after the Walker.

Change-Id: I58c5e76bad22ac42da2c466ef008ef5bf96df077
2019-01-10 16:36:56 +01:00
Hoppe, Mateusz cbc4d349a8 Do not align down pointer passed to hostPtr allocation
- do not align up hostPtr allocation size
- align BaseAddress programmed in SurfaceState to DWORD

Change-Id: Ic6d02e53fd13dda881f8eb845a131bffe4deb45c
2019-01-08 21:21:34 +01:00
Zdanowicz, Zbigniew 767f27a483 Add calculation of default SSH size in ULTs
Change-Id: I682f7cc671ab18de7a9976e0034842df0f6134bf
2019-01-04 09:28:21 +01:00
Venevtsev, Igor 73a63c7689 Fix Read/WriteBuffer for unaligned offsets
Change-Id: I08d33e80243f41174f4629c8a611e286629d2e10
2018-12-31 14:50:07 +01:00
Kamil Diedrich fad2f8dbd1 Change auxTranslationDirectory
Change-Id: I5d433d340e945b799dbec25a22fd610312f00c0a
2018-12-28 16:46:42 +01:00
Kamil Diedrich 4b1871bf0e Add pipe control before and after buffer translation
Change-Id: I4ee32c410e1ac2bcdb3ceae203cd461de79146a5
2018-12-20 09:30:53 +01:00
Mrozek, Michal b99cf6c3ff Image / Buffer refactor.
- do not use redescribe flag for image/buffer from other image/buffer.
- use redescribe flag only when image is redescribed via redescribe interface
- remove image specific functions from mem object
- remove redundant fields
- add new implementation of isImageFromBuffer/isImageFromImage basing
on associated mem object.
- pass associated mem object to redescrbed images.
- remove redundant setters

Change-Id: I267637a48fbc2afdad9a9f5e5e9ccd6bd0c09972
2018-12-19 21:21:44 +01:00
Zdanowicz, Zbigniew 3dca095ccf Add cache flush command after WALKER command
Change-Id: I3983dc6c0797047e17cc8189655a22a22e85892b
2018-12-19 13:15:33 +01:00
Kamil Diedrich b2e0195663 Change Buffer to MemObj in BufferForAuxTranslation collection
Change-Id: Icbdb8fecaa3fd8e19e993502f59c76156fe4ad2c
2018-12-19 08:05:51 +01:00
Mateusz Jablonski 8ec072d39c Simplify Memory Manager API [3/4]
- remove method allocateGraphicsMemory(size_t size)
- pass allocation type in allocation properties
- set allocation type in allocateGraphicsMemoryInPreferredPool

Change-Id: Ia9296d0ab2f711b7d78aff615cb56b3a246b60ec
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2018-12-17 10:42:16 +01:00
Pawel Wilma 5094c630f7 Force resource locking on transfer calls
Add debug variables to force resource locking on memory transfer calls
and to call makeResident() on mapVirtualAddress() call.

Change-Id: Ifa78d951fcb81812b10a98252bd414124dec9c74
2018-12-14 12:25:28 +01:00
Mateusz Jablonski 74510286a1 Command Queue: Destroy timestamp packet container before releasing context
Change-Id: I7ee492586ee178bc89c44d5d6663d3ff8fb2e778
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2018-12-14 08:26:46 +01:00
Dunajski, Bartosz 010e1a4738 VFE state programming cleanup
Change-Id: I38fb47b00211a1d28244369ac417427ada145f61
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2018-12-13 17:44:40 +01:00
Mrozek, Michal 23d72e40b0 Disable one test.
Change-Id: Ib74b19995d27b4baf043502e29dd1e7464c66a3c
2018-12-11 14:58:34 +01:00
Dunajski, Bartosz b728526c4e Allow Device creating multiple CSRs [8/n]
Use OsContextId instead of DeviceIndex for residency

Change-Id: Ib2367b32b5b3e320252d8254f1042f1c3d497068
2018-12-04 15:36:59 +01:00
Dunajski, Bartosz 1f7448425d Allow Device creating multiple CSRs [7/n]
Create and initialize all supported Engines

Change-Id: If0adf1a06b5005ef2698cebc6f1aaa6eacf562ec
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2018-11-30 15:48:44 +01:00
Dunajski, Bartosz 0131e66a70 Allow Device creating multiple CSRs [6/n]
- Introduce default Engine query
- Improve Deferred Deleter usage
- Remove Tag Allocation from Device

Change-Id: Iaa88d8dc0166325acf9a157dcd2217ea408ee285
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2018-11-29 16:20:13 +01:00
Zdanowicz, Zbigniew 7dbd0ea4f3 Move Scratch Space functionality to dedicated class
Change-Id: Ic7655c4b971513961aba6823478a139ffc943466
2018-11-29 11:55:56 +01:00
Dunajski, Bartosz 2d77b86e70 Allow Device creating multiple CSRs [5/n]
- Move Engine type to OsContext
- Move OsContext to CSR
- Improve EngineMapper logic
- CompletionStamp cleanup

Change-Id: I935cb7169c8c48cd09837e20e3da06f6dd3437b9
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2018-11-27 14:25:04 +01:00
Dunajski, Bartosz 7781089740 Allow Device creating multiple CSRs [4/n]
- Introduce additional RCS engine
- Set fixed size for Engines array

Change-Id: I06533a425684b64214f956783b07877e6157935b
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2018-11-26 09:40:44 +01:00
Dunajski, Bartosz 3ad33bf1b8 Allow Device creating multiple CSRs [3/n]
Add CSR from Device to CommandQueue

Change-Id: Iaccf3c73d25e357242837677777d0513e81f520e
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2018-11-23 10:51:34 +01:00
Dunajski, Bartosz af46d88fc1 Allow Device creating multiple CSRs [1/n]
Change-Id: Ie5d8d89aa388c608d5464919059c28a054ac9b1e
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2018-11-21 12:37:25 +01:00
Mateusz Jablonski 66492a53a4 Change type of residency task count to uint32_t
Move definitions of objectNotUsed and objectNotResident to GraphicsAllocation

Change-Id: I2aec604a865cc6c975e9d1121028cbdd35c0b18a
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2018-11-16 16:04:48 +01:00
Mrozek, Michal b102f8556e Add missing makeResident call on debug surface.
Change-Id: I9c2d1bcf608dbfc71a3859b237e249d41810c153
2018-11-16 09:38:55 +01:00
Mrozek, Michal 5b316d142c Delete drm requirement tests.
- Those requirements are no longer valid.

Change-Id: I8885c2591fccf8825d812128ead6a637e353009f
2018-11-15 12:34:30 +01:00
Stefanowski, Adam 9e61258f6c Split tests into smaller ones
Change-Id: I462f08769aabbfcb9a3611f3ea5ccb88efb998b0
2018-11-14 19:25:13 +01:00
Dunajski, Bartosz 1e0064fc2f Allow ULTs to work with enabled TimestampPacketWrite
Change-Id: Idd4622469220b859e8724d9179837c685377ce52
2018-11-07 08:50:04 +01:00
Woloszyn, Wojciech 549b73510c Flush L3 for reduced address space platforms
Change-Id: I5a73e72f8e309137328930920ab174ba6f1378dc
2018-11-06 14:26:59 +01:00
Mateusz Jablonski 815ae851b7 Graphics Allocation: store task count per context id
Move definition of allocations list method to internal_allocation_storage.cpp

Change-Id: I4c6038df8fd1b9335e8a74edbab33b78f9293d8f
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2018-11-06 12:43:47 +01:00
Zdanowicz, Zbigniew 8504b37a08 Add branch prefix to unit_tests/gen_common subdirectory
Change-Id: I7661dbd8a65aaa50c21afb982b23edb9080d6f84
2018-11-01 00:15:04 +01:00
Mateusz Jablonski ead2e2ea6d Move createAllocationForHostPtr method to command stream receiver
Remove not needed includes from command_queue.h

Change-Id: I45963bf005471bd7716d55471474299a15e27b62
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2018-10-30 17:49:08 +01:00
Mateusz Jablonski d3f71cfb04 Move allocation lists to internal allocation storage
Change-Id: I543f1551c8fb161cf99c5870de44afec390415b2
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2018-10-30 13:49:31 +01:00
Mateusz Jablonski a30c70d84b Remove cleaning allocation lists methods from memory manager
Change-Id: I4a58a5373e7dc4cf8dc5d90390e84c4f23689139
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2018-10-29 10:35:03 +01:00
Mateusz Jablonski d5c9816428 Remove store allocation methods from memory manager
Move setGPUAddress method to WddmAllocation

Change-Id: I91d877c3791e9eff69276e4258e3ce9c3111ca45
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2018-10-26 10:53:43 +02:00
Piotr Fusik 4bdf183c9d Use the runtime CS size estimation in ULTs.
EnqueueOperation<GfxFamily>::getTotalSizeRequiredCS was ULTs-only.
Replace with the real CS size estimation from getCommandStream.

Change-Id: I4d15d342eb5edff6511acc9c80e13e9cc92d81ac
2018-10-23 13:07:42 +02:00
Mateusz Jablonski 56f67748fd Remove not needed definitions and includes from mock_device.h
Change-Id: I95585f05805ee85577dfa0b981b32f828853af8a
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2018-10-22 16:30:14 +02:00
Zdanowicz, Zbigniew f3a732081e Change interface to program cross-thread data
Change-Id: I96bf4bddf1557f588fd745efca7b19ec2f38a78e
2018-10-18 23:55:29 +02:00
Mateusz Jablonski 4f028d13a1 Command stream receiver: use memory manager from execution environment
Change-Id: I236218a73bd7dac6e5744e3596f146b77b5ca1c8
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2018-10-16 12:14:55 +02:00
Mateusz Jablonski 8a9d0a81df Move temporary and reusable allocation lists to command stream receiver
Change-Id: I40df6fe39b367e243e3710c5fdeaab3c85198d9d
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2018-10-11 15:32:12 +02:00
Zdanowicz, Zbigniew bb62343aba Add new parameter to thread data dispatching
Change-Id: I86710b0cc764156f4c2db9d24ccd1c96b32d7660
2018-10-05 12:06:25 +02:00
Dunajski, Bartosz 73b2e947a5 Multiple TimestampPackets handling
Change-Id: Ia5936c3d0a34b892aa4444026a5aebc681f126c2
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2018-10-05 01:54:35 +02:00
Zdanowicz, Zbigniew 2d7077e138 Fix correct command buffer estimation for non-kernel enqueue calls
Change-Id: I8655d1824c229f13104e085f55fa15c310a17210
2018-10-05 00:47:54 +02:00
Koska, Andrzej 2110ba6ca4 Passing correct taskCount to waitForTaskCountAndCleanAllocationList
Change-Id: Ib0d2474bcd5827f8030331f7ef45ffc2805b955b
2018-10-04 23:53:43 +02:00
Mateusz Jablonski b602cd2bb8 Pass execution environment to memory manager
Change-Id: If43cf9d1353b4cbc02ea269fb9105c01cc4e0876
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2018-10-03 22:12:26 +02:00
Filip Hazubski c75dc23b6e Change HWCMDTEST_F() tests to HWTEST_F() where possible
Change-Id: Ibfe147a12b53f832723f83809770e1b203159f8f
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
2018-10-02 17:29:46 +02:00
Filip Hazubski b16bd14f37 Change virtual class HardwareInterface to static
Change-Id: I4f1f59ecb51b95041dc6dcc6c606b94595813f53
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
2018-10-01 15:11:43 +02:00
Hoppe, Mateusz 330b9eddbd Upload data to cpu inaccessible memory with enqueueWriteBuffer
Change-Id: Ibb33c4248fd0cb4338c82a9deb3994147c0acba5
2018-09-27 18:09:01 +02:00
Zdanowicz, Zbigniew 51e888dfc7 Add new arguments to GpgpuWalkerHelper<GfxFamily>::setGpgpuWalkerThreadData
Change-Id: I19e42a75f5224f6e3588c2c7be4a3451714bb5ef
2018-09-26 14:56:01 +02:00
Maciej Dziuban f48b90ffee Change CommandStreamReceiver::flush() argument to a reference
Change-Id: Ic933a297d4c4e243138d0d62323ba82a8b91240f
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
2018-09-25 17:28:44 +02:00
Woloszyn, Wojciech f624ec757b Unify mipmap layout accross platforms
- revert "Fix reported row/slicePitch for mip-maps"
- calculate mipmap offset without gmm

Change-Id: Id4802ef9624ad330e0d0f871dfa4d4fc35a7ba33
2018-09-25 16:27:43 +02:00
Artur Harasimiuk 40146291ad Update copyright headers
Updating files modified in 2018 only. Older files remain with old style
copyright header

Change-Id: Ic99f2e190ad74b4b7f2bd79dd7b9fa5fbe36ec92
Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com>
2018-09-20 18:02:35 +02:00
Mrozek, Michal 070bbf4033 Optimize enqueue kernel tests.
- Switch to non param fixture for tests not requiring different params
- Add limited param set for tests requiring param fixture
- this decreases total test count by 100 while keeping the same scope.

Change-Id: Ic10a378d3eb7a2d06114435a9bd9652756945574
2018-09-20 14:56:34 +02:00
Katarzyna Cencelewska 962b6ce883 Add support for cl-gl sharing
Change-Id: I08d7608722746baa3be61846e05eecb5419cc136
2018-09-18 11:18:46 +02:00
Dunajski, Bartosz 2b89486fb1 Program Semaphore to keep dependency on previous enqueue
Change-Id: I511f39811769f1add179ea5d9cb331fa9c5ccec2
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2018-09-12 12:23:17 +02:00
Pawel Wilma 8c1db4fb2f Code cleanup for reduced GPU address space
Change-Id: Ibce79ddbe1f03dac1813b5dc2356a9db86b60200
Signed-off-by: Pawel Wilma <pawel.wilma@intel.com>
2018-09-10 16:16:06 +02:00
Maciej Dziuban 049ba5c625 Revert "Improve build time: command_queue tests"
This reverts commit 76c78f017e.

Change-Id: Icb7eb473a17de5c072ba1833812fa084c4873465
2018-09-10 14:54:55 +02:00
Mrozek, Michal 393ce116e7 Remove flushWaitList method.
- No longer needed.

Change-Id: I9e255067fb4b0d52a42f6a49145b3a8d591b5e74
2018-09-07 15:27:37 +02:00