Commit Graph

11960 Commits

Author SHA1 Message Date
Michal Mrozek 2a97ceed1f Add environmental variable to force CPU copy.
When env variable is set, then copies are always done on CPU.
Change the logic of CPU copy to make sure we lock if targeting device memory.

Related-To: NEO-7564
Signed-off-by: Michal Mrozek <michal.mrozek@intel.com>
2022-12-07 14:00:10 +01:00
Warchulski, Jaroslaw be647d42d9 Cleanup includes 12
Related-To: NEO-5548
Signed-off-by: Warchulski, Jaroslaw <jaroslaw.warchulski@intel.com>
2022-12-07 13:14:15 +01:00
Mateusz Jablonski 9b492bc86c ULT clang-tidy fix: correct variable name
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2022-12-07 13:02:46 +01:00
Dominik Dabek 7d7ecd50b6 DG2, Enable resolving dependecies by pipecontrol
Enable resolving dependencies by pipecontrol on same CSR, IOQ on DG2 by
default.

Related-To: NEO-7321

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
2022-12-07 12:49:52 +01:00
Baj, Tomasz 92df163d8e Return 0 from fp64 queries when fp64 is unsupported
Signed-off-by: Baj, Tomasz <tomasz.baj@intel.com>
Related-To: NEO-7542
2022-12-07 12:26:24 +01:00
Zbigniew Zdanowicz 9f8911e9da Fix level zero event synchronization issues for TBX mode
This change has two issues fixed.
First fix assures event must not download all allocations sent to GPU
when event is not ready.
Second fix performs page walk on event allocation before event allocation
can be downloaded, as download before page walk is not supported scenario
in TBX mode.

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2022-12-07 11:10:29 +01:00
Rafal Maziejuk b04277ef32 Add missing includes in device caps gen tests
Signed-off-by: Rafal Maziejuk <rafal.maziejuk@intel.com>
2022-12-07 10:54:36 +01:00
Jitendra Sharma 5baf75b9a8 Sysman: Redesign event API to effectively use uevents
Earlier implementation of sysman events API was based on file
creation in the filesystem. Whenever a uevent for some event
which needs to be monitored arrive, at that time a file was
created in the filesystem based on some preinstalled udev rules.
This approach was inefficient as it heavily depends over file
system and second with this approach losing events is always a
possibility.

Now with this change, we are removing our dependency over file
creation in filesystem. Rather we will be using libudev library
to monitor the uevents. This approach could also be extended,
when we want to listen to all the uevents for all the gpu
devices present in the system.

Related-To: LOCI-2140
Signed-off-by: Jitendra Sharma <jitendra.sharma@intel.com>
2022-12-07 07:29:57 +01:00
Mateusz Jablonski 23fd280334 Unify definition of hardware ip version
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2022-12-06 17:22:24 +01:00
Mateusz Jablonski 103f522f18 Create definition of tag allocation layout
we use tag allocation for multiple purposes, therefore we should define
all offsets in one place

Resolves: NEO-7559
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2022-12-06 16:49:07 +01:00
Kamil Kopryk ba9ea6fabf Reduce binaries sizes
Observed about 4MB reduction in overall binaries size (directory bin)
when building unit_tests target
with MSVC (Visual Studio 2022 17.3.0 preview 6)
using Debug configuration.

Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
2022-12-06 15:41:46 +01:00
Kamil Kopryk ba45cace51 Correct typo
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
2022-12-06 13:43:44 +01:00
Joshua Santosh Ranjan 939eb94034 Add P2P properties for direct Fabric Link
Related-To: LOCI-3097

Signed-off-by: Joshua Santosh Ranjan <joshua.santosh.ranjan@intel.com>
2022-12-06 13:09:01 +01:00
Dunajski, Bartosz 1e41f7952b RelaxedOrdering: Queue size limit
Related-To: NEO-7458

Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2022-12-06 12:40:12 +01:00
Warchulski, Jaroslaw c10aa90815 Cleanup includes 11
Related-To: NEO-5548
Signed-off-by: Warchulski, Jaroslaw <jaroslaw.warchulski@intel.com>
2022-12-06 12:25:30 +01:00
Dunajski, Bartosz 1a05ec90cc Enable RelaxedOrdering for BCS if feature is enabled
Related-To: NEO-7458

Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2022-12-06 12:03:35 +01:00
Patryk Wrobel 5793e200e4 Remove possible infinite loops related to pNext
Two code parts contained invalid logic related to traversing
opaque list of pNexts. This has been fixed.

Signed-off-by: Patryk Wrobel <patryk.wrobel@intel.com>
2022-12-06 11:55:14 +01:00
Spruit, Neil R d75eccc026 Report Unsupported for Symbol features without proper flags for SPIRv
- Report Unsupported Feature given a SPIRv built module without correct
compiler flags for dynamic linking, global pointer, & function pointer
support.

- Given a preBuilt binary, symbol support is assumed to be handled by
the user.

Related-To: LOCI-3387

Signed-off-by: Spruit, Neil R <neil.r.spruit@intel.com>
2022-12-06 08:13:19 +01:00
Dominik Dabek 70dbce12d1 Prepare for pool buffer enabling 1/n
check if flags allow buffer from pool
add buffer offset to aubtests
disable pool buffer where required

Related-To: NEO-7332

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
2022-12-05 23:51:30 +01:00
Krystian Chmielewski 2ceada6bef fix(zebin): ray tracing
Previous implementation was missing crucial part.
When ray tracing global buffer argument is passed set
hasRTCalls to true.

Signed-off-by: Krystian Chmielewski <krystian.chmielewski@intel.com>
2022-12-05 16:50:45 +01:00
ocldev 117bd57ab1 dependencies update
Signed-off-by: ocldev <ocldev@intel.com>
2022-12-05 16:31:27 +01:00
Milczarek, Slawomir 4fd21cf59c Add memory prefetch support for cmd list copy-only
Related-To: NEO-6740

Signed-off-by: Milczarek, Slawomir <slawomir.milczarek@intel.com>
2022-12-05 16:25:29 +01:00
Dominik Dabek 4adba15dbb Update for resolving dependencies by pipecontrol
Flag ResolveDependenciesViaPipeControls now removes only same csr
dependencies. Still enables pipe controls.

Works through hwInfoConfig method isResolveDependenciesByPipeControlsSupported

Related-To: NEO-7321

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
2022-12-05 15:48:49 +01:00
Warchulski, Jaroslaw 1fa5710dff Cleanup includes 10
Related-To: NEO-5548
Signed-off-by: Warchulski, Jaroslaw <jaroslaw.warchulski@intel.com>
2022-12-05 12:39:33 +01:00
Krystian Chmielewski d25a5c73f2 fix(ocl zebin): do not expose functions as kernels
Signed-off-by: Krystian Chmielewski <krystian.chmielewski@intel.com>
2022-12-05 12:39:18 +01:00
Kamil Kopryk 91d39ad5bf Rename ClHwHelper -> ClGfxCoreHelper
Related-To: NEO-6853
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
2022-12-05 11:26:20 +01:00
Kamil Kopryk 73b2104183 Rename L0HwHelper -> L0GfxCoreHelper
Related-To: NEO-6853
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
2022-12-05 11:26:05 +01:00
Kamil Kopryk 785b9eeece Rename CompilerHwInfoConfig -> CompilerProductHelper
Related-To: NEO-6853
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
2022-12-05 11:25:49 +01:00
Milczarek, Slawomir f08e552f4d Create multiple-BOs shared allocation in single lmem regions in non-acc mode
Related-To: NEO-6839

Signed-off-by: Milczarek, Slawomir <slawomir.milczarek@intel.com>
2022-12-05 11:25:34 +01:00
ocldev 6e2fed0074 igc revision update
Signed-off-by: ocldev <ocldev@intel.com>
2022-12-02 18:28:30 +01:00
ocldev 13a78d1483 igc revision update
Signed-off-by: ocldev <ocldev@intel.com>
2022-12-02 15:26:49 +01:00
Rafal Maziejuk 16636b82ff Move device caps gen tests to shared
Signed-off-by: Rafal Maziejuk <rafal.maziejuk@intel.com>
2022-12-02 15:14:21 +01:00
Mateusz Jablonski a2aad265bf ULT build: fix building unit tests when aubstream is not available
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2022-12-02 13:45:38 +01:00
Milczarek, Slawomir eca8333d4e Update i915 headers to v2.0-rc16 (part 2)
Related-To: NEO-5838

https://github.com/intel-gpu/drm-uapi-helper/releases/tag/v2.0-rc16

Signed-off-by: Milczarek, Slawomir <slawomir.milczarek@intel.com>
2022-12-02 13:45:20 +01:00
Lukasz Jobczyk 7c572b4090 Do not free SVM alloc under SVM manager lock
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2022-12-02 12:36:10 +01:00
Lukasz Jobczyk dbc6ac2743 Set alignment for SVM_CPU properties on xe_hpc and later
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2022-12-02 12:35:54 +01:00
Milczarek, Slawomir 7d202c7871 Update i915 prelim headers to v2.0-rc16
Related-To: NEO-5838

Signed-off-by: Milczarek, Slawomir <slawomir.milczarek@intel.com>
2022-12-02 11:37:16 +01:00
Warchulski, Jaroslaw bf6dfa6b94 Fix for '-q' option in ocloc
Related-To: NEO-6425
Signed-off-by: Warchulski, Jaroslaw <jaroslaw.warchulski@intel.com>
2022-12-02 11:37:00 +01:00
Compute-Runtime-Validation 083471a158 Revert "Set alignment for SVM_CPU properties"
This reverts commit db89d2ce6b.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
2022-12-02 08:17:13 +01:00
Jim Snow ddf14290d4 Add L0 API for querying hardware raytracing capabilities.
Related-To: NEO-5580

Signed-off-by: Jim Snow <jim.m.snow@intel.com>
2022-12-02 01:05:38 +01:00
Dunajski, Bartosz 85da0ee184 Enable flushTask path for BCS
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2022-12-01 20:10:21 +01:00
Jaime Arteaga 99655d34f9 Return a unique pointer for multiple calls to openIpcHandle
This to follow specification, which says:

zeMemOpenIpcHandle:

- Multiple calls to this function with the same IPC handle will return
unique pointers.

Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
2022-12-01 18:42:54 +01:00
Rafal Maziejuk af82557e55 Move device caps tests to shared
Signed-off-by: Rafal Maziejuk <rafal.maziejuk@intel.com>
2022-12-01 17:57:13 +01:00
Maciej Bielski d579a63730 Add helpers and debug prints for scratch/private allocations
Replace a loop with separate helpers to explicitly show differences
between per-HW-thread allocation types.

Related-To: NEO-7398
Signed-off-by: Maciej Bielski <maciej.bielski@intel.com>
2022-12-01 17:54:03 +01:00
Compute-Runtime-Validation da3a5046fc Revert "Download all allocations when event is ready"
This reverts commit d97dcc80b2.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
2022-12-01 15:27:56 +01:00
Dunajski, Bartosz 6f283d7bf5 Debug flag to override fence start value
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2022-12-01 14:58:05 +01:00
Artur Harasimiuk 03e19abbe5 infra update
Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com>
2022-12-01 13:26:17 +01:00
Lukasz Jobczyk db89d2ce6b Set alignment for SVM_CPU properties
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2022-12-01 10:45:47 +01:00
Mayank Raghuwanshi 69e6c8b1c6 Add support for retrieving max b/w for DG2
Related-To: LOCI-3425

Signed-off-by: Mayank Raghuwanshi <mayank.raghuwanshi@intel.com>
2022-12-01 10:45:32 +01:00
Krystian Chmielewski d4fe9298bf fix(debug zebin): handle misaligned access
Handle misaligned access when aplying debug relocations in zebin.
Debug relocations entries have offsets which are not of natural
alignment, and need to be specificialy handled.

Signed-off-by: Krystian Chmielewski <krystian.chmielewski@intel.com>
2022-12-01 10:45:17 +01:00