Commit Graph

503 Commits

Author SHA1 Message Date
bc5d9d149d Task VA tracking for RelaxedOrdering mode
Related-To: NEO-7458

Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2022-11-21 17:35:08 +01:00
f19abda0e2 Set root device index in OsContext
- correclty choose default engine context accounting for root device
index and  subdevices bitfield

Related-To: NEO-7516

Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
2022-11-16 23:02:19 +01:00
a66e69abc9 Prealloc cmd buffer for CSR only when being used
Related-To: NEO-7361

Currently additional command buffer is
preallocated for all CSRs, even for those which
won't be used by application. This PR changes that

Signed-off-by: Szymon Morek <szymon.morek@intel.com>
2022-11-15 20:06:29 +01:00
a17df8fa86 Return SubmissionStatus from processResidency method
it allows to return non-binary status to API layer

Related-To: NEO-7412
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2022-11-15 13:17:43 +01:00
05aea7ebc8 Move hwHelper ownership to RootDeviceEnvironment 3/n
Related-To: NEO-6853
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>

Use RootDeviceEnvironment getHelper<CoreHelper> for
- getComputeUnitsUsedForScratch
- getPitchAlignmentForImage
2022-11-15 10:22:48 +01:00
2e98fa9b60 Remove not needed BB chaining
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2022-11-10 11:27:26 +01:00
57cea7365e Return submission status from flushTagUpdate method
Related-To: NEO-7412
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2022-11-09 14:04:16 +01:00
1c3d5c3892 Prepare mechanism for returning GPU execution error on OCL API
translate task count value to OCL error

Related-To: NEO-7412
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2022-11-04 15:54:19 +01:00
308f54e4eb Revert "Apply basic WA only for multi CCS on DG2"
This reverts commit 5a2f00d295.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
2022-10-31 03:27:29 +01:00
5a2f00d295 Apply basic WA only for multi CCS on DG2
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2022-10-28 11:34:52 +02:00
f4c40c74cb Flush tag update if any heap was allocated
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2022-10-14 13:12:43 +02:00
4faf1eeb52 Flush tag update while enqueue mem fill
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2022-10-14 11:46:39 +02:00
52b63be026 Remove isCleanLeftoverMemoryRequired() + refactor sampler support path
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2022-10-04 16:24:03 +02:00
23eff82d0a OCL: optimize creating printf buffer
Dont create printf buffer when kernel doesnt require it

Related-To: HSD-18023825570
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2022-09-30 12:25:57 +02:00
9a1102bb7a Revert "Add debug flag to enable specific PIPE_CONTROL fields"
This reverts commit 2e7c90e58f.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
2022-09-29 10:22:25 +02:00
2e7c90e58f Add debug flag to enable specific PIPE_CONTROL fields
FlushSpecificCache equivalent in value:

dcFlushEnable 	 				0b000000000001
renderTargetCacheFlushEnable  			0b000000000010
instructionCacheInvalidateEnable  		0b000000000100
textureCacheInvalidationEnable  		0b000000001000
pipeControlFlushEnable  			0b000000010000
vfCacheInvalidationEnable  			0b000000100000
constantCacheInvalidationEnable  		0b000001000000
stateCacheInvalidationEnable  			0b000010000000
tlbInvalidation  				0b000100000000
hdcPipelineFlush 				0b001000000000
unTypedDataPortCacheFlush 			0b010000000000
compressionControlSurfaceCcsFlush 		0b100000000000

Setting multiple cache at once for example:

constantCacheInvalidationEnable
textureCacheInvalidationEnable
vfCacheInvalidationEnable 			0b000001101000

Related-To: NEO-6049
Signed-off-by: Krzysztof Gibala <krzysztof.gibala@intel.com>
2022-09-28 11:17:03 +02:00
a95ab1d16b Share pipeline select state updates between regular and immediate command lists
Related-To: NEO-5019

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2022-09-26 11:14:53 +02:00
6175a3e785 Debug flag to force stateless mocs encryption bit
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2022-09-23 15:19:26 +02:00
5986a7199a Share front end state updates between regular and immediate command lists
Related-To: NEO-5019

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2022-09-23 09:46:35 +02:00
645600d141 Return error when there is no memory to evict
We want to return error code to the application instead of aborting when
we are not able to make more memory resident.

Related-To: NEO-7289
Signed-off-by: Fabian Zwolinski <fabian.zwolinski@intel.com>
2022-09-22 14:26:55 +02:00
81f2d04f5a correct and unify programming of front end disable overdispatch property support
Related-To: NEO-5019

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2022-09-22 13:13:38 +02:00
ec1de69fee Do not enable basic WA.
LOAD_BALANCED is disabled so basic WA is not needed.

Signed-off-by: Michal Mrozek <michal.mrozek@intel.com>
2022-09-08 19:54:15 +02:00
c3f7e40a8d Rename special pipeline select mode to systolic
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2022-08-31 22:16:26 +02:00
8cc0177f1c Change DG2 l1 cache policy to WB
With compiler LSC WAs this gives better performance.

If debugger is active, policy will not be changed ie.
will be WBP.

Related-To: NEO-7003

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
2022-08-31 14:31:23 +02:00
f656707fc0 Use hardware support flags for state compute mode state changes
Related-To: NEO-5019

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2022-08-25 18:46:37 +02:00
595cfebaef Refactor PIPE_CONTROL programming
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2022-08-23 13:55:25 +02:00
9cf95c044e Refactor and reposition state base address tests
Related-To: NEO-5019

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2022-08-22 16:31:09 +02:00
0011368775 Add parameter to set surface state base address value
This change introduces capability to set surface state base address
when surface state heap or global base address are not available

Related-To: NEO-7187

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2022-08-18 15:36:43 +02:00
d795182eae Move files from shared/test/unit_test to /common (preamble, utilities)
unit_test/preamble/preamble_fixture.h -> common/fixtures
unit_test/source_level_debugger -> common/
unit_test/utilities/base_object_utils.h -> common/utilities
unit_test/utilities/destructor_counted.h -> common/utilities
unit_test/utilities/logger_tests.h -> common/utilities

Related-To: NEO-6524
Signed-off-by: Warchulski, Jaroslaw <jaroslaw.warchulski@intel.com>
2022-08-17 11:24:58 +02:00
ceb9d81f87 Add struct argument for input/output in StateBaseAddressHelper
This refactor makes future interface changes easier

Related-To: NEO-5019

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2022-08-17 10:28:49 +02:00
bca852617c Remove usage of TestLegacy from opencl tests
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2022-08-16 22:16:48 +02:00
bfc0919999 Remove usage of TestLegacy from shared tests
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2022-08-16 14:36:33 +02:00
5ffeac44c5 Correct shared fixture methods name to meet clang-tidy requirements
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2022-08-16 12:52:49 +02:00
6a46e8f0ca Correct method names in device and module fixtures
correct naming in derived classes

Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2022-08-12 10:40:56 +02:00
e6fc458d4b Add a struct for test fixtures with correct method naming convention
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2022-08-11 12:55:52 +02:00
aed890a219 Move files between shared/test/unit_test and /common (fixtures, helpers, mocks)
unit_test/fixtures/mock_aub_center_fixture.h -> common/fixtures
unit_test/helpers/raii_hw_helper.h -> common/helpers
unit_test/helpers/static_size3.h -> common/helpers
unit_test/helpers/ult_limits.h -> common/helpers
unit_test/memory_manager/mock_prefetch_manager.h -> common/memory_manager
common/mocks/mock_aub_stream.h -> unit_test/mocks
common/mocks/mock_csr_simulated_common_hw.h -> unit_test/mocks
common/mocks/mock_direct_submission_diagnostic_collector.h -> unit_test/mocks
common/mocks/mock_lrca_helper.h -> unit_test/mocks
common/mocks/mock_tbx_stream.h -> unit_test/mocks
common/mocks/linux/mock_os_context_linux.h -> unit_test/mocks/linux
common/mocks/windows/mock_wddm_direct_submission.h -> unit_test/mocks/windows

Related-To: NEO-6524
Signed-off-by: Warchulski, Jaroslaw <jaroslaw.warchulski@intel.com>
2022-08-11 12:53:19 +02:00
a6c1d9578e Move files between shared/test/common/helpers and shared/test/unit_test/helpersi
unit_test/helpers/cmd_buffer_validator.h -> common/helpers
unit_test/helpers/gtest_helpers.h -> common/helpers
common/helpers/blit_commands_helper_tests.inl -> unit_test/helpers
common/helpers/simd_helper_tests.inl -> unit_test/helpers
common/helpers/simd_helper_tests_pvc_and_later.inl -> unit_test/helpers
common/helpers/state_base_address_tests.h -> unit_test/helpers

Related-To: NEO-6524
Signed-off-by: Warchulski, Jaroslaw <jaroslaw.warchulski@intel.com>
2022-08-10 15:23:12 +02:00
98d776867f Add initial support for KernelArgsBuffer allocation
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2022-08-03 20:28:21 +02:00
8afcc87dc5 Support for new names in Aub/Tbx mode
New acronyms that distinguish between configurations are supported.
This commit adds support for these names by reusing ProductFamilyOverride flag.

Signed-off-by: Daria Hinz <daria.hinz@intel.com>
Related-To: NEO-7112
2022-07-25 14:46:52 +02:00
a3903c385e Remove HW types from synchronization interface
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2022-07-25 13:59:26 +02:00
f53ae0a50e Revert "Add debug flag for EOT WA"
This reverts commit cf3817e058.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
2022-07-09 01:21:56 +02:00
cf3817e058 Add debug flag for EOT WA
EOT WA requires allocating last 64KB of kernel heap and putting EOT
signature at the last 16 bytes of kernel heap

Related-To: NEO-7099
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2022-07-07 16:58:24 +02:00
4bdd8860a1 test.h refactor
Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com>
2022-07-04 18:20:07 +02:00
76d905b1f2 Pass LogicalStateHelper to SBA helper
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
2022-07-01 14:52:20 +02:00
34a7059032 Avoid reading command buffer in flushed batched submissions
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2022-07-01 11:06:38 +02:00
2c853adac3 Use LogicalStateHelper to program ComputeMode
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
2022-06-27 15:25:55 +02:00
6ab6e1abff Fix mutex order for event task and move args to gpu
This commit fixes problem with untransfered shared usm memory to gpu
when there is submit to gpu trigerred by user event. Also there is a fix
for dead lock problem caused by mixed orders of locking mutexes in csr
and in direct submission controller.

Related-To: NEO-6762

Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
2022-06-21 11:28:25 +02:00
939d109362 Add LogicalStateHelper class
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
2022-06-14 16:57:16 +02:00
49a27c3755 Refactor metrics, cmdqueue & CSR ULTs
The change eliminates the occurrence of fail on Windows:
number of sections exceeded object file format limit.

Signed-off-by: Daria Hinz <daria.hinz@intel.com>
2022-06-13 03:55:51 +02:00
8de043b71f Stop redundant SBA programming due to global atomics
For all platforms different than XE_HP_SDV (ATS) stop considering the
`useGlobalAtomics` flag as a decisive factor for trigerring the SBA
(StateBaseAddress) programming on the HW. Only XE_HP_SDV supports such
flag.

For consistency of the implementation, keep the related logic in one
place only, that is a helper in `command_encoder` and then just reuse it
in different places (`command_stream_receiver`).

Related-To: NEO-6953
Signed-off-by: Maciej Bielski <maciej.bielski@intel.com>
2022-06-08 10:39:56 +02:00