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46 Commits

Author SHA1 Message Date
Filip Hazubski 3413039a69 Add debug variable to control whether large grf should be programmed with SCM 
Add debug variable ForceGrfNumProgrammingWithScm.
Do not update large grf value in StreamProperties when unnecessary.

Related-To: NEO-6659

Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2022-05-06 15:45:46 +02:00
Bartosz Dunajski db9c0d1103 Refactor and enable MI_MEM_FENCE programming for DirectSubmission dispatch 
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2022-04-07 12:53:56 +02:00
Mateusz Jablonski 95103c3a33 Correct getters in generated commands 
cast to uint64_t before shifting value

Related-To: NEO-6475
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2022-04-04 16:35:17 +02:00
Rafal Maziejuk c7d8915dd4 Add debug variable to print XY_BLOCK_COPY_BLT command details 
Signed-off-by: Rafal Maziejuk <rafal.maziejuk@intel.com>
 2022-03-29 18:15:13 +02:00
Bartosz Dunajski e24322f266 Debug flag to control MI_ARB_CHECK prefetcher 
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2022-03-10 12:50:05 +01:00
Rafal Maziejuk 6658768149 Add check in XY_BLOCK_COPY_BLT surface width, height & depth setters 
Signed-off-by: Rafal Maziejuk <rafal.maziejuk@intel.com>
 2022-03-03 16:35:51 +01:00
Compute-Runtime-Validation e984760423 Revert "Move and extend local memory DRM allocations" 
This reverts commit b84b0015d5.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2022-02-22 08:48:46 +01:00
Daniel Chabrowski b84b0015d5 Move and extend local memory DRM allocations 
Signed-off-by: Daniel Chabrowski daniel.chabrowski@intel.com
Related-To: NEO-6591
 2022-02-21 16:04:53 +01:00
Mateusz Jablonski bf7b2674a5 Correct programming of horizontal alignment on Xe Hpc 
for linear surfaces we should program value of 128

Related-To: NEO-6466
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2022-01-25 11:14:44 +01:00
Mateusz Jablonski 0c933d83af Update RENDER_SURFACE_STATE for Xe Hpc 
For Xe Hp and later rename RSS tile mode enum from YMAJOR to TILE4

Related-To: NEO-6466
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2022-01-24 18:06:42 +01:00
Mateusz Jablonski bbea52f3f9 Update CFE_STATE for Xe Hpc 
Related-To: NEO-6466
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2022-01-21 10:55:20 +01:00
Mateusz Jablonski 570c4d4626 Correct comments and bitfield ranges in Render Surface State definition of Xe Hp 
Related-To: NEO-6466
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2022-01-20 17:55:27 +01:00
Mateusz Jablonski 8e03ce9c54 Correct programming of horizontal alignment on Xe Hp 
for linear surfaces we should program value of 128

Related-To: NEO-6466
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2022-01-20 16:41:22 +01:00
Mateusz Jablonski c79b8f0e90 Correct programming of horizontal alignment on Xe Hpg 
for linear surfaces we should program value of 128

Related-To: NEO-6466
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2022-01-20 11:08:04 +01:00
Mateusz Jablonski dfe23a08b2 Update RENDER_SURFACE_STATE for Xe Hp 
Related-To: NEO-6466
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2022-01-20 10:53:54 +01:00
Mateusz Jablonski 5cd76aef6a Refactor surface state programming, add enum value for default halign value 
Related-To: NEO-6466
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2022-01-19 14:31:28 +01:00
Mateusz Jablonski 8ebef3769c Update RENDER_SURFACE_STATE for Xe Hpg 
Program Multi Gpu params in surface state only on Xe Hp Sdv
Respect zero-size image scenario when programming surface state
Move XeHp-only tests to dedicated subdir

Related-To: NEO-6466
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2022-01-18 21:06:14 +01:00
Mateusz Jablonski ff79c84115 Correct INTERFACE_DESCRIPTOR_DATA definitions for XeHp and later 
Related-To: NEO-6466
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2022-01-14 19:06:55 +01:00
Mateusz Jablonski 66bf806018 Remove magic number from set/getBatchBufferStartAddressGraphicsaddress methods 
rename methods to set/getBatchBufferStartAddress

Related-To: NEO-6466
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2021-12-16 19:03:01 +01:00
Mateusz Jablonski 03e617d14f Refactor memory object control state methods in generated commands 
remove setters/getters for Index To Mocs Tables fields
all information contained in MOCS from gmm client context is now handled
by dedicated method set/get MemoryObjectControlState

Related-To: NEO-6466


Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2021-12-15 12:01:20 +01:00
Rafal Maziejuk d5f3ac37bf Add KernelExecutionType argument to encodeAdditionalWalkerFields method 
Signed-off-by: Rafal Maziejuk <rafal.maziejuk@intel.com>
 2021-12-08 12:00:42 +01:00
Bartosz Dunajski f20236c7f2 Initial PVC support 
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>

Related-To: NEO-5542
 2021-12-07 10:22:41 +01:00
Mateusz Jablonski f8de237963 Remove (void) from generated hw cmds 
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2021-12-01 12:26:12 +01:00
Bartosz Dunajski 91dfa5c2ac Initial DG2 support 
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2021-11-19 10:01:29 +01:00
Szymon Morek e03a50174a Fix CFE_MAX threads programming 
Resolves: NEO-6361

Signed-off-by: Szymon Morek <szymon.morek@intel.com>
 2021-11-08 13:56:03 +01:00
Bartosz Dunajski 814b365553 Fix XE_HP_SDV RSS and SBA commands 
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2021-10-05 12:32:27 +02:00
Bartosz Dunajski 4ba4c32766 Remove SBA->IOH programming on XE_HP_SDV 
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2021-09-29 12:35:43 +02:00
Kamil Kopryk d2a776bcc6 Remove L3 flush from postSync 
Related-To: NEO-6111
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
 2021-09-22 17:49:58 +02:00
Kamil Kopryk d633b59f17 Cleanup get/set MOCS functions 
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
 2021-09-22 17:39:35 +02:00
Szymon Morek 5408366f62 Fix state_compute_mode on xehp 
Related-To: NEO-5945

Signed-off-by: Szymon Morek <szymon.morek@intel.com>
 2021-07-06 11:18:21 +02:00
Bartosz Dunajski 96d14967ac Partial support for XE_HP_SDV 
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2021-06-24 18:35:54 +02:00
Kamil Kopryk fafcc0b58c Correct naming of get/set transfer width/height functions for block copy 
These functions set parameters x2/y2 for block copy.
When offset is not 0 then x2/y2 != transfer width/height,
so the new names are more correct.

Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
Related-To: NEO-4692
 2021-06-07 15:01:13 +02:00
Zbigniew Zdanowicz 8f91fcdd73 Add new atomic operation 
Related-To: NEO-5244

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2021-06-04 09:00:11 +02:00
lgotszal 3bd4bca911 Copyright header update 
Dates corrected in copyright headers to reflect original publication date
(2018 for OpenCL, 2020 for Level Zero).

Signed-off-by: lgotszal <lukasz.gotszald@intel.com>
 2021-05-17 20:38:19 +02:00
Zbigniew Zdanowicz c35f560971 Refactor internal interface 
Related-To: NEO-5244

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2021-02-15 13:24:00 +01:00
Maciej Plewka 7a5c9d39b5 Encode dispatch kernel with global bindless heaps 
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
 2020-12-02 17:30:15 +01:00
Piotr Zdunowski 4c2d92890f Opensource ADLS. 
Resolves: NEO-5092

Change-Id: I544247a057a667ce6423f2e59ba4ca769e866479
Signed-off-by: Piotr Zdunowski <piotr.zdunowski@intel.com>
 2020-10-21 19:07:38 +02:00
Raiyan Latif 921e30802a Add L3_CONTROL cmd format for Gen12LP 
Change-Id: Ibae6c3f10a54accb333aa1b21163024aac8cf93c
Signed-off-by: Raiyan Latif <raiyan.latif@intel.com>
 2020-10-01 18:17:29 +02:00
Zbigniew Zdanowicz ba4dd9f866 Fix position of commands in diagnostic mode of direct submission 
Related-To: NEO-4338

Change-Id: I439e5f66a351108625b7add5cda65c9887278632
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2020-08-19 17:04:53 +02:00
Mateusz Hoppe ddacea4383 Fix gen8 MI_STORE_DATA_IMM cmd init 
Change-Id: Id4d695e8e3d0516d1abdb3ab6cf8070de5369ed0
Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
 2020-08-18 17:26:04 +02:00
Maciej Plewka cf9d338178 Use FAST_COLOR command instead of COLOR for tgllp 
Change-Id: I9c94ecd9afb6030e96a75ecd0c882711d1c775de
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
 2020-06-19 08:48:30 +02:00
Maciej Dziuban 19de738e03 Enable copy engine on GEN12LP 
Change-Id: Ifd82abcb830a52d0e38e83a52c095da275e671fb
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
Related-To: NEO-4233
 2020-05-15 13:52:45 +02:00
Maciej Plewka 67198ea705 Use bliter for memoryFill 
Change-Id: I2e60d1b436cb2955952b62b1eb43d9efbe70d19b
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
 2020-04-29 16:10:57 +02:00
kamdiedrich f93072ddf5 Refactor image formats 
Change-Id: I01eaf33e4c31437f3a820655cda21f3e2cf6d6df
 2020-04-23 15:35:30 +02:00
Bartosz Dunajski 290445f922 Add missing atomic opcodes 
Change-Id: I119b2cefe12e2cd5a709f284ae458e73a02970ae
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2020-04-22 19:12:42 +02:00
kamdiedrich e072275ae6 Reorganization directory structure [3/n] 
Change-Id: If3dfa3f6007f8810a6a1ae1a4f0c7da38544648d
 2020-02-23 23:48:28 +01:00