d4c1631ac7
performance: don't wait for paging fence on user thread
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Related-To: NEO-12197
Currently for new resources user thread must wait before submitting
actual workload. With this commit, instead of waiting on user thread,
request is sent to background ULLS controller thread and additional
semaphore is programmed. ULLS controller will perform actual wait
and signal semaphore when paging fence reaches required value.
Signed-off-by: Szymon Morek <szymon.morek@intel.com >
2024-08-07 08:30:51 +02:00
4fc37f9afd
fix: set correct initial DirectSubmission fence value
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Related-To: HSD-18039278676
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com >
2024-07-19 09:52:17 +02:00
2b964254d6
performance: debug key for adjust ULLS on battery
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ULLS controller timeout settings will be adjusted based on ac line
status and lowest queue throttle from submissions.
Lowest queue throttle is reset when controller stops ULLS.
Related-To: NEO-10800
Signed-off-by: Dominik Dabek <dominik.dabek@intel.com >
2024-03-22 14:24:00 +01:00
edd6fd5e6c
performance: Optimize ULLS start on submit path
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Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com >
2023-12-29 15:21:49 +01:00
1d02f7fdd9
Revert "performance: Optimize ULLS start on submit path"
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This reverts commit ea78831e28
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Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com >
2023-12-28 01:54:18 +01:00
ea78831e28
performance: Optimize ULLS start on submit path
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Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com >
2023-12-27 13:55:30 +01:00
a6458433dc
refactor: correct naming of enum class constants 9/n
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Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com >
2023-12-19 10:36:25 +01:00
4f9fe6bb53
fix: detect gpu reset on windows direct submission
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Related-To: NEO-8395
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com >
2023-12-01 14:13:14 +01:00
fdcf7f6793
performance: enable new dispatch monitor fence policy in direct submission
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Related-To: NEO-8395
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com >
2023-11-28 17:21:46 +01:00
560b588cbe
fix: Update residency fence value after ring buffer switch
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Signed-off-by: Maciej Plewka <maciej.plewka@intel.com >
2023-11-17 20:46:14 +01:00
fbe61cf547
fix: add kmd wait on cpu when wait on paging fence when needed
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add storing of throttle hint value for direct submission
Related-To: NEO-9123
Signed-off-by: Katarzyna Cencelewska <katarzyna.cencelewska@intel.com >
2023-11-09 19:22:15 +01:00
20c3f45998
refactor: add ulls diagnostic flag to select monitor fence input
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Related-To: NEO-8395
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com >
2023-11-06 15:09:36 +01:00
e0ce08bb77
fix: detect gpu hang or page fault at direct submission flush to gpu
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Related-To: NEO-8395
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com >
2023-11-06 14:22:02 +01:00
7dfd3e5e59
performance: use dedicated flag to dispatch monitor fence
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Related-To: NEO-8395
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com >
2023-09-21 13:25:06 +02:00
a16d8f7b88
refactor: change direct submission interfaces to accept monitor fence
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- unify Linux and Windows default settings
- unify override default code
- correct size estimation when fence is required
- call virtual function once for both estimation and dispatch
Related-To: NEO-8395
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com >
2023-09-20 13:17:12 +02:00
7562842a58
refactor: remove LogicalStateHelper
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Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com >
2023-09-13 10:29:53 +02:00
d3355411b8
performance: Improve dispatch monitor fence from wait
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-update last submitted value while flush monitor fence
-dispatch monitor fence with workload when stalling cmds present
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com >
2023-08-30 16:15:32 +02:00
fc1f45b630
feature: Dispatch monitor fence from wait
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Resolves: NEO-8240
Related-To: NEO-8067
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com >
2023-08-08 16:42:27 +02:00
e70f441f52
fix: Idle gpu before invalidate aux table
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Related-To: NEO-8067
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com >
2023-07-05 13:51:27 +02:00
c294ef48ce
fix: Make tlb flush os agnostic
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Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com >
2023-06-30 14:12:59 +02:00
5fe9d70066
feature: new multitile post sync layout for immediate write [1/n]
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No functional changes in this commit. This is prework.
Related-To: NEO-7966
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com >
2023-06-07 13:11:10 +02:00
cbce863dc2
refactor: Rename member variables to camelCase 3/n
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Additionally enable clang-tidy check for member variables
Signed-off-by: Fabian Zwolinski <fabian.zwolinski@intel.com >
2023-04-28 16:01:14 +02:00
853a65aae9
Add PCI barrier implementation
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Resolves: NEO-7850
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com >
2023-04-24 10:33:03 +02:00
1ce269a9dd
fix: wrong return value of zeCommandQueueExecuteCommandLists when OOM
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zeCommandQueueExecuteCommandLists return ZE_RESULT_ERROR_UNKNOWN when OOM
in some scenario of direct submission.
Related-To: NEO-7840
Signed-off-by: Pan Zhenjie <zhenjie.pan@intel.com >
2023-03-28 09:52:17 +02:00
e49e245bec
Revert "Disable RelaxedOrdering if UpdateTagFromWait is disabled"
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Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com >
2023-03-27 11:47:10 +02:00
151aecc8bd
Disable RelaxedOrdering if UpdateTagFromWait is disabled
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Related-To: NEO-7458
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com >
2023-03-22 18:15:39 +01:00
2f5be7a48d
Copy command buffer into ring buffer
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Resolves: NEO-7422
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com >
2023-02-22 16:37:34 +01:00
6ebdc51fae
Dynamic queue size limit in RelaxedOrdering mode
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Related-To: NEO-7458
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com >
2023-02-06 12:02:02 +01:00
e21cf516d3
Cleanup includes 44
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Cleaned up files:
level_zero/tools/source/sysman/windows/os_sysman_imp.h
opencl/source/command_queue/command_queue.h
shared/source/command_container/cmdcontainer.h
Related-To: NEO-5548
Signed-off-by: Warchulski, Jaroslaw <jaroslaw.warchulski@intel.com >
2023-01-25 16:05:22 +01:00
a4eba996f7
refactor: don't use global ProductHelper getter 4/n
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Related-To: NEO-6853
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com >
2023-01-20 10:27:27 +01:00
a2fe929f0c
Cleanup includes 18
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Cleaned up files:
shared/source/command_stream/command_stream_receiver_hw.h
shared/source/compiler_interface/compiler_interface.h
shared/source/direct_submission/direct_submission_hw.h
shared/source/helpers/dirty_state_helpers.h
Related-To: NEO-5548
Signed-off-by: Warchulski, Jaroslaw <jaroslaw.warchulski@intel.com >
2023-01-02 13:28:29 +01:00
6993ed5c52
Reduce binaries sizes 2/n
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Observed about 50MB reduction in overall binaries size (directory build))
when building all targets
with MSVC (Visual Studio 2022 17.3.0 preview 6)
using Debug 64 configuration.
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com >
2022-12-08 16:14:38 +01:00
3b91cc1b50
Enable RelaxedOrdering for XE_HPC Immediate cmd lists
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Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com >
Related-To: NEO-7458
2022-12-08 10:12:40 +01:00
2c08f2ca8c
RelaxedOrdering: Optimize return ptr programming
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Related-To: NEO-7458
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com >
2022-11-29 13:22:25 +01:00
4b42b066f8
Use dedicated using type for TaskCount
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Related-To: NEO-7155
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com >
2022-11-28 16:44:44 +01:00
3f962bf3e8
RelaxedOrdering: Improve dependencies tracking
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Avoid not needed scheduler programming
Related-To: NEO-7458
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com >
2022-11-28 16:00:21 +01:00
a7d4162ca2
RelaxedOrdering: Preallocate scheduler to optimize dispatch time
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Related-To: NEO-7458
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com >
2022-11-28 12:42:44 +01:00
a969636b6a
RelaxedOrdering: Optimize GPU Queue stall by adding early return
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Related-To: NEO-7458
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com >
2022-11-24 16:41:05 +01:00
bc619fcbec
Queue stall mode for RelaxedOrdering
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Related-To: NEO-7458
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com >
2022-11-23 12:09:52 +01:00
e050d231b9
RelaxedOrdering: Add support for return pointer registers programming
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Related-To: NEO-7458
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com >
2022-11-23 09:58:33 +01:00
e6c1658bae
Relaxed ordering scheduler section for DirectSubmission
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Related-To: NEO-7458
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com >
2022-11-21 10:56:26 +01:00
f35f59b573
Cleanup includes 5
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Related-To: NEO-5548
Signed-off-by: Warchulski, Jaroslaw <jaroslaw.warchulski@intel.com >
2022-11-18 22:46:38 +01:00
89b96e5e8f
Introduce initial implementation of DirectSubmission relaxed ordering mode.
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Initial implementation of task store section
Related-To: NEO-7458
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com >
2022-11-17 12:23:29 +01:00
5011046a17
Add sfence when stop ring buffer
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Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com >
2022-11-09 20:02:03 +01:00
87822f94e2
Replace virtual method call for DC flush with stored bool value 2/n
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Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com >
2022-10-12 09:43:01 +02:00
5e58104f5a
Add flag to control prefetcher disabling behaviour
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Certain platforms might not require prefetcher to
be disabled in direct submission. This change
provides a way to control that behaviour.
Signed-off-by: Rafal Maziejuk <rafal.maziejuk@intel.com >
Related-To: NEO-7218
2022-08-16 16:01:30 +02:00
880464da77
Apply additional synchronization WA to DG2 ULLS
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Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com >
2022-07-06 13:37:56 +02:00
61b2ee45cd
Use LogicalStateHelper to encode SystemMemoryFence
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Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com >
2022-06-24 13:29:58 +02:00
24ff26c396
Allocate new ring buffer if all are in use
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Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com >
2022-06-10 12:45:49 +02:00
7463e1970b
Cleanup headers
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Make TUs and headers self-contained, remove unused headers
Signed-off-by: Daniel Chabrowski <daniel.chabrowski@intel.com >
2022-05-18 11:42:06 +02:00