8e969684f1
[2/n] Unified Shared Memory
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- Add kernel flags specifying indirect usage of device allocations.
- make device usm allocation resident when kernel requires this
Related-To: NEO-3148
Change-Id: I689347a0ea9b0f84c83f7883ca2381be63c61af9
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com >
2019-06-14 09:56:40 +02:00
70f92cf03c
Rename KernelCommandsHelper to HardwareCommandsHelper
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Change-Id: I0b92a2d74bc96658274e4a02fec0f322e87681b2
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com >
2019-06-12 13:45:12 +02:00
c8c2e64ec6
Add blocking flag for bliter operations
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Change-Id: I61f672780c2108961eaed40b5d5be257f3c34566
Related-To: NEO-3020
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com >
2019-06-04 21:39:43 +02:00
befbffc967
Support offsets in blitter
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Related-To: NEO-3020
Change-Id: I7ce13f0cf890c47fd40e92b5bb20c4f4ce291653
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com >
2019-06-04 16:16:37 +02:00
7cc855cc72
Update kernel test
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Resolves: NEO-3149
Change-Id: I736fc6fd84b1a8c4f6cbcac11ee40635d7fdfba4
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com >
2019-05-29 14:01:57 +02:00
b98b51b0d9
Move ptr.h to core folder
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Change-Id: Icf0db7c767b2b1ea44fccc02b135f0f6c1f78c8f
Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com >
2019-05-29 00:11:34 -07:00
b82cdd6b8e
Program MI_SEMAPHORE_WAIT for dependencies during blit operations
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Change-Id: I8b0e467886bfb23d026a0c13be514343a22a20a1
Related-To: NEO-3020
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com >
2019-05-21 14:18:16 +02:00
d15174d7c5
Block SVMAllocsManager creation in Context when SVM is not supported
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- skip SVM tests when SVM is not supported
Related-To: NEO-3157
Change-Id: Ie5d5ef4778749f60537084fc7f388714954a4873
Signed-off-by: Hoppe, Mateusz <mateusz.hoppe@intel.com >
2019-05-17 08:59:00 +02:00
4f4ef14b9b
Accept different copy directions during blit operations
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Change-Id: Idb59458b46337ca0095056857dbd75bf116b6723
Related-To: NEO-3020
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com >
2019-05-16 18:53:30 +02:00
b8fb5e683b
Move basic_math.h and vec.h to core directory
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Change-Id: I143b7af450ff48d4958b4bc7137b393a2dc0eb64
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com >
2019-05-14 21:32:55 +02:00
8f17c70e9e
Remove CommandQueueHw::requiresCacheFlushAfterWalkerBasedOnProperties
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Change-Id: Ibdc6f7b883bfef471926a4351ed7437173c4a6a6
Related-To: NEO-2535
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com >
2019-05-14 17:31:53 +02:00
0f87e9aa1a
Rename HardwareInfo members
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Change-Id: I85f56b677bafdd75dd958b488522393fc18b68af
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com >
2019-05-09 09:13:55 +02:00
bb80d327c7
Move HardwareInfo ownership to ExecutionEnvironment [1/n]
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Change-Id: I5e5b4cc45947a8841282c7d431fb69d9c397a2d4
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com >
2019-05-08 16:11:01 +02:00
445ee08ace
Fix typo
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Change-Id: I8cd853e00da7a09d20e7a43e366f1e2c45a7230c
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com >
2019-04-25 20:22:50 +02:00
dd442a213b
Fix typo in variable name
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Change-Id: I8ffa5e7627c791a4c35e84a0f01a89643e3eb595
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com >
2019-04-23 17:27:06 +02:00
fae1d882f8
Add SvmAllocationProperties
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Change-Id: Ie96aeab5597a1b3f2db8611a8a04597516730ce8
Related-To: NEO-2535
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com >
2019-04-23 10:30:04 +02:00
971cbd55f3
Add new SVM types
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Related-To: NEO-2917
Change-Id: Ica127129799c1e617a326a110348c2f70160b15c
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com >
2019-04-11 15:27:38 +02:00
ccd93e1ea8
Add method to dispatch blit operation from hostPtr to Buffer
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Related-To: NEO-3020
Change-Id: If76f2c659c3ee343693a6d3ced86a47d7ed0bf61
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com >
2019-04-10 15:17:44 +02:00
b2e16b7897
Update allocationForCacheFlush method
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Related-To: NEO-2535
Change-Id: Ia24556814188263e2ebb54b6419feddd5d8ed707
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com >
2019-04-03 18:07:13 +02:00
377aebce06
Move PIPE_CONTROL related functions to PipeControlHelper
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Change-Id: Ie8220b06d2aa35a9fd0083b7db6925b577564d36
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com >
2019-04-01 09:20:28 +02:00
4296588aa9
Use GPU address to compare with SurfaceBaseAddress in ULTs
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- remove redundant casts
Change-Id: I175801869f24be47dc6703b61bf26c0f8a1c77c6
Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com >
2019-03-26 20:49:54 +01:00
9e52684f5b
Change namespace from OCLRT to NEO
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Change-Id: If965c79d70392db26597aea4c2f3b7ae2820fe96
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com >
2019-03-26 15:48:19 +01:00
c269e97163
Add query for kernel ISA GPU address.
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Change-Id: I70974b4f73b82461eb854e4b8b400887b9977f15
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com >
2019-03-26 12:54:32 +01:00
cd62be59e1
Add allBufferArgsStateful field to Kernel
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Change-Id: I885ede725830964374421eff621cf01cecc4b17e
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com >
2019-03-21 14:24:36 +01:00
de212138b7
Use GPU address of SVM allocations in kernel functions
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Change-Id: I65fb22df2e005468956af1369b0b822cdaeaedf1
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com >
2019-03-12 09:24:44 +01:00
e53a8e8709
Add postSyncAddress to flush after walker
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Change-Id: I7fdfaf8e0acc365998cc74306ab715ea3d9c7d72
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com >
2019-03-04 14:47:53 +01:00
6fb28dd828
Refactor GraphicsAllocation class
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move most of members to protected section
merge related members into structs
Change-Id: Ief2e092aa5e61ca6f13308f9d9b1937ea6c913b4
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com >
2019-02-28 14:09:11 +01:00
8b57d28116
clang-format: enable sorting includes
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Include files are now grouped and sorted in following order:
1. Header file of the class the current file implements
2. Project files
3. Third party files
4. Standard library
Change-Id: If31af05652184169f7fee1d7ad08f1b2ed602cf0
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com >
2019-02-27 11:50:07 +01:00
d79f1afdc2
GraphicsAllocation constructor accepts allocationType and memoryPool.
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Change-Id: I5044ed26ba0cb0fc9ca7077595f5ab56353ab58c
2019-02-26 13:29:25 +01:00
12da1b0616
Remove osContextCount parameter from GraphicsAllocation
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Change-Id: I23b650e97f107008b1122a1ecea48722fe129863
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com >
2019-02-11 15:44:37 +01:00
43856e88b5
Refactor around cache flush and command queue
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Change-Id: I277e27cbc60fbbb015c0024f171697408879ec0b
2019-02-10 17:59:33 +01:00
44491a111c
Use MemoryManager retrieved from ExecutionEnvironment in Kernel dtor
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Change-Id: I5f3880e1a95b3cbd262847d97776b0b92a580181
2019-02-06 17:08:51 +01:00
048098ce66
Refactor around cache flush after walker
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Change-Id: If5c7399df91bd076b684bcab83f50b4852e53429
2019-02-06 11:12:55 +01:00
3fe78d263b
Update getGraphicsAllocationType
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Change-Id: I7613d0d5550d8032b960f86aa117b4baf6b9216f
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com >
2019-01-31 11:02:35 +01:00
f6ceb8fb4f
Remove default parameters from setArgSvm function.
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Change-Id: I4408ddedfca464d56e24c4daa0c8c7b73791d6a0
2019-01-28 12:02:54 +01:00
8ae7de7b0e
Create HardwareContext only when osContext is available
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Change-Id: I8bcf2cb20f0e1e6b9da98b477f5be206407a7a57
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com >
2019-01-13 15:12:07 +01:00
3dca095ccf
Add cache flush command after WALKER command
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Change-Id: I3983dc6c0797047e17cc8189655a22a22e85892b
2018-12-19 13:15:33 +01:00
4ddf5a1e87
Add debug flag to control RenderCompressed value in HardwareInfo
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Change-Id: I733125fbd8596f24cdeb636b69a9198c44bd899b
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com >
2018-12-17 13:11:00 +01:00
8ec072d39c
Simplify Memory Manager API [3/4]
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- remove method allocateGraphicsMemory(size_t size)
- pass allocation type in allocation properties
- set allocation type in allocateGraphicsMemoryInPreferredPool
Change-Id: Ia9296d0ab2f711b7d78aff615cb56b3a246b60ec
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com >
2018-12-17 10:42:16 +01:00
b728526c4e
Allow Device creating multiple CSRs [8/n]
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Use OsContextId instead of DeviceIndex for residency
Change-Id: Ib2367b32b5b3e320252d8254f1042f1c3d497068
2018-12-04 15:36:59 +01:00
0131e66a70
Allow Device creating multiple CSRs [6/n]
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- Introduce default Engine query
- Improve Deferred Deleter usage
- Remove Tag Allocation from Device
Change-Id: Iaa88d8dc0166325acf9a157dcd2217ea408ee285
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com >
2018-11-29 16:20:13 +01:00
7dbd0ea4f3
Move Scratch Space functionality to dedicated class
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Change-Id: Ic7655c4b971513961aba6823478a139ffc943466
2018-11-29 11:55:56 +01:00
2d77b86e70
Allow Device creating multiple CSRs [5/n]
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- Move Engine type to OsContext
- Move OsContext to CSR
- Improve EngineMapper logic
- CompletionStamp cleanup
Change-Id: I935cb7169c8c48cd09837e20e3da06f6dd3437b9
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com >
2018-11-27 14:25:04 +01:00
352450adaa
Pass number of os contexts to Graphics Allocation constructor
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Mark unshareable allocations
Change-Id: Ie745dc639d8c6b01e2275d29ee1fb4c6343df2bc
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com >
2018-11-21 17:38:02 +01:00
08424d798f
Enable power saving mode for queues created with throttle hint low.
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- When queue is created with throttle hint low it should be power conservative
- With this change whenever queues with low throttle setting requests wait
for GPU completion, such wait will be handled in power conservative manner.
- Whenever GPU is not completed, waiting thread will be put to sleep and will
for GPU completion that triggers the wake up interrupt.
Change-Id: I9f34872a38ab9f5952f9d9623ea43503fc3dd587
2018-11-16 15:20:31 +01:00
2249917695
Minor cleanup in ULT CSR
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Change-Id: I810cd0bd5dd13d8ba631316d5fb86e12905497d8
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com >
2018-11-16 11:45:07 +01:00
1e0064fc2f
Allow ULTs to work with enabled TimestampPacketWrite
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Change-Id: Idd4622469220b859e8724d9179837c685377ce52
2018-11-07 08:50:04 +01:00
815ae851b7
Graphics Allocation: store task count per context id
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Move definition of allocations list method to internal_allocation_storage.cpp
Change-Id: I4c6038df8fd1b9335e8a74edbab33b78f9293d8f
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com >
2018-11-06 12:43:47 +01:00
8504b37a08
Add branch prefix to unit_tests/gen_common subdirectory
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Change-Id: I7661dbd8a65aaa50c21afb982b23edb9080d6f84
2018-11-01 00:15:04 +01:00
7ece16ee7a
Graphics Allocation cleanup.
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- remove one constructor
- start using mock graphics allocation in tests
Change-Id: Idb8f4a35dbc2cae8d6bf667bab5542d8e91d6e0d
2018-10-31 11:54:24 +01:00