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257 Commits

Author SHA1 Message Date
Maciej Dziuban 33c07c875f Do not insert PipeControl WA or DC Flush when not needed 
Change-Id: I71030273708f243324a566232528bce00a0361df
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2019-03-22 12:37:27 +01:00
Liwei Wang ca4b47f7f4 Add support of GPU preemption (v1.00). 
https://github.com/intel/compute-runtime/pull/119

Change-Id: I3134d62b66751c8621b80002373a7a9b198e044e
 2019-03-22 08:49:11 +01:00
Koska, Andrzej fcdfcb3fc4 Pass enqueued values to enqueueHandler 
Change-Id: I991818657c7cafaf8911ce711a87a6c7b4531517
Signed-off-by: Koska, Andrzej <andrzej.koska@intel.com>
 2019-03-13 11:23:37 +01:00
Piotr Fusik ec72787b98 Remove MemoryManager::allocateGraphicsMemoryForHostPtr. 
Change-Id: I629f2299a183fc135135dbaff89216b966554a95
Signed-off-by: Piotr Fusik <piotr.fusik@intel.com>
 2019-03-12 15:51:32 +01:00
Maciej Plewka e53a8e8709 Add postSyncAddress to flush after walker 
Change-Id: I7fdfaf8e0acc365998cc74306ab715ea3d9c7d72
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
 2019-03-04 14:47:53 +01:00
Maciej Dziuban fb78677d8d Add function for ensuring command buffer has allocation with given size 
CommandStreamReceiver::ensureCommandBufferAllocation

Change-Id: Icb48c9beff4f087addda75e97b90d86e8481e7ff
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2019-03-04 09:39:00 +01:00
Zbigniew Zdanowicz 10a25e405a Remove debug flag ForceMultiEngineQueue 
Change-Id: Iabf38999a03be3422c25c12978808731df77a899
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2019-02-28 16:06:36 +01:00
Mateusz Jablonski 6fb28dd828 Refactor GraphicsAllocation class 
move most of members to protected section
merge related members into structs

Change-Id: Ief2e092aa5e61ca6f13308f9d9b1937ea6c913b4
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2019-02-28 14:09:11 +01:00
Filip Hazubski 8b57d28116 clang-format: enable sorting includes 
Include files are now grouped and sorted in following order:
1. Header file of the class the current file implements
2. Project files
3. Third party files
4. Standard library

Change-Id: If31af05652184169f7fee1d7ad08f1b2ed602cf0
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2019-02-27 11:50:07 +01:00
Dunajski, Bartosz 4597759a65 Dont inherit TimestampPacket from Waitlist when doesnt exist 
Change-Id: I12b184353243f99ec7bacdf2dcd9da1ba09e3516
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-02-27 09:15:48 +01:00
Jablonski, Mateusz 798137e4bb Add function to create devices bitfield based on allocation properties 
Change-Id: Ic70443b1fb6106186efcff318690e434dc1db625
Signed-off-by: Jablonski, Mateusz <mateusz.jablonski@intel.com>
 2019-02-26 12:07:09 +01:00
Maciej Dziuban 0cf71414e2 Pass command stream to dispatch scheduler 
instead of taking it from CommandQueue

Change-Id: I8e43c3b7ed5cb46f79edf3290a84fc6ad41f3b57
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2019-02-25 14:35:19 +01:00
Hoppe, Mateusz 432b8f20a7 Allow cpu copy with debug keys only when ready waitlist events 
Change-Id: If9293787c76b8248a84e25d03cbf9a9b5aaf7cca
 2019-02-22 17:39:57 +01:00
Mrozek, Michal 1ae92e995a Extract some code blocks to dedicated methods. 
Change-Id: I9e47631367b95ce4ff5479c463a3cb5085b66315
 2019-02-22 15:12:45 +01:00
Mrozek, Michal e4bffaa194 Route all enqueue without kernel calls directly to enqueueHandler. 
Change-Id: I4c4ab013ff9adbe0e32e2661b3091f319d36c9c3
 2019-02-22 14:19:22 +01:00
Maciej Dziuban 90e970cee6 Create GraphicsAllocation during dispatch when queue is blocked 
Change-Id: I8a6f9e14ff57e7ed2920260af291317805f4df13
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2019-02-21 15:28:17 +01:00
Mrozek, Michal 4139e88982 Allocate command buffers with proper allocation type. 
Change-Id: I912dd41cf68fa16ab481bb003c4f5ae63f1f04c4
 2019-02-20 12:52:45 +01:00
Jobczyk, Lukasz 2bcecf3e62 Align command buffers to 64KB 
Change-Id: Id1fbd7c6f1aee48c4b69ec305d5332cb0aa86507
Signed-off-by: Jobczyk, Lukasz <lukasz.jobczyk@intel.com>
 2019-02-18 09:58:45 +01:00
Zdanowicz, Zbigniew 51d34da7ec Add multiEngineQueue field to DispatchFlags and modify interfaces 
Change-Id: Iaa4754a22e9b88201aed7df01c7d6e5fd06c84a9
 2019-02-14 17:12:15 +01:00
Zdanowicz, Zbigniew 8e1e874a76 Refactor headers and reorder include order 
Change-Id: I6b341e2b37e569af7d741bfd7a63804c0b25a4c9
 2019-02-14 13:39:01 +01:00
Mrozek, Michal 4ef67479e4 Add const keyword. 
Change-Id: I52a7e2f81c12ef29fd9c57740a21b9e68608181f
 2019-02-12 15:02:24 +01:00
Mrozek, Michal 0e7fd2ffed Add multiEngine field to command queue with debug variable to override it. 
Change-Id: I3c1e424a7ad545e166e178d1726595e6d9502ca7
 2019-02-12 12:22:24 +01:00
Kamil Diedrich a7b46ccdbd Add RAII for cl_objects 
- add removeVirtualEvent to cmdQueue fixture
- add const keyword in event functions

Change-Id: I11354eb8fceb15ae2c58bddd327863a15aab6393
 2019-02-12 11:19:35 +01:00
Venevtsev, Igor 5e8fb19e5d Remove OCL Events concept from EnqueueOperation and dispatchWalker 
Change-Id: Iec55b0be673a2a40b9621212add224a33d4abc5d
 2019-02-12 08:46:18 +01:00
Kamil Diedrich 89410a6733 Add DCFlush before resolving 
Change-Id: Id5f82edc4631aa16baa55b26b8bde69f4a30572c
 2019-02-11 16:33:34 +01:00
Dunajski, Bartosz dc181defba Use GpuAddress for TimestampPacket programming 
Change-Id: I1303605c33e2e0267a1716e12a0bfcb341fcfbd7
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-02-11 15:31:17 +01:00
Chodor, Jaroslaw 43856e88b5 Refactor around cache flush and command queue 
Change-Id: I277e27cbc60fbbb015c0024f171697408879ec0b
 2019-02-10 17:59:33 +01:00
Venevtsev, Igor 66e3f3c16c Remove OCL Events concept from command stream receiver 
Change-Id: I4d5a97b41efe601c92c2f3f33e9e24bb7d4fa3d2
 2019-02-08 15:02:40 +01:00
Kamil Diedrich e1eab521e7 use release for cl-objects instead of delete 
- fix for data race in events
- modification of the addition child event

Change-Id: I6ea3a413f13f13a91d37d20d8b9fad37d0ffafb9
 2019-02-05 14:09:32 +01:00
Mateusz Jablonski ce4a75e121 Require same allocation type when obtaining reusable allocation 
Change-Id: I829301b83a6214bcfb4fc9f2692f21ae9a002456
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2019-02-01 16:10:28 +01:00
Koska, Andrzej 395d053f02 Limiting the value of LWS to the value of GWS 
Change-Id: I24e89125e586ed77d396ba9e40dd039f1ab213fe
 2019-02-01 12:49:54 +01:00
Filip Hazubski d30cc221df Update disabling caching for a resource 
Change-Id: I00eac0add01f75a1b82d04cf42652c15b776a457
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2019-02-01 10:50:21 +01:00
Chodor, Jaroslaw 7d04159f76 Refactor around cache flush 
Change-Id: Iff32af0111375f4ffc804c82e6d753d57fe94e80
 2019-01-31 22:19:06 +01:00
Venevtsev, Igor 303014582a Extend semaphore synchronization for different command stream receivers. 
Change-Id: Ic904b8c1e052adbb7b2ef82a6dec74ec69837f9f
 2019-01-30 09:33:41 +01:00
Milczarek, Slawomir b11e0825c9 AUB capture with support for allocation dumps 
Change-Id: I90a2b75043c33af92e4557be37cde4b9699582c6
 2019-01-28 21:20:08 +01:00
Mateusz Jablonski 128bf4552f Remove debug flag ForceResourceLockOnTransferCalls 
Unlock locked resoures in freeGraphicsMemory method

Change-Id: I2baae7b7f9d8260f19a4b083849c5bf0d1a764f3
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2019-01-25 14:03:29 +01:00
Zdanowicz, Zbigniew 158f200476 Add HW commands const definitions 
Change-Id: If2e9d7f7f707b7b8c7bd8dbd3853ab3b6dad0c9a
 2019-01-18 12:13:25 +01:00
Stefanowski, Adam 1001f76085 Add logic for Events in multi-thread scenario 
- inc refCount when enqueue is blocked and dec after flushing

Change-Id: I9e8f8d226897124a7e51f2473939d53868bef7a2
 2019-01-14 19:45:26 +01:00
Mrozek, Michal 6c902faf0b Cleanup around Walker programming. 
- remove redundant methods.
- remove redundant parameters.
- Simplify the logic of programWalker

Change-Id: I6112bb19fd0008530f5e5510238bf42e669379b7
 2019-01-14 10:12:38 +01:00
Mrozek, Michal 15bfdc101f Refactor programWalker. 
- Pass variables computed in upper layers via args.
- declare variables prior to functions.
- Change some names for better verbosity.

Change-Id: I603b9ada1f62a08de5ac0fce177ccd840f2ce98c
 2019-01-14 09:02:14 +01:00
Pawel Wilma 14e8fdd8f8 Fix for incorrect timestamp offset calculation in event profiling info 
Change-Id: I634c29daf4734b24e4075542dc6550c531977f0a
Signed-off-by: Pawel Wilma <pawel.wilma@intel.com>
 2019-01-11 16:39:05 +01:00
Hoppe, Mateusz 64ff9d30b7 Fixes for misaligned hostPtr enqueueReadWrite 
- use getGpuAddress for BuiltinOpParams
- fix read/writeImage

Change-Id: I2e6e9a1d91871fa9f22851f31eb5a7b337b5aecc
 2019-01-11 09:14:47 +01:00
Mrozek, Michal ef73bb8c11 Move Walker specific code to dedicated method. 
- move cache flushes after the Walker.

Change-Id: I58c5e76bad22ac42da2c466ef008ef5bf96df077
 2019-01-10 16:36:56 +01:00
Hoppe, Mateusz 3381dc258b Fix for ReadWriteBufferRect with misaligned hostPtr 
Change-Id: I026f3512e6501b7e3a4cd5b9b6e9010a0b3b8a72
 2019-01-09 14:57:25 +01:00
Hoppe, Mateusz cbc4d349a8 Do not align down pointer passed to hostPtr allocation 
- do not align up hostPtr allocation size
- align BaseAddress programmed in SurfaceState to DWORD

Change-Id: Ic6d02e53fd13dda881f8eb845a131bffe4deb45c
 2019-01-08 21:21:34 +01:00
Napiatek, Henryk J f7e0decf44 Improve capturing profiling timestamps 
Change-Id: I3a568afb664cae5c871e53de2c36fc8be65a4bdf
 2019-01-03 12:35:56 +01:00
Venevtsev, Igor 73a63c7689 Fix Read/WriteBuffer for unaligned offsets 
Change-Id: I08d33e80243f41174f4629c8a611e286629d2e10
 2018-12-31 14:50:07 +01:00
Kamil Diedrich fad2f8dbd1 Change auxTranslationDirectory 
Change-Id: I5d433d340e945b799dbec25a22fd610312f00c0a
 2018-12-28 16:46:42 +01:00
Artur Harasimiuk b5f443edc0 Revert commit cc1f4bed60. 
This reverts commit cc1f4bed60.
Revert "Revert "Use GPU instead of CPU address in programming commands
for HwTim(...)""

Change-Id: Iff122612bb46ba80bcc70b07b2609bfd5f0b9653
Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com>
 2018-12-21 13:25:49 +01:00
Artur Harasimiuk b2c1d68a91 Revert "Revert "Revert "Fix Read/WriteBuffer for unaligned offsets""" 
This reverts commit f6757c02a4.

Change-Id: I239528e7588dc9766b10a7ce7e517d6b2cdd6375
Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com>
 2018-12-21 08:57:45 +01:00