Commit Graph

17 Commits

Author SHA1 Message Date
Daria Hinz 6566eb3193 Move Linear Stream to core folder
Change-Id: I962ebd6e9075fcab9d7b6211524093109e62d382
Signed-off-by: Daria Hinz <daria.hinz@intel.com>
2019-08-26 17:00:53 +02:00
Dunajski, Bartosz 89d1878cd6 Rename engine member in CommandQueue
Change-Id: I01516616c164f19afbcd62d39a2a42d04ff768c9
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2019-07-15 17:53:01 +02:00
Jaime Arteaga b98b51b0d9 Move ptr.h to core folder
Change-Id: Icf0db7c767b2b1ea44fccc02b135f0f6c1f78c8f
Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
2019-05-29 00:11:34 -07:00
Maciej Plewka 9e52684f5b Change namespace from OCLRT to NEO
Change-Id: If965c79d70392db26597aea4c2f3b7ae2820fe96
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
2019-03-26 15:48:19 +01:00
Filip Hazubski 8b57d28116 clang-format: enable sorting includes
Include files are now grouped and sorted in following order:
1. Header file of the class the current file implements
2. Project files
3. Third party files
4. Standard library

Change-Id: If31af05652184169f7fee1d7ad08f1b2ed602cf0
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
2019-02-27 11:50:07 +01:00
Hoppe, Mateusz 3c47c418a9 Refactor HardwareParse::getSurfaceState() to return CPU memory
- if SSH indirectHeap is passed, use CPU address instead of GPU
address programed in SBA command

Change-Id: Id2c8973db0dfe2d9562ee835a27c4d3c28ea3351
2019-02-04 17:49:00 +01:00
Hoppe, Mateusz 509ed273c4 Refactor Ults finding hardware commands
- use CPU address for found dynamicStateHeap address in
StateBaseAddress command

Change-Id: I2d857c5a069f5a8f46169d2047cdb27efd3502b8
2019-02-04 17:26:37 +01:00
Chodor, Jaroslaw 9a98f19a2f Adding ULT mechanism for cmdBuff validation
Change-Id: I35f06695e27b9eb052e2aaa717862ae01db9a0ba
2019-01-30 18:58:53 +01:00
Dunajski, Bartosz 3ad33bf1b8 Allow Device creating multiple CSRs [3/n]
Add CSR from Device to CommandQueue

Change-Id: Iaccf3c73d25e357242837677777d0513e81f520e
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2018-11-23 10:51:34 +01:00
Zdanowicz, Zbigniew 620708e510 Add Non-Uniform AUB tests
Change-Id: Ie1944caa2ea9b7240dde9460bd817f8889fff3bb
2018-10-24 00:40:37 +02:00
Artur Harasimiuk 40146291ad Update copyright headers
Updating files modified in 2018 only. Older files remain with old style
copyright header

Change-Id: Ic99f2e190ad74b4b7f2bd79dd7b9fa5fbe36ec92
Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com>
2018-09-20 18:02:35 +02:00
Dunajski, Bartosz a807b9a90b Initial implementation of Timestamp Packet write
Change-Id: Ic498bcf9795f54fbb5fb5a8d07ed17fa70dc4f1a
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2018-08-28 08:27:13 +02:00
Zdanowicz, Zbigniew 996cb52370 Refactor ULTs and AUB tests around HW commands
Change-Id: Ie00822b9e0864af6ede3e967039efa911d1dbb6f
2018-05-22 13:59:30 +02:00
Mrozek, Michal d900bdffc6 [33/n] Internal 4GB allocator.
- Move indirect heap to internal allocator domain.
- Add logic in getIndirectHeap to allocate with proper API depending on
heap type
- Add State base Address programming, reflecting that now Indirect Object
Heap is placed in 4GB domain.
- For AddPatchInfoCommentsForAUBDump mode , keep all heaps in non 4GB mode.

Change-Id: I6862f6a249e444d0d6cfe7e499a10d43f284553e
2018-04-19 08:13:48 +02:00
Mrozek, Michal 1602fa5a88 [7/n] Internal 4GB allocator
- rename getBase to getCpuBase
- change some test names accordingly.

Change-Id: I6fb2e4714298250147ea7766a916d7f5d62edc54
2018-03-05 22:16:14 +01:00
Mateusz Jablonski 13ac81f465 Change pipeline select programing
- Program one PS with gpgpu selection and media sampler
- Program PS only when media sampler requirement changed
  or when preamble was not sent

Change-Id: I85ba3f74087733e79d048e120aeb8b4b04796e00
2018-01-18 14:39:47 +01:00
Brandon Fliflet 7e9ad41290 Initial commit
Change-Id: I4bf1707bd3dfeadf2c17b0a7daff372b1925ebbd
2017-12-21 00:45:38 +01:00