277786d433
Refactor obtaining IndirectHeaps
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Change-Id: I9ad13f35daa18b0ff7ae760749cf4cdc7416b347
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com >
2019-07-17 11:13:49 +02:00
7c30e1ed4a
Add CMake flag to control device enqueue
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Change-Id: Ia2ba2c5437adeca2c0335f5a2ffd28a6a2881a2a
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com >
Related-To: NEO-2942
2019-07-17 10:21:10 +02:00
89d1878cd6
Rename engine member in CommandQueue
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Change-Id: I01516616c164f19afbcd62d39a2a42d04ff768c9
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com >
2019-07-15 17:53:01 +02:00
fe26b0b406
Move debug_manager_state_restore.h to core.
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Change-Id: I3ef4a1aec40efa4bbc8346a5b517336c42c06519
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com >
2019-07-15 17:21:38 +02:00
9d723a10aa
Move enumerateLeak to core.
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- remove not used parameter.
- remove the usage of default parameters.
- move some constants to memory management as well.
Change-Id: Iedf374568fa3594ffad6b53534e4483485863324
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com >
2019-07-15 13:53:03 +02:00
2c0c0ace88
Flush Marker command with TimestampPacket dependencies
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Change-Id: I6475624996ccc254adb6641bef3cda431e57325a
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com >
2019-07-15 11:31:16 +02:00
e58273fac2
Move memory management to core.
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Change-Id: Ifa9233960f81095e293df631da9422608535171d
2019-07-15 10:19:42 +02:00
0440b86d05
Rename SVM Memory Manager to Unified Memory Manager.
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Change-Id: I1d7637a5aaca3ef5190c4f6303c81060f95744a9
2019-07-12 11:22:09 +02:00
42604b8645
Improve PIPE_CONTROL programming
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Change-Id: Id21fe4d08fdfc19921051beb8f9a66737fefc2f3
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com >
2019-07-12 10:50:45 +02:00
3b8d39be62
Revert "Improve PipeControlHelper"
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This reverts commit 878928caee
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Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com >
Change-Id: I91c4cffc90d613a6a6e6bcee6e9cf39b8a707cb3
2019-07-11 11:56:02 +02:00
878928caee
Improve PipeControlHelper
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Change-Id: I8d553ec82026399225e452529044a0470afe7963
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com >
2019-07-10 19:37:08 +02:00
373415ab6f
Add isCompleted methods to timestamp packet.
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Related-To: NEO-3429
Change-Id: If24c93f47d0351e350aae5c3200dc81fbd8495af
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com >
2019-07-10 12:01:02 +02:00
a38e9da034
Optimize marker call in blocked scenarios.
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- Do not emit batch buffer
- obtain completion stamp directly from csr
Change-Id: I7ff58f2f019ee8158665f6fb93682ce5aae17bd6
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com >
2019-07-10 11:01:49 +02:00
0a8a77d47c
Move enqueue blit logic to enqueueHandler
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Change-Id: Ibbad22906387c15243708d37b272601f4734697d
Related-To: NEO-3020
2019-07-08 12:37:06 +02:00
27a0c5a566
Remove not used waitUntilGet parameter from takeOwnership method
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Change-Id: Ic76264a87bbe9179f4aeb2ec3f97cdddd8465654
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com >
2019-07-02 15:41:13 +02:00
27f3f8ea8f
Pass private scratch size to scratch space controller
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Related-To: NEO-3190
Change-Id: I6f1e71481679492516d898226de6a1e721896e81
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com >
2019-06-28 14:32:06 +02:00
da09c70e8c
Remove not used parameter
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Change-Id: Ieef5a0da66a91075b682e917def3578cf48b0bbe
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com >
2019-06-27 13:58:18 +02:00
8d4791143b
Change postSyncAddress offset for cache flush
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Change-Id: I6cc557888e46e4a1c1ff495ddd2a3f9b6e264a21
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com >
2019-06-27 11:42:52 +02:00
8263d488c6
Submit Semaphore dependency for enqueue read/write without Kernel
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Change-Id: I22e1743b4cbd6e8285527fdfe25424a6cb3ff462
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com >
Related-To: NEO-3020
2019-06-25 14:21:57 +02:00
e2d1e0b377
Add linux specific CMakeLists.txt for helpers
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Change-Id: I78e169f13de5745012a7ae868dbfa990736a9621
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com >
2019-06-17 14:31:08 +02:00
aae31c3c1b
Add windows specific CMakeLists.txt for helpers
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Change-Id: I2fe16e3f95f78bc678838d6c00f89de09a1a9c5f
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com >
2019-06-17 09:36:49 +02:00
cf78aab248
Allow to push all dependency types to CsrDependencies helper
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Change-Id: I0ef5dd0f77ade7f02a03c787618d55a4fcfba17c
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com >
Related-To: NEO-3020
2019-06-12 17:17:38 +02:00
70f92cf03c
Rename KernelCommandsHelper to HardwareCommandsHelper
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Change-Id: I0b92a2d74bc96658274e4a02fec0f322e87681b2
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com >
2019-06-12 13:45:12 +02:00
825e381ae0
Move MI_FLUSH_DW programming to helper method
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Change-Id: Ic459b531df265b6f7f92bbaaf80e4514364627f4
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com >
Related-To: NEO-3020
2019-06-11 15:47:32 +02:00
b98b51b0d9
Move ptr.h to core folder
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Change-Id: Icf0db7c767b2b1ea44fccc02b135f0f6c1f78c8f
Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com >
2019-05-29 00:11:34 -07:00
583d4d4c6c
Add clearAllDependencies parameter to obtainNewTimestampPacketNodes
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The capability to clear Timestamp packet dependencies from command queue.
Related-To: NEO-2747
Change-Id: Id3812539a47b96e23d0b8b17b9b8f54878ee2ef2
Signed-off-by: Milczarek, Slawomir <slawomir.milczarek@intel.com >
2019-05-24 12:29:49 +02:00
b64210d3db
Add local memory usage selector in memory manager
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Related-To: NEO-2906
Change-Id: I3172e9551b8d06437c273b122dc6e9d529155b5c
Signed-off-by: Pawel Wilma <pawel.wilma@intel.com >
2019-05-23 11:05:36 +02:00
b8fb5e683b
Move basic_math.h and vec.h to core directory
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Change-Id: I143b7af450ff48d4958b4bc7137b393a2dc0eb64
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com >
2019-05-14 21:32:55 +02:00
8f17c70e9e
Remove CommandQueueHw::requiresCacheFlushAfterWalkerBasedOnProperties
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Change-Id: Ibdc6f7b883bfef471926a4351ed7437173c4a6a6
Related-To: NEO-2535
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com >
2019-05-14 17:31:53 +02:00
de988d067c
Fix ExecutionEnvironment test and rename hwInfoHelper to hardwareInfo
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Change-Id: I849b9f5a9f449f063e5717ea9758e80c6662c5a5
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com >
2019-05-09 08:53:24 +02:00
bb80d327c7
Move HardwareInfo ownership to ExecutionEnvironment [1/n]
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Change-Id: I5e5b4cc45947a8841282c7d431fb69d9c397a2d4
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com >
2019-05-08 16:11:01 +02:00
6c8b14c918
OmitTimestampPacketDependencies to omit node dependency in timestamp packet
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Makes subcapture feature work with timestamp packet enabled.
Related-To: NEO-2747
Change-Id: Ifa45f1c066129671a02dc708b537b285f5a05d7f
Signed-off-by: Milczarek, Slawomir <slawomir.milczarek@intel.com >
2019-05-07 16:05:00 +02:00
bc35cd250a
Do not use max power saving mode in VA sharing scenarios.
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-This can be achieved by passing CL_QUEUE_THROTTLE_LOW_KHR as throttle hint
to command queue.
- This gives much better control about the granularity of this feature
instead of triggering this for the whole context user may still have
power saving mode queues.
Change-Id: I066729f963119ddc1f62ad2785c342af2fea588e
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com >
2019-05-07 15:23:13 +02:00
445ee08ace
Fix typo
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Change-Id: I8cd853e00da7a09d20e7a43e366f1e2c45a7230c
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com >
2019-04-25 20:22:50 +02:00
22c2c9b02c
Change the size of aux translation transfer.
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Change-Id: I9b34babf26eee217c203d0c09d819765a45a9506
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com >
2019-04-20 15:45:07 +02:00
086ef7c461
Simplify code by introducing TimestampPacketStorage::Packet.
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Related-To: NEO-2872
Change-Id: Ifce455f1a48f2db2bf16af2dd32208ee4542204d
Signed-off-by: Piotr Fusik <piotr.fusik@intel.com >
2019-04-18 16:14:04 +02:00
745c20c78a
Rename TimestampPacket to TimestampPacketStorage.
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Related-To: NEO-2872
Change-Id: Id1f78491912c44890ae7ead2cac12ec8eb073628
Signed-off-by: Piotr Fusik <piotr.fusik@intel.com >
2019-04-16 15:34:28 +02:00
da19e924f5
Add events support for cache flushes
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Related-To: NEO-2536
Change-Id: Iea9e9b08df0225ce5a126ab950621576b3880bbe
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com >
2019-04-15 15:44:25 +02:00
543b3d39d0
Use CPU pointers for TimestampPacket where appropriate.
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Related-To: NEO-2872
Change-Id: Ic91a1dd6252d2970e20bb32c3d867449041cbb8a
Signed-off-by: Piotr Fusik <piotr.fusik@intel.com >
2019-04-15 10:55:12 +02:00
501a521120
Do 4 byte transfers for full copy kernel.
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- Also utilize mem object allocation size for aux translation.
Change-Id: I117e4d17b2c8e2acc8395381f36f3019d6987314
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com >
2019-04-11 15:49:46 +02:00
4eb48e3d06
Add function to flush caches
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Related-To: NEO-2536
Change-Id: Ifbf7e7a42514dd66eb0914f9d13407287481e123
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com >
2019-04-05 09:48:50 +02:00
b2e16b7897
Update allocationForCacheFlush method
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Related-To: NEO-2535
Change-Id: Ia24556814188263e2ebb54b6419feddd5d8ed707
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com >
2019-04-03 18:07:13 +02:00
f3d17008ee
TransferProperties: lock resource only when transfer on CPU is requested
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Change-Id: Ic93b4fd438e75f5d54cbae9bec332c4b18c6b1ee
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com >
2019-04-01 14:02:49 +02:00
0ff6358c17
Add method checkResourceCompatibility
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Change-Id: I858f54cbeac86121882ca0dec1a5f35eca034dbd
Signed-off-by: Kamil Diedrich <kamil.diedrich@intel.com >
2019-04-01 11:12:32 +02:00
a025dc6985
Reverse logic of creating Memory Manager - part 6
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-Remove a redundant condition from the MemoryManager constructor
Change-Id: I4b6c56f30a19e77a7a20f68c6d85516aaa52d102
Signed-off-by: Jobczyk, Lukasz <lukasz.jobczyk@intel.com >
2019-04-01 10:27:29 +02:00
d4a0c4852b
Move EngineType to aub_stream.
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Change-Id: Ieaa75aaf4aca4487833754eb38ff709adcbf0f11
Signed-off-by: Piotr Fusik <piotr.fusik@intel.com >
2019-03-27 10:06:29 +01:00
9e52684f5b
Change namespace from OCLRT to NEO
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Change-Id: If965c79d70392db26597aea4c2f3b7ae2820fe96
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com >
2019-03-26 15:48:19 +01:00
047f2bec87
Program correct addresses in EnqueueReadWriteBufferRect scenarios
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- SurfaceBaseAddress should be programmed with aligned address
this was not the case for certain origin and region values
- offset from aligned address added to operationParams
Change-Id: I0742b826dd0b70f0a6dedf436b850734fa015688
Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com >
2019-03-26 10:37:46 +01:00
9ecb3193af
Reverse logic of creating Memory Manager - part 3
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-Move a Device::getEnabled64kbPages method's logic
to the Memory Manager constructor
Change-Id: Ide88898000e5817a79f9a6ad5dfc9d680bec0533
Signed-off-by: Jobczyk, Lukasz <lukasz.jobczyk@intel.com >
2019-03-25 14:42:16 +01:00
33c07c875f
Do not insert PipeControl WA or DC Flush when not needed
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Change-Id: I71030273708f243324a566232528bce00a0361df
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com >
2019-03-22 12:37:27 +01:00