Commit Graph

1656 Commits

Author SHA1 Message Date
a6be6533ea Simplify Memory Manager API [2/n]
- make AllocationData a protected structure
- use AllocationProperties instead of AllocationFlags
- refactor methods: allocateGraphicsMemory64kb, allocateGraphicsMemoryForSVM
- call AllocateGraphicsMemoryInPreferredPool in AllocateGraphicsMemory
  where there is no host ptr

Change-Id: Ie9ca47b1bccacd00f8486e7d1bf6fb3985e5cb12
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2018-12-11 13:12:00 +01:00
7e397b0132 Revert "Pass number of devices obtained from platform to Aub Manager."
This reverts commit f30d2102fa2a33673b95a20f630cd592f2a4d9ac.

Change-Id: I1df03a9dd819075e9fac5ffaf5ee8f4a250aab39
2018-12-11 12:19:29 +01:00
c905dad62f Improve checkGpuUsageAndDestroy method to work with multiple CSRs
Change-Id: I7b8325116c90151c6339f95a81880c467e81748f
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2018-12-11 10:26:50 +01:00
2fec06007d Pass number of devices obtained from platform to Aub Manager.
Change-Id: Iccef0ab9c69c4b676b3f012d941dd0f55788debd
2018-12-11 09:55:10 +01:00
be6d70c909 change implementation of strcpy_s and strncpy_s for Linux
use memcpy instead of strncpy.

Change-Id: Ic079f21a28ec7e258e134c6e1be4cde81df736ec
Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com>
2018-12-11 09:49:38 +01:00
d2f1a15f03 infrastructure update
Change-Id: Ib6a2e9bd0ffd3fbdb081c75cbb157997a4a04236
Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com>
2018-12-10 15:15:42 +01:00
0b839722f4 Don't store preemption mode in Wddm.
Change-Id: I6088e5fec65b6910fefb42ec9735181867c44a1b
2018-12-10 14:48:52 +01:00
09505ce853 Updated AubStream header with hardware context interface
Change-Id: Iff5890e36d4dc0a46f7bb210404d4ff010ab9083
2018-12-10 14:28:37 +01:00
60ac4d35ce Refactor GetDevicesTest
- do not compare pSkuTable in Aub modes

Change-Id: I3388f460922e35212fddd54bf519ae35db36ba67
2018-12-10 13:19:10 +01:00
f5508ed2d7 Simplify preemption control on Linux
Change-Id: Ie0896cc8950f7fbb271b710b8bb221eb41ba0445
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2018-12-10 13:12:16 +01:00
9e53740130 Unify AUB and TBX CSRs part 2
Move:
- getEngineIndexFromInstance
- getEngineIndex
to common CSR
Unification of arguments of some AUB/TBX methods

Change-Id: I46f25e16aa9fbad10ffc3890cc31915fa5edb1d9
2018-12-10 12:23:27 +01:00
e88548a251 Do not call submit on HardwareContext with zero-sized command buffer
Change-Id: I53b9233b30f58e2fcb354142eb1186a20c834d62
2018-12-10 10:02:46 +01:00
d870359434 Revert "Select RCS1 for low priority CommandQueue"
Change-Id: I8d6a4ed76917c73aad96bbb69ef42ffb7b416eb6
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2018-12-09 17:42:18 +01:00
c865dbbaa1 Choose BUFFER_HOST_MEMORY as type in 32 bit applications.
Change-Id: I33addbd37cb4b9192c2dfa88aeee6d6cbdafd714
2018-12-07 16:17:04 +01:00
481b83b436 Add throttle hint to unblocked enqueue path
Change-Id: Id24e00f0f797d6245e897ba4e709d42f2ef0f5e8
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2018-12-07 14:13:31 +01:00
7f7808fb71 Select RCS1 for low priority CommandQueue
Change-Id: I1f86b0afedb8f6e76fee896c2751a0bf196996d7
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2018-12-07 13:18:13 +01:00
17de3fbeb9 Add option to generate random inputs to tests.
Change-Id: I940e6405fbd964bbe8c815f9fc8466d04efe4bbf
2018-12-07 12:22:35 +01:00
c18d0d7634 Link igdrcl_tests with aub_stream_enable lib
Change-Id: I6e5e182acf93f25a50e5f3f43a90b7522505a2ef
2018-12-07 09:42:35 +01:00
2dd71c2e25 Unify AUB and TBX CSRs part 1
Move:
- getPPGTTAdditionalBits
- getGTTData
- getMemoryBankForGtt
to common CSR

Change-Id: I7c9616bc18a4cffb0673d7964af168ea3ddad2dd
2018-12-07 09:24:54 +01:00
5837d6f506 Remove unnecessary aubCenter test
Change-Id: I66ae0de7ff2b418f8a9499751a61b60ad9e16efe
2018-12-07 08:41:57 +01:00
deb4bd844b Initialize rand in tests.
Change-Id: I534a89b070f9f5be2182fcd4a58f96a85c6d93de
2018-12-06 19:00:30 +01:00
3719c7a767 Limit AUB SSH size to 64KB.
Change-Id: I1a23aa2a253a93ed9633ab7fda0a6180050add83
2018-12-06 17:36:49 +01:00
3d35bf4291 Fix Source Level Debugger scenario
- when Program is compiled and linked, kernel debug options must be
added when linking
- when linking by CompilerInterface, store debugData in Program

Change-Id: Ie93a8fa7586681b94307a30c109c103f78ec861a
2018-12-06 17:23:39 +01:00
a39660de92 Infrastructure update.
Change-Id: I8d47cb0f0766d4c496d60a17ad7487fc6c51d41b
2018-12-06 15:31:14 +01:00
c8748b77a0 Simplify memory manager API [1/n]
pass struct with properties to allocate graphics memory methods:
for protected methods use AllocationData
for public methods use AllocationProperties

Change-Id: Ie1c3cb6b5e330bc4adac2ca8b0bf02d30ec76065
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2018-12-06 15:09:25 +01:00
ace20aba5b Add slm size to capabilityTable
Change-Id: Ia8839b2268069ac3815ff21cf247deefbf3b5335
Signed-off-by: Woloszyn, Wojciech <wojciech.woloszyn@intel.com>
2018-12-06 13:43:39 +01:00
52fbf6473b Minor refactor of CommandQueue class
Change-Id: Iab64ad133fe96402d9577b64380472729f0190a8
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2018-12-06 12:45:25 +01:00
a0f2723589 Fix MSVC warning.
Change-Id: Ib3a732670a046df324b3518e1359342dd57a2829
18.49.11968
2018-12-06 10:24:57 +01:00
43fd32b3ad Enable aggregating command buffers with multiple osContexts
- Store inspectionId for each osContext in GraphicsAllocation
- Pass osContextId to aggregateCommandBuffer and use it to select inspectionId

Change-Id: I2c377ad7577a8c882cc89c1205430cb581c2c0d5
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
2018-12-06 10:11:07 +01:00
a35e3b792d Return valid TaskLevel for UserEvent and GlSyncEvent
Change-Id: Ic2bcb64e92e07b94c1af47b109af1274bf6c8c3e
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2018-12-06 10:09:46 +01:00
2ca3e4c4e5 Ensure that allocations in 4GB heap have non 0 GPU address to patch.
- That address is used later to deduce that allocation is non null
- If we have address 0 it is incorrectly detected as null ptr on the GPU.

Change-Id: I45e1bb31f1788528327da35bfdcc13f3fa6beec2
2018-12-06 09:06:38 +01:00
bb7f8d9b88 Disable compression when using hostPtr
Change-Id: Ifa066a3824f51b4ad5957de9fe8590853c620587
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
2018-12-05 16:07:15 +01:00
6a1a28c687 Add new CFL device IDs
Change-Id: I1846d4d76152467e257f684e68b5a8d12f7ac889
Signed-off-by: Woloszyn, Wojciech <wojciech.woloszyn@intel.com>
2018-12-05 16:05:53 +01:00
a99939b08f Fix dumping of cl_cache
- change creatOsReader and constructor of RegistryReader
- move body of constructors of RegistryReader from .h to .cpp

Change-Id: I57cbf51a57cb1cb7f9cd2473af766a79cf2035d2
2018-12-05 15:02:04 +01:00
fe228ea5f7 Use GPU address in calculateNewGSH()
Change-Id: I82add7aab4b26444f288a9c4dbce6328578a03d2
Signed-off-by: Pawel Wilma <pawel.wilma@intel.com>
2018-12-05 10:33:35 +01:00
13f23dffdb Refactor UltCommandStreamReceiverTest test
- remove unnecessary dynamic allocations

Change-Id: I2580244c91fd3f6864c55807090823556b4c7906
2018-12-05 07:13:11 +01:00
1bf98c7f80 Added support for expectMemory call from aub stream
Change-Id: I8acf27eff8b2f38dcb8d9873e03c35bfab6f3298
2018-12-04 12:03:36 -08:00
835aa09e9c Decanonize general state base address
Change-Id: I9c0bc92f5e11467d13c04fee4add85193e2a3c3f
Signed-off-by: Pawel Wilma <pawel.wilma@intel.com>
2018-12-04 17:02:04 +01:00
e5a8616d26 Test Lrca initialization
- debug mode LRI must be present

Change-Id: Idd9f9a85b9610177cb7ca378e37178ce333aa8b2
2018-12-04 15:54:54 +01:00
b728526c4e Allow Device creating multiple CSRs [8/n]
Use OsContextId instead of DeviceIndex for residency

Change-Id: Ib2367b32b5b3e320252d8254f1042f1c3d497068
2018-12-04 15:36:59 +01:00
3dd13e08a6 Manifest update
Change-Id: I6f55e605c0e7b05e9a61a37c45ab59088913c8b3
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2018-12-04 12:13:14 +01:00
44308ae69c Update test kernel.
Change-Id: If06f65fbd39b03e6bd6585fb02188618251ee8e7
2018-12-03 15:59:22 +01:00
7747db13e1 Deferred deleter: move to next deletion if current deletion cannot be applied
Change-Id: I7067bc2bc74f92518a33ccb9f9dce9b57cc28637
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2018-12-03 15:24:35 +01:00
12c586e1d1 dependencies update
Change-Id: I640a1a5c8206440eaec37d1007dc743b3bb5ad2b
2018-12-03 14:41:16 +01:00
38fb8cd9c3 Refactor mmio programming.
Change-Id: I2ec9294b800adcd537f03d69fd4ba4e015e8db7a
2018-12-03 14:40:00 +01:00
91c4a952a7 infrastructure update
Change-Id: I6621410cfefe118b39ab6c19edf0e39b5e35e279
Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com>
2018-12-03 12:45:52 +01:00
09f3f4e856 Move heap32[0] to heap32[3].
Change-Id: Icea6eef5646894283725e29ce7ee930284af2673
2018-12-03 09:32:36 +01:00
1f7448425d Allow Device creating multiple CSRs [7/n]
Create and initialize all supported Engines

Change-Id: If0adf1a06b5005ef2698cebc6f1aaa6eacf562ec
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2018-11-30 15:48:44 +01:00
54269d9791 Turn on Windows OS support for Local Memory
Change-Id: I83ff6d787d18a621d6213fbe32166d00d3e31ea9
2018-11-30 15:29:39 +01:00
38416a2d83 Manifest update
Change-Id: Ibe9707f16868fadf48824a31c4b8dae7c3364142
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2018-11-30 12:43:02 +01:00