Commit Graph

12292 Commits

Author SHA1 Message Date
Compute-Runtime-Validation b342b5f53b Revert "[PVC] Remove tlb flush"
This reverts commit 9b13f13e51.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
2023-01-17 03:13:05 +01:00
Mayank Raghuwanshi 52593fd4f4 Update mechanism for retrieving timestamp for Sysman memory
Related-To: LOCI-3679

Signed-off-by: Mayank Raghuwanshi <mayank.raghuwanshi@intel.com>
2023-01-17 00:15:44 +01:00
Warchulski, Jaroslaw c275008e51 Cleanup includes 32
Cleaned up files:
level_zero/core/source/cmdlist/cmdlist_hw.h
level_zero/core/source/cmdqueue/cmdqueue.h
level_zero/core/source/event/event.h
opencl/source/helpers/get_info_status_mapper.h
opencl/source/helpers/hardware_commands_helper.h
shared/source/helpers/per_thread_data.h

Related-To: NEO-5548
Signed-off-by: Warchulski, Jaroslaw <jaroslaw.warchulski@intel.com>
2023-01-16 20:41:37 +01:00
Mateusz Jablonski 9a5be1bb58 test: use stringstream instead of sprintf in tests
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2023-01-16 18:46:00 +01:00
Dominik Dabek a8e8044e00 Revert "Adjust tg dispatch size heuristic"
This reverts commit 256907e6a8480b7d5efc583572ecf3d996af582e.

Related-To: NEO-6989

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
2023-01-16 13:41:35 +01:00
Mateusz Jablonski 7d70063186 Reduce scope of State Base Address WA for DG2 platforms
Related-To: NEO-7607, HSD-16013000631, HSD-14013910100
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2023-01-16 13:12:21 +01:00
Mateusz Jablonski 9dd6c4013c Reduce scope of Tile64 for 3D surface WA for DG2 platforms
Related-To: NEO-7607, HSD-1409882685
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2023-01-16 13:03:43 +01:00
Zbigniew Zdanowicz 816b23f0ba Add event synchronization sandbox test
Related-To: NEO-7490

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2023-01-16 12:46:25 +01:00
Dunajski, Bartosz 99e0493a39 Capability to create multiple Regular contexts per engine
Ralated-To: NEO-7618

Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2023-01-16 12:45:35 +01:00
Mateusz Hoppe 7850d06c09 feature: Disable LevelZero debugging when experimental OpenCL enabled
- both drivers: OpenCL and LevelZero cannot be debugged within single
process

Related-To: NEO-7025

Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
2023-01-16 12:13:37 +01:00
Lukasz Jobczyk 9b13f13e51 [PVC] Remove tlb flush
Related-To: NEO-7116

Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2023-01-16 12:04:12 +01:00
Warchulski, Jaroslaw 8de3898abc Cleanup includes 31
Cleaned up files:
shared/source/command_stream/experimental_command_buffer.h
shared/source/helpers/get_info.h
shared/source/helpers/local_id_gen.h
shared/source/memory_manager/gfx_partition.h
shared/source/memory_manager/host_ptr_manager.h
shared/source/memory_manager/prefetch_manager.h
shared/test/common/mocks/mock_memory_manager.h

Related-To: NEO-5548
Signed-off-by: Warchulski, Jaroslaw <jaroslaw.warchulski@intel.com>
2023-01-16 11:45:55 +01:00
Mateusz Jablonski 50b8069d41 feature: add optional support for Xe drm driver
xe_drm.h header is taken from commit 9cb016ebbb6a275f57b1cb512b95d5a842391ad7
https://cgit.freedesktop.org/drm/drm-xe/tree/include/uapi/drm/xe_drm.h

Related-To: NEO-7578

Co-authored-by: Philippe Lecluse <philippe.lecluse@intel.com>
Co-authored-by: Francois Dugast <francois.dugast@intel.com>

Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2023-01-16 11:32:49 +01:00
Jaime Arteaga 6dd7feb435 refactor: Create new helper in IPC blackbox tests
Create a single helper for exchanging IPC handles for all
blackbox tests.

Related-To: LOCI-3771

Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
2023-01-13 23:27:38 +01:00
Jaime Arteaga 84dec57f0a fix: Add debug message for BO from shared-handle
Related-To: LOCI-3771

Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
2023-01-13 17:19:49 +01:00
Igor Venevtsev d99d5963df Enable implicit flush control by default for XE_HPG family
[2/3] - enable implicit flush for new resources

Related-To: NEO-6827

Signed-off-by: Igor Venevtsev <igor.venevtsev@intel.com>
2023-01-13 16:20:56 +01:00
Lukasz Jobczyk bbc13485d3 Include events from split in relaxed dependencies
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2023-01-13 15:58:21 +01:00
Dominik Dabek 4585b82ada feature(ocl): re-enable pool buffer allocator, dg2
Related-To: NEO-7332

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
2023-01-13 15:24:29 +01:00
Igor Venevtsev c9936a4cbd Enable implicit flush control by default for XE_HPG family
[1/3] - enable implicit flush for GPU idle

Related-To: NEO-6827

Signed-off-by: Igor Venevtsev <igor.venevtsev@intel.com>
2023-01-13 14:57:08 +01:00
Pawel Cieslak 6c09b8cbbc Update infra
Signed-off-by: Pawel Cieslak <pawel.cieslak@intel.com>
2023-01-13 14:41:04 +01:00
Kacper Nowak d2a2656caa fix(zebin): Enforce fallback to CTNI on TGL/ICL for nGEN dummy kernel
For TGL and ICL platforms - if on clCreateProgramWithSource()
call we detect a nGen dummy kernel usage - enforce fallback to the
patchtokens format (only for this kernel).
- corrected naming
- minor ULTs refactor (less dependencies).
Signed-off-by: Kacper Nowak <kacper.nowak@intel.com>
2023-01-13 14:36:56 +01:00
Dominik Dabek 0c3cde2141 fix(ocl): adjust pool buffer allocator
Increase chunk alignment from 256 to 512.
Restores performance in some workloads with pool enabled but lowers maximum
possible number of buffers in pool from 256 to 128.

MemObj size will keep the value passed to clCreateBuffer ie. will not be
aligned up by chunk alignment.
CL_MEM_SIZE will now return same value as with pool disabled.

Related-To: NEO-7332

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
2023-01-13 14:20:29 +01:00
Zbigniew Zdanowicz ee99df18aa Fix event signaling in command list extension function
Related-To: NEO-7490

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2023-01-13 14:13:00 +01:00
Mateusz Jablonski d17b1e9019 test: add missing test for sampler WA conditions for DG2 platform
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2023-01-13 13:51:30 +01:00
Mateusz Jablonski a8c125ceb9 test: add missing test for compression selector
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2023-01-13 13:42:58 +01:00
Mateusz Jablonski 91a9b925f7 fix: Append device id to ambigous device names
Related-To: NEO-7537
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2023-01-13 13:31:18 +01:00
Zbigniew Zdanowicz e8b0024b5c Enable signal all packets
Related-To: NEO-7490

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2023-01-13 13:15:59 +01:00
Mateusz Jablonski c4759884d8 fix: defer initialization of cross root device tag allocations
additional tag allocations are not needed before creating OCL contexts
with multiple root devices

Related-To: NEO-7634

Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2023-01-13 13:13:05 +01:00
Lukasz Jobczyk dff2c2d8e3 Align external host ptr allocation gpu va to 2MB
Related-To: NEO-7116

Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2023-01-13 12:37:10 +01:00
Cencelewska, Katarzyna f94528097a fix: add set stateCacheInvalidationEnable to flush cache
when blit operation and dcflush needed

resolves problem with corruptions visible when switch ccs with bcs
on platforms without engines coherency

Resolves: NEO-7577
Signed-off-by: Cencelewska, Katarzyna <katarzyna.cencelewska@intel.com>
2023-01-13 10:35:54 +01:00
HeFan2017 2ea734491a Deferred deletion of allocations in main thread
Add a clearQueueTillFirstFailure interface to DeferredDeleter, which
iterates the queue from the front and delete the allocations in the
queue till a failure. It is called by defer deletion of allocations
occupied by mutliple contexts to unlock the execution in main thread

Related-To: NEO-7532

Signed-off-by: HeFan2017 <fan.f.he@intel.com>
2023-01-13 09:20:35 +01:00
Warchulski, Jaroslaw 1ad4b81b28 Cleanup includes 30
Cleaned up files:
opencl/test/unit_test/fixtures/cl_device_fixture.h

Related-To: NEO-5548
Signed-off-by: Warchulski, Jaroslaw <jaroslaw.warchulski@intel.com>
2023-01-13 08:22:14 +01:00
Maciej Plewka 16bc84e27d feature(ocl) use tags to synchronize multi root device events
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
2023-01-13 08:09:32 +01:00
Warchulski, Jaroslaw fecb52ac49 Cleanup includes 29
Cleaned up files:
opencl/source/helpers/cl_memory_properties_helpers.h
shared/source/memory_manager/surface.h

Related-To: NEO-5548
Signed-off-by: Warchulski, Jaroslaw <jaroslaw.warchulski@intel.com>
2023-01-13 07:53:03 +01:00
Bari, Pratik 21a0a4af52 Removal of Template Specializations and NiceMocks
Template Specializations and NiceMocks have been removed in
Linux Common Code, ECC, Firmware, Frequency, Global Operations,
Power, PCI, RAS and Standby ULTs.

Related-To: LOCI-3391

Signed-off-by: Bari, Pratik <pratik.bari@intel.com>
2023-01-13 05:33:53 +01:00
Joshua Santosh Ranjan 2e1d20883b Fix the bpp to 1 for platforms not using blit for region copy
For platforms which do not using blit commands for copying,
the bpp could be set as 1, which leaves the transfer dimensions
unmodified.

Related-TO: LOCI-3723

Signed-off-by: Joshua Santosh Ranjan <joshua.santosh.ranjan@intel.com>
2023-01-13 05:31:16 +01:00
Bari, Pratik a5ac8197e5 Removal of Template Specializations and NiceMocks
Template Specializations and NiceMocks have been removed in
Memory, Performance, Scheduler and Temperature ULT.

Related-To: LOCI-3391

Signed-off-by: Bari, Pratik <pratik.bari@intel.com>
2023-01-13 05:21:56 +01:00
Bari, Pratik 90ea027c7d Removal of Template Specializations and NiceMocks
Template Specializations and NiceMocks have been removed in
Diagnostics, Engine, Events and Fabric Port ULT.

Related-To: LOCI-3391

Signed-off-by: Bari, Pratik <pratik.bari@intel.com>
2023-01-13 05:17:50 +01:00
Joshua Santosh Ranjan 3fdb9ae0dd Fix zero elapsed time for AppendMemoryCopy
1. If cpu based copy is used, it is possible that copy time is
less than device timestamp resolution. In this scenario, this patch
returns 1 instead of 0.

2. This patch also fixes usage of CPU time instead of CPU timestamp
for end timestamp calculation.

Related-To: LOCI-3754

Signed-off-by: Joshua Santosh Ranjan <joshua.santosh.ranjan@intel.com>
2023-01-13 04:40:50 +01:00
Spruit, Neil R d1ee840ba5 Enforce 64KB alignment when mmaping GPU_TIMESTAMP_DEVICE_BUFFER
Related-To: LOCI-3866

Signed-off-by: Spruit, Neil R <neil.r.spruit@intel.com>
2023-01-12 22:52:25 +01:00
John Falkowski 01017a5df3 L0: add support for deferred memory free as per ContextImp::freeMemExt
Signed-off-by: John Falkowski <john.falkowski@intel.com>
2023-01-12 21:05:02 +01:00
Aravind Gopalakrishnan 889c2fe4e9 feature: Enable additional engine queries
Adds flexibility to query for additional engines

Related-To: LOCI-3346

Signed-off-by: Aravind Gopalakrishnan <aravind.gopalakrishnan@intel.com>
2023-01-12 19:43:02 +01:00
Andrzej Koska be9775891c Narrowing the usDeviceID range for WA
This patch narrows down the scope covered by WA
to G10 machines only

Related-To: NEO-7475
Signed-off-by: Andrzej Koska andrzej.koska@intel.com
2023-01-12 16:40:18 +01:00
Mateusz Jablonski bc5bce6847 fix: remove device id value from device name string
Resolves: NEO-7537
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2023-01-12 16:34:22 +01:00
Mateusz Jablonski 0a75560d7d Reduce scope of WAs for DG2 platforms
Related-To: NEO-7607, HSD-14010744585, HSD-14010847105
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2023-01-12 14:13:54 +01:00
Zbigniew Zdanowicz 5a82b84219 refactor event interface for better use of functions
Related-To: NEO-7490

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2023-01-12 11:50:35 +01:00
Zbigniew Zdanowicz 5339d5c0af refactor level zero event for better access of completion field
Related-To: NEO-7490

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2023-01-12 10:57:57 +01:00
Lukasz Jobczyk 6eb66ee133 [PVC] Enable tlb flush
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2023-01-12 09:37:14 +01:00
Compute-Runtime-Validation ddb7eb07b0 Revert "Align external host ptr allocation gpu va to 2MB"
This reverts commit d24f403cc4.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
2023-01-12 09:33:16 +01:00
Krystian Chmielewski 7c408c23b2 refactor(zeinfo): improve code readibility
Signed-off-by: Krystian Chmielewski <krystian.chmielewski@intel.com>
2023-01-12 09:33:00 +01:00