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Author SHA1 Message Date
Dunajski, Bartosz 0939743874 Pass OsContextWin object during Wddm context creation 
Change-Id: Iba8d801bb6af4e9d28681caddb9c487500a42c8c
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-03-04 09:11:59 +01:00
Cetnerowski, Adam 5c05d44735 ULT renaming: Get Context Info tests 
Change-Id: Id5a62ae2b5a121f1df467903c3f645224de53d5c
Signed-off-by: Cetnerowski, Adam <adam.cetnerowski@intel.com>
 2019-03-04 08:40:16 +01:00
Dunajski, Bartosz 86dabbf6d5 Improve OsContext construction 
Change-Id: Ibf9293344cc5c0ae1b2cc011e87d9e3626f3a066
 2019-03-01 08:35:38 +01:00
Zbigniew Zdanowicz 10a25e405a Remove debug flag ForceMultiEngineQueue 
Change-Id: Iabf38999a03be3422c25c12978808731df77a899
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2019-02-28 16:06:36 +01:00
Piotr Fusik 426a7b6efe Pass by const reference. 
Change-Id: I68dc9d2a77da8cc7f81759c4e72d32e2e7f71a1d
Signed-off-by: Piotr Fusik <piotr.fusik@intel.com>
 2019-02-28 14:12:13 +01:00
Mateusz Jablonski 6fb28dd828 Refactor GraphicsAllocation class 
move most of members to protected section
merge related members into structs

Change-Id: Ief2e092aa5e61ca6f13308f9d9b1937ea6c913b4
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2019-02-28 14:09:11 +01:00
Piotr Fusik 33a9d3160b Simplify code. 
Change-Id: If730d02312da01515ae53b5faaeb5d33419ec4ba
Signed-off-by: Piotr Fusik <piotr.fusik@intel.com>
 2019-02-28 13:09:52 +01:00
Piotr Fusik e11b7675d5 WddmAllocation constructor accepts allocationType. 
Change-Id: I1e561b11e78dd942e04f3b029739921d0929ceed
Signed-off-by: Piotr Fusik <piotr.fusik@intel.com>
 2019-02-28 11:59:16 +01:00
Mrozek, Michal 6cb4732abe Move isl3Capable outside of Graphics Allocation. 
Change-Id: If9949f0d6d3405dcdeb221cbee1ce30307166c21
 2019-02-28 10:48:27 +01:00
Piotr Fusik 8febabfbd6 DrmAllocation constructor accepts allocationType. 
Change-Id: I6a6457948ada7eb59537d17b966278d114f802c6
Signed-off-by: Piotr Fusik <piotr.fusik@intel.com>
 2019-02-27 16:58:22 +01:00
Filip Hazubski 612121d5fe Fix typo in fixture name 
Change-Id: Id0ac28416a1ff32a8dca9503c30d918a2b2f80d7
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2019-02-27 15:46:29 +01:00
Mrozek, Michal fca7b4e044 Remove Drm32Bit allocator. 
- not used anymore.

Change-Id: Ibb7da1758feb67224ac0b172c72f45c2f1c229d9
 2019-02-27 14:28:16 +01:00
Filip Hazubski 8b57d28116 clang-format: enable sorting includes 
Include files are now grouped and sorted in following order:
1. Header file of the class the current file implements
2. Project files
3. Third party files
4. Standard library

Change-Id: If31af05652184169f7fee1d7ad08f1b2ed602cf0
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2019-02-27 11:50:07 +01:00
Mrozek, Michal 3eb10d0cc2 Add logging of EXTERNAL_HOST_PTR AllocationType. 
Change-Id: I247a9e969b6cb0ba337018d324549e39217e54e6
 2019-02-27 11:46:37 +01:00
Mrozek, Michal 73456d66b3 Add proper type for host ptr allocations. 
Change-Id: I324b54b415626043cc801ceb7f73547b96018fe0
 2019-02-27 10:25:32 +01:00
Mateusz Hoppe d5d177dd58 Override AllocateGraphicsMemoryInDevicePool in DrmMemoryManager 
Change-Id: I54da682ecb055e71af0968872ddb0ec7726c3adc
Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
 2019-02-27 10:05:46 +01:00
Dunajski, Bartosz 4597759a65 Dont inherit TimestampPacket from Waitlist when doesnt exist 
Change-Id: I12b184353243f99ec7bacdf2dcd9da1ba09e3516
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-02-27 09:15:48 +01:00
Cetnerowski, Adam 1f65bdc2fb ULT renaming: clFlush tests 
Change-Id: Ie1645edd168fd128ccfd61959ab5cb03d9c90195
Signed-off-by: Cetnerowski, Adam <adam.cetnerowski@intel.com>
 2019-02-26 22:15:24 +01:00
Hoppe, Mateusz 63ebe252eb Aubstream header update 
Change-Id: I68573223715e5cbb6a308b88d9bae35741ef9984
 2019-02-26 19:27:36 +01:00
Piotr Fusik d79f1afdc2 GraphicsAllocation constructor accepts allocationType and memoryPool. 
Change-Id: I5044ed26ba0cb0fc9ca7077595f5ab56353ab58c
 2019-02-26 13:29:25 +01:00
Jablonski, Mateusz 798137e4bb Add function to create devices bitfield based on allocation properties 
Change-Id: Ic70443b1fb6106186efcff318690e434dc1db625
Signed-off-by: Jablonski, Mateusz <mateusz.jablonski@intel.com>
 2019-02-26 12:07:09 +01:00
Mrozek, Michal ce77425428 Add support for reserveGpuVirtualAddress. 
Change-Id: I068df0dd3b2064cdb93be1c4408eeb86ff264d2f
 2019-02-26 12:01:17 +01:00
Cetnerowski, Adam 0a49afc7e8 ULT renaming: clFinish tests 
Change-Id: I947dbc4eebc9fc92a41dc54c450951360a8bca64
Signed-off-by: Cetnerowski, Adam <adam.cetnerowski@intel.com>
 2019-02-26 10:31:52 +01:00
Zdunowski, Piotr 842fb5dadc [4/n] Log allocation placement. 
Change-Id: I300be5f09b6ee77aa89584a6bddf4c7e57aa54f1
 2019-02-26 10:21:42 +01:00
Piotr Fusik 378bd28bab Change the signature of MemoryManager::createGraphicsAllocation. 
Change-Id: Ia82235ff2831fd5b3436d488a5946bb49d63ce91
 2019-02-25 16:08:35 +01:00
Maciej Dziuban 0cf71414e2 Pass command stream to dispatch scheduler 
instead of taking it from CommandQueue

Change-Id: I8e43c3b7ed5cb46f79edf3290a84fc6ad41f3b57
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2019-02-25 14:35:19 +01:00
Dunajski, Bartosz 10083d5a21 Improve SimpleKernelFixture 
Change-Id: I94251eb9d4ae827b83ada0a371f6ee8411a5455e
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-02-25 09:41:58 +01:00
dongwonk e030c9907e Abort if can't load from test-file 
Change-Id: Id9deef8f088ad7a20770fbb6e49c1fbd4ac96cfb
Signed-off-by: dongwonk <dongwon.kim@intel.com>
 2019-02-23 10:14:05 +01:00
Cetnerowski, Adam 974bba0943 ULT renaming: Write image tests 
Change-Id: I25d892dccb9af003ceed6e7d09be04457b174f53
Signed-off-by: Cetnerowski, Adam <adam.cetnerowski@intel.com>
 2019-02-22 20:52:20 +01:00
Hoppe, Mateusz 432b8f20a7 Allow cpu copy with debug keys only when ready waitlist events 
Change-Id: If9293787c76b8248a84e25d03cbf9a9b5aaf7cca
 2019-02-22 17:39:57 +01:00
Cetnerowski, Adam d5e16d81b0 ULT renaming: write buffer tests 
Change-Id: I1890891fb2dfa79c0d6640130830b7016f3bda0f
 2019-02-22 14:52:08 +01:00
Cetnerowski, Adam 345f31406c ULT renaming: Write Buffer Rect tests 
Change-Id: I4bab71e3d8d3f4410f6ed1e77a5d67e3c9fb5868
 2019-02-22 13:51:28 +01:00
Katarzyna Cencelewska edb3e14147 Fix for enum's name 
change lowercase 'b' for uppercase 'B'

Change-Id: I35f973bc7966e9d5b9f38d4e4a370215e80012ac
 2019-02-22 11:59:17 +01:00
Dunajski, Bartosz 764aa45137 Add simple kernel to unit tests 
Change-Id: Ifc02970a1d9384e00242cc3b8a97b1d2cc1d24c0
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-02-22 11:41:39 +01:00
dongwonk b44d434a89 limited GPU range is used for external 32bit allocation 
Change-Id: I494ad97fb1ddfa7b3c6b2e7cef2ae04fba571ba0
Signed-off-by: dongwonk <dongwon.kim@intel.com>
 2019-02-21 16:26:49 -08:00
Milczarek, Slawomir 278bb83c56 Enable AUB sub-capture in AubStream captures (1/n) 
Change-Id: I6bd0605d06cf4dc3937e2dbeba7ed7037ae91476
 2019-02-21 22:40:40 +01:00
dongwonk 56972935ad graphic memory allocation with alignment in limited Range heap 
Change-Id: Iccfb0fdc2f161e30bfdd26154110185277f176f5
Signed-off-by: dongwonk <dongwon.kim@intel.com>
 2019-02-21 10:10:47 -08:00
Piotr Fusik 4ec5be0c99 Simplify code by removing AllocationOrigin. 
Change-Id: Ie73cefc1ae1ee846fb9a5ef1054af01cd1867a4d
 2019-02-21 16:29:05 +01:00
Maciej Dziuban 90e970cee6 Create GraphicsAllocation during dispatch when queue is blocked 
Change-Id: I8a6f9e14ff57e7ed2920260af291317805f4df13
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2019-02-21 15:28:17 +01:00
Piotr Fusik 3e2a2ec191 Do not truncate to size_t while aligning. 
Change-Id: If92e3b20c0ba08a6024116a44463c72ff4cfddce
 2019-02-21 14:18:34 +01:00
Hoppe, Mateusz 98db6147d8 Pass full aubfile name to initAubCenter when using TBX with AubDump 
Change-Id: I9184ce38cd9a066259bbf3a5b8a56694d4e309b4
 2019-02-21 12:39:10 +01:00
Mateusz Jablonski d683bc70c6 Disable tests verbose by default 
Change-Id: I00bc92ed686a77215666923f1471ba760dea765d
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2019-02-21 12:32:40 +01:00
Jablonski, Mateusz 9e7c30cb06 Choose Standard or Standard64 heap depending on 64KB suitablity of resource 
Change-Id: I633b1bef1cdef2c5149909c997adc85434bcaf73
Signed-off-by: Jablonski, Mateusz <mateusz.jablonski@intel.com>
 2019-02-21 12:18:26 +01:00
Mrozek, Michal a1d4c07f45 Simplify DRM allocation constructors. 
Change-Id: I2c477ce85f4748f0637451a405f7949aa829ba81
 2019-02-21 12:06:01 +01:00
Mrozek, Michal 45a0ceecfb Clean drm interfaces. 
- all driver allocations are using SoftPin
- remove unneeded methods.
- remove unneeded members.
- remove unneeded code paths.

Change-Id: I3369c0a4d37727210b5a26271d25537ca5218bd4
 2019-02-20 16:11:19 +01:00
Katarzyna Cencelewska c9a8f9b1be GlSharingFunction tests update 
Add mock of opengl32.dll to check that sharing functions are loaded

Change-Id: I361707ee9a506e84db51d4fa9c98823db2550fae
 2019-02-20 16:05:32 +01:00
Cetnerowski, Adam 711d67aa3c ULT renaming: Enqueue Task tests 
Change-Id: Ie76e47b262a18ea92a4b03a5aacf361ec6b5df8f
 2019-02-20 15:19:13 +01:00
Piotr Fusik 75edea81bb Virtual address space partitioning on Linux [2/n] 
Move selectHeap from Wddm to MemoryManager.
Set DrmAllocation::origin.

Change-Id: I5d412e35d524d1f31174893b9ce1d3b1e98eee96
 2019-02-20 14:43:08 +01:00
Mrozek, Michal 4139e88982 Allocate command buffers with proper allocation type. 
Change-Id: I912dd41cf68fa16ab481bb003c4f5ae63f1f04c4
 2019-02-20 12:52:45 +01:00
Mrozek, Michal 65625e22bf Enhance force shared physical memory flag. 
- forces zero copy for all buffers created with this flag.

Change-Id: Ib76b452e286dcbd3481f1c96f3a48db63fb5c4b5
 2019-02-20 12:26:27 +01:00
Dunajski, Bartosz 23fcbb3265 WriteMemory support in HardwareContextController 
Change-Id: Ie63b12fb8fb78a2d68b8ed84c1ebe9d634e9804b
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-02-20 11:29:19 +01:00
Dunajski, Bartosz 5dae27877e Improve MockCommandQueueHw 
Change-Id: I6e33cd48590abd75e768a77a1811f2b374e22bca
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-02-20 10:21:20 +01:00
Artur Harasimiuk 86b4892388 don't use sanitizer when building ocloc 
Change-Id: I910802b95e338414300f1b307444331801f3c87a
Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com>
 2019-02-20 09:28:54 +01:00
Cetnerowski, Adam 22ec1d1b22 ULT renaming: SVM unmap tests 
Change-Id: Ibd742ef39bc41d21e3306864ebab06a7fcf6857a
 2019-02-20 09:27:42 +01:00
Daria Hinz 82613a0750 Return buffer compressed when render buffer compressed is enable 
Change-Id: I62fde1573849139ca16ff9d7e5d5672eab7ccd2b
 2019-02-19 15:02:48 +01:00
Maciej Dziuban 802eb37394 Revert "Pass HardwareInfo to AubHelper::checkPTEAddress()" 
Delete AubHelper::checkPTEAddress()

This reverts commit aa587b3bc5.

Change-Id: I32b90ce7dddfd2347586b2c47b9114b45cced8ab
 2019-02-19 11:51:35 +01:00
Dunajski, Bartosz 64fbfb21bf Improve iterating over existing CommandStreamReceivers 
Change-Id: I12a10852d43c625ec5521ae91918fcb12e1a6aec
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-02-19 11:48:56 +01:00
Zdunowski, Piotr d99e833786 Program L3 error detection behavior. 
Change-Id: Ifeccb707376f5b267de58ffd6ad009cf000c5047
 2019-02-19 11:23:07 +01:00
Jablonski, Mateusz ed6381a66a Use HEAP_STANDARD64Kb when cpu access is required 
Change-Id: I3a451b618f1b72836cd640ed510e874cf2d60624
Signed-off-by: Jablonski, Mateusz <mateusz.jablonski@intel.com>
 2019-02-19 10:36:15 +01:00
Maciej Dziuban aa587b3bc5 Pass HardwareInfo to AubHelper::checkPTEAddress() 
Change-Id: Ie5370b52eb79a8d118bd8033a335dc1319e93be1
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2019-02-19 08:37:58 +01:00
Cetnerowski, Adam 975a5f4119 ULT renaming: SVM migrate mem tests 
Change-Id: I14faeeb4f455a180168f7038553ab374f849a2d4
 2019-02-18 16:07:05 +01:00
Jablonski, Mateusz 05d02a6fe7 Change DevicesBitfield type to struct 
Change-Id: I7a005b07737cdd21efc174a2ee2be0f6b7f9068d
Signed-off-by: Jablonski, Mateusz <mateusz.jablonski@intel.com>
 2019-02-18 13:57:50 +01:00
Dunajski, Bartosz ba681035f8 Add new CSR to ExecutionEnvironment 
Change-Id: I5d6b58b5c185bf283ae529ebb21a4cbc8e9f198c
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-02-18 11:39:09 +01:00
Hoppe, Mateusz 7f98db617c Move expectMemory/writeMemory methods to CSRSimulatedCommon 
- fix aub tests with --tbx option

Change-Id: I227449dd8614a8aada3eaa4f28ff6dcca7530956
 2019-02-18 10:01:32 +01:00
Jobczyk, Lukasz 2bcecf3e62 Align command buffers to 64KB 
Change-Id: Id1fbd7c6f1aee48c4b69ec305d5332cb0aa86507
Signed-off-by: Jobczyk, Lukasz <lukasz.jobczyk@intel.com>
 2019-02-18 09:58:45 +01:00
Dunajski, Bartosz af2dc200c5 Improve creating HwContextController 
Change-Id: If81ec18793a5af7fb58d66bb26a3bc476eaf94e0
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-02-18 08:57:35 +01:00
Piotr Fusik 9af011809f Make HeapIndex and GraphicsAllocation::origin not specific to Windows. 
Change-Id: Ie5a26b45c0b5eff0daf047361d8c992bd3c65ba7
 2019-02-18 08:47:49 +01:00
dongwonk fb993d6107 limited range and internal 32bit allocators with correct base and size 
correct add 1 to the current size, gpuRange as gpuRange
only specifies the end address of the pool, not the actual
size, which causes alignment issue of all the offsets of
allocated objects. Also, a page was added in the beginning
of the limited range memory pool to avoid the base address
of it to be 0x0 that is interpreted as invalid address by
heap allocator (This makes the size reduced by pageSize)

Internal 32bit allocator is also initialized in proper way
with corrected base address.

v2: added 'givenMemoryManagerLimimedRangeAllocator' unit
    test
v3: adjust size to be freed when DrmMemoryManager instance
    is destroyed to 4GB
v4: - defined external 32bit allocator for limited Range
    allocation case.
    - softpinning object on the correct GPU address

Change-Id: Idaa0206d4133a1476cceb5a48ff8c8528742c76a
Signed-off-by: dongwonk <dongwon.kim@intel.com>
 2019-02-17 19:19:52 +01:00
Pawel Wilma 8272b3f3de Add missing numGrfRequired in blocked kernel DispatchFlags 
Change-Id: Ic1ddd532d8420c9a797a561cc5cb8ee74831eeaa
 2019-02-16 11:37:48 +01:00
dongwonk c2f5fccfd0 DrmAllocation with correct pair of cpu address and gpu address 
correct mapping of cpu and gpu address in memory allocation
in case of NonSVM. Also, used only aligned address since offset
is already calculated and written to "allocationOffset".
gpuBaseAddress is programmed with 0 instead of base address of
heap because it represents GPU's address space.

v2: add allocationOffset to the aligned address in allocation
    data to point to exact starting address of buffer in two
    NonSVM allocation unit tests

Change-Id: I32ef512de64a13459b7c132672f837c5cb210ada
Signed-off-by: dongwonk <dongwon.kim@intel.com>
 2019-02-15 19:03:26 +01:00
dongwonk 0240f239ad check if the whole object region is in 32Bit address space boundary 
checks the address + size of buffer object to determine
whether the object is located within 32bit address space
boundary.

v2: changed end year to 2019 in ther license term
v3: added unit test for checking of flag when size of
    bo is given.
v4: two different unit tests are created to cover two
    different case separately

Change-Id: Ie2df6025fc116aca679dcfe88d858ff240278c39
Signed-off-by: dongwonk <dongwon.kim@intel.com>
 2019-02-15 16:15:06 +01:00
Cetnerowski, Adam 856e0cc476 ULT renaming: SVM memcopy tests 
Change-Id: Icf1015f73c47fc951b089a374225808a6e7156f1
 2019-02-15 14:19:31 +01:00
Zdanowicz, Zbigniew 51d34da7ec Add multiEngineQueue field to DispatchFlags and modify interfaces 
Change-Id: Iaa4754a22e9b88201aed7df01c7d6e5fd06c84a9
 2019-02-14 17:12:15 +01:00
Maciej Dziuban 12245bc88d Pass hwInfo to AubHelper::getMemBankSize() 
Change-Id: If77775cb5fb10dc82e0c7bef06a71e4292ceb6f9
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2019-02-14 16:52:10 +01:00
Dunajski, Bartosz 958d931cd9 Allow to create HardwareContextController for multiple Devices 
Change-Id: Ib066c937809536196182ca87359c487570cc2e89
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-02-14 16:00:00 +01:00
Zdanowicz, Zbigniew 8e1e874a76 Refactor headers and reorder include order 
Change-Id: I6b341e2b37e569af7d741bfd7a63804c0b25a4c9
 2019-02-14 13:39:01 +01:00
Kamil Diedrich 76276d4c23 Add unit test for events 
Change-Id: I13d74626a244d234a5bbaff369ed09fb59d6e33f
 2019-02-14 12:42:44 +01:00
Jobczyk, Lukasz e8e3de6f07 Get devices test refactor 
Change-Id: I5f4b418fb147eada2e83a188f3717ad30613f38d
Signed-off-by: Jobczyk, Lukasz <lukasz.jobczyk@intel.com>
 2019-02-14 07:50:02 +01:00
Jablonski, Mateusz e74b31691c Remove redundant parameter of createWddmAllocation method 
Change-Id: I1c1014eacbdee4ab6b83ea7d7b5257f25f2b46dd
Signed-off-by: Jablonski, Mateusz <mateusz.jablonski@intel.com>
 2019-02-14 07:33:45 +01:00
Jobczyk, Lukasz b44c60ddc0 Use GPU addresses when setting up scheduler kernel's SVM args 
Change-Id: Ia2d67d031ffce2413dd8c73d87c9d3d8f3d71ede
Signed-off-by: Jobczyk, Lukasz <lukasz.jobczyk@intel.com>
 2019-02-14 07:21:31 +01:00
Hoppe, Mateusz 0f36265f55 Pass CsrType to initAubCenter 
- create AubManager with correct mode

Change-Id: I89c9c3c7edf553854b8b82788cec3dec53a62d79
 2019-02-13 09:48:05 +01:00
Jablonski, Mateusz db8c2bc57e Unify write memory in simulated csr when aub manager is available 
Change-Id: I28d0496b1b1fb973af4869e5626082142b5818dd
Signed-off-by: Jablonski, Mateusz <mateusz.jablonski@intel.com>
 2019-02-12 14:43:26 +01:00
Milczarek, Slawomir e318156d9d Create AubManager with product family in parameter 
Change-Id: I3d5a2b04278d3dcec75eb2a787ec98d1ca2304ea
 2019-02-12 14:01:23 +01:00
Piotr Fusik f014f27370 Support the EnableLocalMemory debug variable in CSR. 
Change-Id: I902b06ab0b4a3df477d12804ba74b2727d8863f6
 2019-02-12 13:09:23 +01:00
Cetnerowski, Adam 1074065850 ULT renaming: SVM memory fill tests 
Change-Id: Ie69a2f916febdc094fbb1491e8cd54cbe433eea3
 2019-02-12 12:43:55 +01:00
Dunajski, Bartosz b5050db158 Remove AUBDumpConcurrentCS 
Change-Id: Ib5f2b73f918db778609922eb10710700589b21ad
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-02-12 12:36:07 +01:00
Mrozek, Michal 0e7fd2ffed Add multiEngine field to command queue with debug variable to override it. 
Change-Id: I3c1e424a7ad545e166e178d1726595e6d9502ca7
 2019-02-12 12:22:24 +01:00
Jablonski, Mateusz fbb84476ef ULT CMake: fix usage of ir_extension 
Change-Id: I1fc52811cbcd8a4877e9c995a5a4c945796b6c79
Signed-off-by: Jablonski, Mateusz <mateusz.jablonski@intel.com>
 2019-02-12 11:53:26 +01:00
Dunajski, Bartosz 22fc95fb20 Set GraphicsAllocation to AubWritable in Aub test 
Change-Id: I857667214896b0b8281aa9f2bd477231ab1c059f
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-02-12 11:42:14 +01:00
Kamil Diedrich a7b46ccdbd Add RAII for cl_objects 
- add removeVirtualEvent to cmdQueue fixture
- add const keyword in event functions

Change-Id: I11354eb8fceb15ae2c58bddd327863a15aab6393
 2019-02-12 11:19:35 +01:00
Dunajski, Bartosz 9f6eab0689 Change allocation properties for TIMESTAMP_PACKET_TAG_BUFFER type 
Change-Id: Ied1c0d4d7ecd27104421a5cde6c79c04c4222265
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-02-12 10:30:34 +01:00
Filip Hazubski a8d4733802 Replace MemObj::flags with MemoryProperties 
Change-Id: I886cd775d1eca55964b7c4b05f6c977558a73922
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2019-02-12 10:16:09 +01:00
Mrozek, Michal 2cb3181359 Remove OCLRT name space from helpers. 
Change-Id: Ia33aa7ce93a8f3ee8b2b5609de9ac3e32e206ca1
 2019-02-12 09:55:30 +01:00
Piotr Fusik 6882cf09c1 Avoid manual memory management. 
Change-Id: Id29d9ec366e338d519aad5353a15a44ecf5998e4
 2019-02-12 09:14:51 +01:00
Venevtsev, Igor 5e8fb19e5d Remove OCL Events concept from EnqueueOperation and dispatchWalker 
Change-Id: Iec55b0be673a2a40b9621212add224a33d4abc5d
 2019-02-12 08:46:18 +01:00
Jobczyk, Lukasz e191c5876e Adding buffer tests that check an L3 setting 
Change-Id: Ib7759fc7430c931f6f24337d852a8644abbb199e
Signed-off-by: Jobczyk, Lukasz <lukasz.jobczyk@intel.com>
 2019-02-11 16:39:33 +01:00
Kamil Diedrich 89410a6733 Add DCFlush before resolving 
Change-Id: Id5f82edc4631aa16baa55b26b8bde69f4a30572c
 2019-02-11 16:33:34 +01:00
Maciej Plewka 5abda619a1 Set pitch and qPitch for unified multisample images 
Change-Id: I4eaf8678077f7ecd7f5f9ec860a3e59b7e89e78c
 2019-02-11 15:52:18 +01:00
Dunajski, Bartosz 12da1b0616 Remove osContextCount parameter from GraphicsAllocation 
Change-Id: I23b650e97f107008b1122a1ecea48722fe129863
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-02-11 15:44:37 +01:00
Dunajski, Bartosz dc181defba Use GpuAddress for TimestampPacket programming 
Change-Id: I1303605c33e2e0267a1716e12a0bfcb341fcfbd7
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-02-11 15:31:17 +01:00
Dunajski, Bartosz 75fe358e5d Add HardwareContextController to use multiple Contexts in single AubCsr 
Change-Id: Ica0f1c8c4e0f55310f4650788e468640406abf51
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-02-11 15:22:50 +01:00
Jablonski, Mateusz 356259b865 Use .spv as IR extension on Linux 
Change-Id: If88dc0a698b02036b48e161fe82c0f594447adb6
Signed-off-by: Jablonski, Mateusz <mateusz.jablonski@intel.com>
 2019-02-11 07:51:33 +01:00
Chodor, Jaroslaw 43856e88b5 Refactor around cache flush and command queue 
Change-Id: I277e27cbc60fbbb015c0024f171697408879ec0b
 2019-02-10 17:59:33 +01:00
Cetnerowski, Adam 3bdfe2ebb7 ULT renaming: SVM mapping tests 
Change-Id: I34f77f4c243abee2400a5fc3a8fe5faf1a0d92d4
 2019-02-08 15:32:52 +01:00
Venevtsev, Igor 66e3f3c16c Remove OCL Events concept from command stream receiver 
Change-Id: I4d5a97b41efe601c92c2f3f33e9e24bb7d4fa3d2
 2019-02-08 15:02:40 +01:00
Koska, Andrzej e8771e8c2a Preparing the correct signature of WaitForSynchronizationObject 
Change-Id: I3689791ab0335009d79a3484379945f8741ba32b
 2019-02-08 14:38:31 +01:00
Hoppe, Mateusz cb37f2a779 Add /we4189 switch to CMAKE_CXX_FLAGS for MSVC. 
- treat unused local variables warnings as error in Debug

Change-Id: I2da08b72e0f0083d3cdf932fbf92ef4981a88615
 2019-02-08 12:06:04 +01:00
Chodor, Jaroslaw 6e0d04e25a Adding debug flag to disable DC flush in epilogue 
Change-Id: I1784be279ee9f837a0994997bec49c1925a68390
 2019-02-08 11:04:25 +01:00
Pawel Wilma 947794f166 Fix for setting context flags in AubDump 
Change-Id: Ia5fba17aac19fbcbfa6676557d1af0889f538b90
 2019-02-07 16:28:53 +01:00
Hoppe, Mateusz 9ba8f18196 Remove expectations on genIsa for kernels compiled with debug flag 
Change-Id: Id47f7bd9f611b1ed167d7053a5ac61589f44edd8
 2019-02-07 16:03:43 +01:00
Hoppe, Mateusz 4d9acf3352 Pass aubfile name to TbxCommandStreamReceiver::create and CSRWithAubDump 
Change-Id: Ib10c017ce4ed2a572815053dae3f517e0dfd9eb3
 2019-02-07 15:05:54 +01:00
Cetnerowski, Adam d1998e6dce ULT renaming: SVM free tests 
Change-Id: Ie385cf80866706d719a20235f38197c81df30f63
 2019-02-07 13:36:04 +01:00
Maciej Dziuban 0ec6ef1533 Move AubHelper tests to inl file 
Change-Id: I2a535b2ff46be6f9a695dde934b981d58267b2d1
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2019-02-07 10:23:24 +01:00
Zdanowicz, Zbigniew 44491a111c Use MemoryManager retrieved from ExecutionEnvironment in Kernel dtor 
Change-Id: I5f3880e1a95b3cbd262847d97776b0b92a580181
 2019-02-06 17:08:51 +01:00
Kamil Diedrich 62e56d2398 Disable L3cache when resolve argument 
Change-Id: I4bb3a18d67254eef8aa4a0ce6b29401726f0b47e
 2019-02-06 15:51:31 +01:00
Cetnerowski, Adam 43a66ad976 ULT renaming: Read image tests 
Change-Id: I2da8976c37fc01539080413498ce7f0435e5dceb
 2019-02-06 12:10:59 +01:00
Chodor, Jaroslaw 048098ce66 Refactor around cache flush after walker 
Change-Id: If5c7399df91bd076b684bcab83f50b4852e53429
 2019-02-06 11:12:55 +01:00
Jablonski, Mateusz 3a9531201a Add missing tests for internal heap index 
Change-Id: If3705ef86c54504c930888829f6e38f88cdbd1ef
Signed-off-by: Jablonski, Mateusz <mateusz.jablonski@intel.com>
 2019-02-06 08:33:08 +01:00
Jablonski, Mateusz e095ac834d Windows: use HEAP_INTERNAL in 32bit scenarios 
Change-Id: I652727303eec45cd3547bd98bec42f276000d9b4
Signed-off-by: Jablonski, Mateusz <mateusz.jablonski@intel.com>
 2019-02-05 19:04:06 +01:00
Hoppe, Mateusz 4943c102cd Add streamMode parameter passed to AubManager 
Change-Id: If074579fdf17c7709c33d08ccdfbf9dc80e3adc8
 2019-02-05 18:31:16 +01:00
Cetnerowski, Adam c9f75d3f71 ULT renaming: Read buffer tests 
Change-Id: I41b9d97bf3913236121c4e0c0705c465a59f65eb
 2019-02-05 15:31:32 +01:00
Maciej Dziuban ea8aa29e12 Change pollForCompletion() insertion locations 
Poll is done on:
- Aub CSR destruction
- expectMemory
- blocking calls

Poll is not done on flush

Change-Id: I1a776a932cb608c01f0de249e7cef26b00147f31
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2019-02-05 14:33:42 +01:00
Kamil Diedrich e1eab521e7 use release for cl-objects instead of delete 
- fix for data race in events
- modification of the addition child event

Change-Id: I6ea3a413f13f13a91d37d20d8b9fad37d0ffafb9
 2019-02-05 14:09:32 +01:00
Cetnerowski, Adam 3820a5e8e5 ULT renaming: Read Buffer Rect tests 
Change-Id: I143e3a00b96e01c3f094af3c34dcd1efb5c00d95
 2019-02-05 12:57:07 +01:00
Maciej Plewka d58b9840b8 Fix surfaceState for multisample images 
Change-Id: I2d4b17e162f61892ca1a86c241a722ef0c51ee42
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
 2019-02-05 12:44:57 +01:00
Mrozek, Michal fe85c1d974 Do not allocate Linear Stream in system memory. 
Change-Id: I2d9abaab3358907037265214cec80cc84d6b9c0a
 2019-02-05 12:07:09 +01:00
Mateusz Jablonski 16c3117b09 Fix test for internal heap base address of wddm memory manager 
Change-Id: Ia6879ad9637ad38b3d641b0b4522dd1e85b0fb50
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2019-02-04 19:05:20 +01:00
Hoppe, Mateusz 3c47c418a9 Refactor HardwareParse::getSurfaceState() to return CPU memory 
- if SSH indirectHeap is passed, use CPU address instead of GPU
address programed in SBA command

Change-Id: Id2c8973db0dfe2d9562ee835a27c4d3c28ea3351
 2019-02-04 17:49:00 +01:00
Hoppe, Mateusz 509ed273c4 Refactor Ults finding hardware commands 
- use CPU address for found dynamicStateHeap address in
StateBaseAddress command

Change-Id: I2d857c5a069f5a8f46169d2047cdb27efd3502b8
 2019-02-04 17:26:37 +01:00
Zdanowicz, Zbigniew eaa241fd6a Update HW commands programming of MOCS setting 
Change-Id: Ib54a2c8d5024e39251bec35ee443ea8a507d2d3f
 2019-02-02 19:45:31 +01:00
Mateusz Jablonski fff8be32f4 Dont force system memory for internal allocations 
use HEAP_INTERNAL_DEVICE_MEMORY for internal allocations

Change-Id: Id70caa30cd1e9c79df60773227d72b09541e4b77
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2019-02-01 16:31:34 +01:00
Mateusz Jablonski ce4a75e121 Require same allocation type when obtaining reusable allocation 
Change-Id: I829301b83a6214bcfb4fc9f2692f21ae9a002456
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2019-02-01 16:10:28 +01:00
Koska, Andrzej 395d053f02 Limiting the value of LWS to the value of GWS 
Change-Id: I24e89125e586ed77d396ba9e40dd039f1ab213fe
 2019-02-01 12:49:54 +01:00
Filip Hazubski d30cc221df Update disabling caching for a resource 
Change-Id: I00eac0add01f75a1b82d04cf42652c15b776a457
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2019-02-01 10:50:21 +01:00
Dunajski, Bartosz 32ecd91401 Add parameters to HardwareContext read call 
Change-Id: Iba70d4b90d76199df6f0bf90c95adb7dc059c715
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-02-01 10:22:15 +01:00
Hoppe, Mateusz 758d91f406 Set TbxServerIp and TbxServerPort from DebugVariables 
Change-Id: Ib9ba3efb3a196c1bdf5f4345b36fe35da159c29c
 2019-02-01 09:07:47 +01:00
Chodor, Jaroslaw 7d04159f76 Refactor around cache flush 
Change-Id: Iff32af0111375f4ffc804c82e6d753d57fe94e80
 2019-01-31 22:19:06 +01:00
Milczarek, Slawomir 6ef2822643 TBX CSR to call writeMemory on aubManager 
Change-Id: Ie10a30944e0c3a8e136816fa91ff501887a3d0d2
 2019-01-31 16:18:57 +01:00
Jobczyk, Lukasz fb0424bc5a Distinction between calcProfilingData functions 
Change-Id: I6f9e646d2442870e9c0345996970409b953b4d42
Signed-off-by: Jobczyk, Lukasz <lukasz.jobczyk@intel.com>
 2019-01-31 15:19:17 +01:00
Jobczyk, Lukasz c1cb1f9be6 Add profiling calculation from timestamp packets 
Change-Id: Ie7f8c703ca5ea5eb1f5207871ef94cbc7ece18b7
Signed-off-by: Jobczyk, Lukasz <lukasz.jobczyk@intel.com>
 2019-01-31 13:32:52 +01:00
Filip Hazubski 3fe78d263b Update getGraphicsAllocationType 
Change-Id: I7613d0d5550d8032b960f86aa117b4baf6b9216f
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2019-01-31 11:02:35 +01:00
Dunajski, Bartosz 783f408f9f Dont pass EngineType or Index as parameter in Aub/Tbx CSR 
Change-Id: I4583a09a9fa5dd5b0508132c86156c91aaf24c28
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-01-31 10:30:05 +01:00
Chodor, Jaroslaw 9a98f19a2f Adding ULT mechanism for cmdBuff validation 
Change-Id: I35f06695e27b9eb052e2aaa717862ae01db9a0ba
 2019-01-30 18:58:53 +01:00
Mateusz Jablonski c04ba163a0 Simplify selecting heap in Wddm::mapGpuVirtualAddressImpl method 
Change-Id: Id6eb5b0df1c705b5fadde62d20513fe15edf1e27
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2019-01-30 16:38:46 +01:00
Filip Hazubski 2e5e785092 Rename wrapReleasableObjectWithUniquePtr to clUniquePtr 
Change-Id: I67a3ff2d30d8f8485394bd2744de0924205f092e
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2019-01-30 14:51:47 +01:00
Cetnerowski, Adam 2c61952f26 ULT renaming: kernel tests 
Change-Id: I4e61f70f0d50ab2c39cd4dd20c347a2285edf68c
 2019-01-30 12:23:48 +01:00
Mateusz Jablonski f157943610 Allocate internal allocations through preferred pool 
Change-Id: Ib17431ceefc1eb72f86625e0998f679baaa7cb0d
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2019-01-30 11:18:15 +01:00
Venevtsev, Igor 303014582a Extend semaphore synchronization for different command stream receivers. 
Change-Id: Ic904b8c1e052adbb7b2ef82a6dec74ec69837f9f
 2019-01-30 09:33:41 +01:00
Chodor, Jaroslaw 311de0c644 Adding support for excluding tests per platform 
Change-Id: I5c41cadd0f44d05640593673f1c00da84d428711
 2019-01-30 01:37:10 +01:00
Cetnerowski, Adam 95df25af23 ULT renaming: Migrating Mem Objects tests 
Change-Id: I0bc55d658b793decbb1fd1654446a5bedbe274e8
 2019-01-29 15:48:44 +01:00
Mrozek, Michal 3e75c837f9 Disable test. 
Change-Id: Iadbdac5ec973e320a4e7dbafa7ed513067ada5b2
 2019-01-29 14:20:00 +01:00
Mateusz Jablonski 8056d7c5f0 Cleanup headers included in wddm.h 
Change-Id: Ibb9b84b8f1ea2c69ddd134451b06f0e505c841b4
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2019-01-29 12:43:29 +01:00
Filip Hazubski 54d96e3e3d Add isFieldValid helper method 
Change-Id: I6f8d67a99fa8ca41f61a7f966312cbe43f5ea719
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2019-01-29 09:58:46 +01:00
Chodor, Jaroslaw 22448ee265 Adding ffs and 64-bit prev/next pow2 
Change-Id: Ie10731c16b65a4fd1f36fd4c9bbca9a6951583a1
 2019-01-28 23:56:46 +01:00
Milczarek, Slawomir b11e0825c9 AUB capture with support for allocation dumps 
Change-Id: I90a2b75043c33af92e4557be37cde4b9699582c6
 2019-01-28 21:20:08 +01:00
Chodor, Jaroslaw 7c390fa23b New helpers is utilities_containers 
Change-Id: Ibb653c89a556c3bb32ce891e786719f70b56431f
 2019-01-28 17:36:18 +01:00
Cetnerowski, Adam 08f80d13c9 ULT renaming: Enqueue marker tests 
Change-Id: I0615849555d9511ca791b12cc3c91adeb76dde34
 2019-01-28 17:16:33 +01:00
Dunajski, Bartosz c878590162 Remove EngineInstance parameter from pollForCompletion call 
Change-Id: I07652db2de656032cdb3452239b671edbe876b75
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-01-28 16:49:25 +01:00
Hoppe, Mateusz c870628d08 Rename SHARED_RESOURCE allocation type to SHARED_RESOURCE_COPY 
Change-Id: Ie846450384730171304788bbb1709d7f088036a8
 2019-01-28 16:20:35 +01:00
Pawel Wilma d56daf1726 Pass devicesBitField to gmm 
Change-Id: Icad8a95d37d487fb7d01410c606baad67f681651
 2019-01-28 14:51:09 +01:00
Dunajski, Bartosz 0655045c79 Enable SNORM format in aubs 
Change-Id: If57781dd83668e3e3eaed2867e8000078b2691be
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-01-28 14:09:30 +01:00
Zdunowski, Piotr ecb204f347 [2/n] Log allocation placement. 
Change-Id: I1a523b7b7ed8a3fb199e4a216b5c1dc97b83cd44
 2019-01-28 12:45:22 +01:00
Mrozek, Michal f6ceb8fb4f Remove default parameters from setArgSvm function. 
Change-Id: I4408ddedfca464d56e24c4daa0c8c7b73791d6a0
 2019-01-28 12:02:54 +01:00
Mrozek, Michal c0d4122c26 Ensure that temporary buffer has zero copy flag set. 
Change-Id: Iefa6f281cc61237be21aeff7c26d080c32385a75
 2019-01-28 11:00:00 +01:00
Hoppe, Mateusz 3a5209ccf4 Disable osEnableLocalMemory on 32 bits 
Change-Id: Id405a57064d17293ede48f82992ab1bde4f3b9ce
 2019-01-28 08:18:51 +01:00
Chodor, Jaroslaw 9d8f280d5c Removing address space qualifiers from literals 
Change-Id: Iffdc5a8d98f37a3df930d67c39f771c89b24f47c
 2019-01-25 17:25:05 +01:00
Mateusz Jablonski b94917659a Use mem obj offset when returning cpu ptr for read write 
Change-Id: Ia624559f94e6af0ed602687814e3c11f6693f8a6
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2019-01-25 14:52:15 +01:00
Mateusz Jablonski 128bf4552f Remove debug flag ForceResourceLockOnTransferCalls 
Unlock locked resoures in freeGraphicsMemory method

Change-Id: I2baae7b7f9d8260f19a4b083849c5bf0d1a764f3
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2019-01-25 14:03:29 +01:00
Mrozek, Michal 083a4ff779 Always enable L3 cache for non zero copy buffers. 
Change-Id: Ie83a2b6b040bd0bab2cfd5dbb0e788af881f966f
 2019-01-25 12:20:44 +01:00
Hoppe, Mateusz d7ce6ef8d1 Allocate images through preferred pool call 
Change-Id: I79c9c1a0a95a8a3e26ed690530b71ef504cc7ff8
 2019-01-25 09:05:25 +01:00
Mateusz Jablonski f90cfb9199 Fix typo: freeGpuVirtualAddres -> freeGpuVirtualAddress 
Change-Id: I6cbec2bd4ec5863e2c5df75aa60b3a7a0dbb94c6
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2019-01-24 16:08:00 +00:00
Mateusz Jablonski f332bf369e Set allocation's lock state only in lockResource and unlockResource methods 
Change-Id: I60f35801287166f5bdb0dfcd31ff0118c56ec22a
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2019-01-24 15:15:27 +01:00
Pawel Wilma 09c62ca44c Possibility to apply additional build options 
Change-Id: Ic654f57b462e32f464db9df94aed1061bc5a7bac
 2019-01-24 11:39:00 +01:00
Mrozek, Michal de022cc0eb Revert "Do not use AUB + TBX in TBX test mode." 
This reverts commit 5a1f8078cbacb7f5204886c673b8c15bd8fd8ae3.

Change-Id: I1c6feb457afdd3e3ccbbdd00d41856d8fea0a099
 2019-01-24 10:19:58 +01:00
Dunajski, Bartosz 276417969b Add ftrTileY flags on Linux 
Change-Id: Iec00c137e332ac818ba6958e57c90dccf7629931
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-01-24 08:54:59 +01:00
Mrozek, Michal 8615288d2b Do not use AUB + TBX in TBX test mode. 
Change-Id: Ia53045076f72cc162c43fa06db9117c9e8d4f1e2
 2019-01-24 08:53:54 +01:00
Mateusz Jablonski b229df3cc4 Remove debug flag EnableMakeResidentOnMapGpuVa 
Change-Id: I12063762818ed58861ec80f0d8a798312374d198
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2019-01-23 14:43:40 +01:00
Milczarek, Slawomir b2fe74ca9d AUB capture with writeMemory on aubManager 
Change-Id: Ie954b0d0f72b093f12ef33c93af5a3dc845559dc
 2019-01-23 13:54:28 +01:00
Dunajski, Bartosz 996d4f8387 Update GMM API to query TileMode for SurfaceState programming 
Change-Id: I7cef2d8651037874811f8e3fefabc70470eec5bb
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-01-23 08:35:15 +01:00
Milczarek, Slawomir 21f855b719 AubStream update (1/n) 
Change-Id: I6579e7af2015493490c5edcc413dcb2e6c804b9f
 2019-01-22 12:19:21 +01:00
Piotr Fusik 40870f9c7d Retry mmap with a smaller size. 
Change-Id: If8ea046af789394c1f58be9cc3a2b8100cee214a
 2019-01-22 11:04:16 +01:00
Mateusz Jablonski ad3bfd84cb Add functionality to make resident before locking resource 
Change-Id: I0963c1edcb43f409e9dd62cb46a0da1f2b05667b
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2019-01-22 08:28:12 +01:00
Katarzyna Cencelewska 72f17d6435 Add check that Intel OpenGl is used 
before return device_id in clGetGlContextInfoKHR
Change-Id: Ic6dce407a1666909d468d89a8576c907abc63b61
 2019-01-22 08:10:46 +01:00
Chodor, Jaroslaw e663d51481 Adding support for debug variables translation 
Additionally, adding flag to override gdi

Change-Id: I52759aa8c5f1149a34167429289d3f3876cdcb92
 2019-01-19 20:12:41 +01:00
Filip Hazubski fae6c5fce2 Add bit helpers 
Change-Id: I3f29793f0fec7555c1440db7504e4adbb6904d4f
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2019-01-18 12:19:27 +01:00
Zdanowicz, Zbigniew 158f200476 Add HW commands const definitions 
Change-Id: If2e9d7f7f707b7b8c7bd8dbd3853ab3b6dad0c9a
 2019-01-18 12:13:25 +01:00
Dunajski, Bartosz 0c2f5aa491 Change width programming for GMM 
Change-Id: If2a1a0d582cbebb209de182895d1f6decedcfb73
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-01-18 09:53:27 +01:00
Kamil Diedrich e2092d29ff Fix for receiving appropriate tokens during builtin compilation 
Change-Id: I5f73bd95bbbd0e2b59dcc85beebd3d1ee205782a
 2019-01-17 14:31:29 +01:00
Filip Hazubski 2d321cb557 Add option to disable caching for a resource 
Introduce CL_MEM_LOCALLY_UNCACHED_RESOURCE flag that can be used with
clCreateBufferWithPropertiesINTEL()

Change-Id: I9f208f00952cdca7482371ec21cbc57c08435b52
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2019-01-17 13:32:36 +01:00
Wilma, Pawel 3a11da8ec8 Reduce max planar YUV height to 16352 rows 
The UV plane placement granularity has been changed to full tile (32 rows).
Because UV plane offset size in Surface State is 14 bits, the maximal height
has to be reduced from 16380 to 16352 to allow maximal offset to fit into
14 bits.

Change-Id: I2b21719d8d63a7f075150eef492ee44bd4dfe294
Signed-off-by: Wilma, Pawel <pawel.wilma@intel.com>
 2019-01-17 13:02:46 +01:00
hjnapiat e22626cb3d Enhance AUB testing 
Change-Id: I45dafca34064ff824c197658051d8ba5c89265f6
 2019-01-17 12:36:51 +01:00
Pawel Wilma dcbdbd92b9 Wait for paging frence after calling makeResident() on mapGpuVa 
Change-Id: I289c4be891b2d7c1b50a0100cbdde8688f3068d5
Signed-off-by: Pawel Wilma <pawel.wilma@intel.com>
 2019-01-17 10:41:28 +01:00
Zdunowski, Piotr 75a635fdc5 [1/n] Log allocation placement. 
Change-Id: I9ab61e10dcb0fcbbaf859c077a64ce7a4f2c213c
 2019-01-16 16:46:50 +01:00
Cetnerowski, Adam e987d41dd6 ULT renaming: image mapping tests 
Change-Id: I97da602831e62b0440d6d7bb0896dd1b11341a4f
 2019-01-16 14:05:33 +01:00
Cetnerowski, Adam 94204518ff ULT renaming: Buffer mapping 
Change-Id: Iffdd695b4e73c2ed6483912de83a49d1cc7ecee2
 2019-01-16 12:43:46 +01:00
Pawel Wilma 9036882d11 Refactoring of additional MMIO registers in AubDump 
Change-Id: I97c0cc25aa24c6abcff4ba7469d6a6e3f0c12b86
 2019-01-16 11:16:54 +01:00
Dunajski, Bartosz 1de0bda212 Initialize HardwareContext with valid deviceIndex and engineIndex 
Change-Id: I8848936340e8f4b33ac5ed5d0ae85d9f580171ca
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-01-15 15:33:42 +01:00
Mrozek, Michal 7470246376 Add new flag to dispatch info. 
Change-Id: I0d78658529f3e80f1694b14ff05425ecceafd340
 2019-01-15 12:21:18 +01:00
Mateusz Jablonski 06600f169b Define GPGPU engines per gen 
Change-Id: Ie0e565d11184c5355b5bf09f5b10a567deb5c106
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2019-01-15 12:05:19 +01:00
Stefanowski, Adam 1001f76085 Add logic for Events in multi-thread scenario 
- inc refCount when enqueue is blocked and dec after flushing

Change-Id: I9e8f8d226897124a7e51f2473939d53868bef7a2
 2019-01-14 19:45:26 +01:00
Mrozek, Michal 9cbfa3892d Remove debug flag. 
Change-Id: I013e1f27477d67fd33ba6c559dffb26d06a0db8b
 2019-01-14 15:19:57 +01:00
Filip Hazubski ec03210687 Update clEnqueueVerifyMemory 
- return success also for non aub CSRs

Change-Id: Iac7fdcd58e4b76a325ef67fd266f183d779ca956
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2019-01-14 14:37:09 +01:00
Cetnerowski, Adam 736c3ac3bd ULT renaming: Fill image / buffer tests 
Change-Id: Ib3a5be18b210e5bc2a35eb9700557aa698ea456a
 2019-01-14 14:26:57 +01:00
Mrozek, Michal 6c902faf0b Cleanup around Walker programming. 
- remove redundant methods.
- remove redundant parameters.
- Simplify the logic of programWalker

Change-Id: I6112bb19fd0008530f5e5510238bf42e669379b7
 2019-01-14 10:12:38 +01:00
Dunajski, Bartosz 8ae7de7b0e Create HardwareContext only when osContext is available 
Change-Id: I8bcf2cb20f0e1e6b9da98b477f5be206407a7a57
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-01-13 15:12:07 +01:00
Hoppe, Mateusz 10013d66dd Fix EnqueueBufferWindowsTest test 
- expect correct gpu va

Change-Id: Ib66b765d49179db975b03c167590c3bad4726ad1
 2019-01-11 23:11:54 +01:00
Pawel Wilma 14e8fdd8f8 Fix for incorrect timestamp offset calculation in event profiling info 
Change-Id: I634c29daf4734b24e4075542dc6550c531977f0a
Signed-off-by: Pawel Wilma <pawel.wilma@intel.com>
 2019-01-11 16:39:05 +01:00
Dunajski, Bartosz 23b7b9a8a8 Make local copy of EventsWaitlist for CommandComputeKernel 
Change-Id: Ibbdfc6732fc254e73407605ebb26f88e5552c0e8
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-01-11 15:05:42 +01:00
Mrozek, Michal 68d273580f Disable sporadic test. 
Change-Id: I3eb2848401190c52c9e150207fd904aadffbf270
 2019-01-11 14:14:09 +01:00
Piotr Fusik 30dd15144c Add debug variable to disable host ptr tracking. 
Change-Id: Ifc866e06a4519e7590d40d8ad136147ecc80225d
 2019-01-11 12:06:52 +01:00
Hoppe, Mateusz 64ff9d30b7 Fixes for misaligned hostPtr enqueueReadWrite 
- use getGpuAddress for BuiltinOpParams
- fix read/writeImage

Change-Id: I2e6e9a1d91871fa9f22851f31eb5a7b337b5aecc
 2019-01-11 09:14:47 +01:00
Kowalczuk, Jakub 3c59bae5a4 Set NoGfxMemory in Gmm Constructor 
Change-Id: Iee36e6de82db12c84970e68e1c940b67ec957eab
 2019-01-11 08:11:22 +01:00
Mrozek, Michal ef73bb8c11 Move Walker specific code to dedicated method. 
- move cache flushes after the Walker.

Change-Id: I58c5e76bad22ac42da2c466ef008ef5bf96df077
 2019-01-10 16:36:56 +01:00
Zdunowski, Piotr 010f1a8299 Source level debugger test improvements. 
Change-Id: I88c0c5d7f49b9e8c27ed2c75c6e2eb63b22437bf
 2019-01-10 13:16:54 +01:00
Cetnerowski, Adam d63a1a7c89 ULT renaming: Copy image to buffer tests 
Change-Id: Ibf8109e9819ebe36daf680f6a19d91e69fcef7ed
 2019-01-10 10:45:46 +01:00
Mrozek, Michal 537697dcfd Update interfaces. 
Change-Id: Ib038a98f51fdc8850ac5ee7d922c399535682081
 2019-01-10 08:56:35 +01:00
Hoppe, Mateusz 3381dc258b Fix for ReadWriteBufferRect with misaligned hostPtr 
Change-Id: I026f3512e6501b7e3a4cd5b9b6e9010a0b3b8a72
 2019-01-09 14:57:25 +01:00
Dunajski, Bartosz a9470b9f79 Dont restore overrideCommandStreamReceiverCreation at creation time 
Change-Id: I17039e501c0cdc84799ae16e7f82e8091cc6fb3a
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-01-09 09:25:01 +01:00
Dunajski, Bartosz c2ef7ef0ca Improve aub fixtures cmake 
Change-Id: Ia127f721c99d1df19c3714703bdc4f72c27ad055
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-01-09 09:18:49 +01:00
Hoppe, Mateusz cbc4d349a8 Do not align down pointer passed to hostPtr allocation 
- do not align up hostPtr allocation size
- align BaseAddress programmed in SurfaceState to DWORD

Change-Id: Ic6d02e53fd13dda881f8eb845a131bffe4deb45c
 2019-01-08 21:21:34 +01:00
Mrozek, Michal acc5e87b40 Change CL_MEM_USE_HOST_PTR buffer allocation scheme. 
- Choose BUFFER type if local memory is present.
- add CL_MEM_FORCE_SHARED_PHYSICAL_MEMORY_INTEL for allocations that
require host pointer storage.

Change-Id: Ifd3c74800cd53a2a9bb2171212a47ef5bcffe2a1
 2019-01-08 16:24:10 +01:00
Mateusz Jablonski b5d9ed77a6 Correct destruction logic of shared allocations 
wait for all os contexts that used the allocation
when os context is not ready then flush related command stream receiver

Change-Id: I5fb2c16c1d398c59fbd02e32ebbbb9254583244e
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2019-01-08 14:32:21 +01:00
Mrozek, Michal 1ce3898400 Improve checkMemory validation. 
- check that proper flags are passed if hostPtr is presented.
- fix a bug in buffer fixture.
- fix some bugs in other tests.

Change-Id: If708fd06598e5f3d8a94b3e24fb83f689f6b52c7
 2019-01-08 11:44:37 +01:00
Milczarek, Slawomir ea028d2a9b Moved TBX and AUB CSR members to SimulatedCommonHw CSR 
Change-Id: I4b49b0cf886c70127a9983dd1c9d7b15f7a45b7a
 2019-01-08 09:39:28 +01:00
Mrozek, Michal 5c9f8eee23 Change the type for CL_MEM_ALLOC_HOST_PTR buffers in 64 bit. 
Change-Id: Ic70d8bb3e172b80b7c20b570e5e307be460defce
 2019-01-08 09:08:00 +01:00
Cetnerowski, Adam 639c14581c ULT renaming: Copy image tests 
Change-Id: Id5eadd013c023dce9ba7e8e95100391fbc276db9
 2019-01-08 08:48:08 +01:00
Filip Hazubski 2540e37c60 Update test cases for clEnqueueVerifyMemory 
Change-Id: Ie166bb11e6e9ea385e94e9c98c8aa871e1c9148b
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2019-01-07 16:27:23 +01:00
Mateusz Jablonski aee69779fa Minor renaming in a scope of multi os context allocations: 
shareable -> multiOsContextCapable
resetTaskCount -> releaseUsageInOsContext
resetResidencyTaskCount -> releaseResidencyInOsContext
isUsedByContext -> isUsedByOsContext

Change-Id: If824246a0e393b962bd12f8c63d429a0fcfcda25
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2019-01-07 11:42:43 +01:00
Milczarek, Slawomir 9083761dce Add AUBFillBuffer test with concurrent execution on CS 
Change-Id: Ia01614a9763ff67d27ed68c46a5ae1b9f7dd0ee8
 2019-01-04 17:04:55 +01:00
Zdanowicz, Zbigniew 767f27a483 Add calculation of default SSH size in ULTs 
Change-Id: I682f7cc671ab18de7a9976e0034842df0f6134bf
 2019-01-04 09:28:21 +01:00
Filip Hazubski 7e3884e22d Add clEnqueueVerifyMemory API 
Change-Id: I15a514b14b9efdaeb182c7abd98b8e236932d50f
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2019-01-04 08:30:02 +01:00
Cetnerowski, Adam 7c5ec09a07 ULT renaming: Copy Buffer to Image tests 
Change-Id: I685cadffed27866e6b253cd72a329ff03ffbb8ff
 2019-01-03 14:31:19 +01:00
Napiatek, Henryk J f7e0decf44 Improve capturing profiling timestamps 
Change-Id: I3a568afb664cae5c871e53de2c36fc8be65a4bdf
 2019-01-03 12:35:56 +01:00
Milczarek, Slawomir ba2b8f05fc AubManager to accept memory bank size in bytes 
Change-Id: Ie98cb7c0c0eaf93c9a2312aa87428173421609a9
 2019-01-02 15:56:36 +01:00
Filip Hazubski 9d9b11734d Enhance processing Queue properties 
Change-Id: I53ab00bdbfb6b11a7d9fdcaec816eead625ae737
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2019-01-02 14:52:02 +01:00
Venevtsev, Igor 73a63c7689 Fix Read/WriteBuffer for unaligned offsets 
Change-Id: I08d33e80243f41174f4629c8a611e286629d2e10
 2018-12-31 14:50:07 +01:00
Hoppe, Mateusz a31c446d9f Allocate non USE_HOST_PTR and non-buffer images in preferred pool. 
Change-Id: Ia486c7b32932202162d6587d06dc61023e38fff6
 2018-12-31 14:37:44 +01:00
Hoppe, Mateusz e195b0e380 Initialize TBX stream only when hardwareContext is not created 
Change-Id: I05d8c5c395cc342ea699333dd59966913f9a98df
 2018-12-31 12:14:55 +01:00
Mateusz Jablonski 56eced2faa Don't allow 32bit allocation for SVM allocation type 
Change-Id: I2fbae4ce3be956a386bdc22c9b129f37d75c8e8f
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2018-12-31 10:43:08 +01:00
Kamil Diedrich fad2f8dbd1 Change auxTranslationDirectory 
Change-Id: I5d433d340e945b799dbec25a22fd610312f00c0a
 2018-12-28 16:46:42 +01:00
Adam Cetnerowski e8fc87b7dc ULT renaming: EnqueueCopyBufferRect 
Change-Id: I95de3b07d76b973018ac384797484c902b1d5b62
 2018-12-28 14:54:28 +01:00
Hoppe, Mateusz 694b643df1 Add useLocalMemory flag to ImageInfo 
Change-Id: I664f9e17c0c480c2b7b2b34dcfaefa7929b9ddfe
 2018-12-28 13:53:53 +01:00
Hoppe, Mateusz 20fd137437 Fix & refactor AUBCreateImageArray 
- verify memory on GPU when non-system MemoryPool is used
- set correct region for IMAGE1D_ARRAY

Change-Id: I0f50d40520d2a99f124ec87b91be0c8b5f3d48be
 2018-12-28 13:36:02 +01:00
Zdunowski, Piotr 7ce72bef85 Source level debugger support test improvement. 
Change-Id: I14680cd4784396c788a4c0d5e38bfcfccc94fdfb
 2018-12-27 12:44:29 +01:00
Adam Cetnerowski a2a4bcc33d Correct extension string typo 
Change-Id: I1305a0251b06e8601e78a9b8774c285e035ff28d
 2018-12-27 12:36:49 +01:00
Hoppe, Mateusz d7f498c58a Enable LocalMemory and AubStream in AubTestsWithTbx mode 
Change-Id: I7958cc76be823b02782e1cb92eeacacdf35f8cc1
 2018-12-27 09:48:31 +01:00
Dunajski, Bartosz 8029639898 Pin allocation with specific DrmContextId at creation time 
Change-Id: Ic132fb70b1da2cf3b7c70ab899822705adb83edc
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-12-27 09:35:58 +01:00
Artur Harasimiuk b5f443edc0 Revert commit cc1f4bed60. 
This reverts commit cc1f4bed60.
Revert "Revert "Use GPU instead of CPU address in programming commands
for HwTim(...)""

Change-Id: Iff122612bb46ba80bcc70b07b2609bfd5f0b9653
Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com>
 2018-12-21 13:25:49 +01:00
Artur Harasimiuk b2c1d68a91 Revert "Revert "Revert "Fix Read/WriteBuffer for unaligned offsets""" 
This reverts commit f6757c02a4.

Change-Id: I239528e7588dc9766b10a7ce7e517d6b2cdd6375
Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com>
 2018-12-21 08:57:45 +01:00
Katarzyna Cencelewska 154917a979 Add ULTs for DriverInfoWindows 
Change-Id: Id2b4456bdc33e625569eaef6e197101ba63cea7b
 2018-12-21 08:45:21 +01:00