9e52684f5b
Change namespace from OCLRT to NEO
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Change-Id: If965c79d70392db26597aea4c2f3b7ae2820fe96
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
2019-03-26 15:48:19 +01:00
047f2bec87
Program correct addresses in EnqueueReadWriteBufferRect scenarios
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- SurfaceBaseAddress should be programmed with aligned address
this was not the case for certain origin and region values
- offset from aligned address added to operationParams
Change-Id: I0742b826dd0b70f0a6dedf436b850734fa015688
Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
2019-03-26 10:37:46 +01:00
8b57d28116
clang-format: enable sorting includes
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Include files are now grouped and sorted in following order:
1. Header file of the class the current file implements
2. Project files
3. Third party files
4. Standard library
Change-Id: If31af05652184169f7fee1d7ad08f1b2ed602cf0
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
2019-02-27 11:50:07 +01:00
f6ceb8fb4f
Remove default parameters from setArgSvm function.
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Change-Id: I4408ddedfca464d56e24c4daa0c8c7b73791d6a0
2019-01-28 12:02:54 +01:00
64ff9d30b7
Fixes for misaligned hostPtr enqueueReadWrite
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- use getGpuAddress for BuiltinOpParams
- fix read/writeImage
Change-Id: I2e6e9a1d91871fa9f22851f31eb5a7b337b5aecc
2019-01-11 09:14:47 +01:00
73a63c7689
Fix Read/WriteBuffer for unaligned offsets
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Change-Id: I08d33e80243f41174f4629c8a611e286629d2e10
2018-12-31 14:50:07 +01:00
b2c1d68a91
Revert "Revert "Revert "Fix Read/WriteBuffer for unaligned offsets"""
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This reverts commit f6757c02a4
2018-12-21 08:57:45 +01:00
f6757c02a4
Revert "Revert "Fix Read/WriteBuffer for unaligned offsets""
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This reverts commit 71f6524197
2018-12-20 14:16:07 +01:00
71f6524197
Revert "Fix Read/WriteBuffer for unaligned offsets"
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This reverts commit 6ea863e440
2018-11-27 12:35:03 +01:00
6ea863e440
Fix Read/WriteBuffer for unaligned offsets
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Change-Id: Ia8daff3e95bd724a9f678eb471dbb44a66cc0bc7
2018-11-20 09:25:12 +01:00
84865512cd
Scheduler cannot utilize scratch space.
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Change-Id: Ib3e6e3aef711477f800ae437c59eb7340a481510
2018-10-03 21:59:11 +02:00
40146291ad
Update copyright headers
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Updating files modified in 2018 only. Older files remain with old style
copyright header
Change-Id: Ic99f2e190ad74b4b7f2bd79dd7b9fa5fbe36ec92
Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com>
2018-09-20 18:02:35 +02:00
b91c14f70e
Delete Device::getBuiltIns()
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Change-Id: I9d1968dfb2ba4a56020fd17152119add726106e1
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
2018-08-22 16:54:53 +02:00
e0e48203d2
Move BuiltIns to ExecutionEnvironment
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Change-Id: Ib2a1b82cc7858c898bb32820aad106a01d1325ad
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
2018-08-21 23:15:47 +02:00
d2759a0629
Move CompilerInterface to ExecutionEnvironment
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Change-Id: I14afdd8fc41ecd4ac8c8fcbeecda2539bc847288
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
2018-08-21 15:30:15 +02:00
5b37dc1c91
Add ExecutionEnvironment parameter to Program::createFromGenBinary
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Change-Id: I825c29d8c885d986d54d716ea72f19e70b3b11c6
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
2018-08-16 13:56:36 +02:00
a5950500a3
Aux translation [4/n]: Lock BuiltIn Kernel + refactor BuiltIns locking
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Change-Id: Ic7dc9b86a4aa5f93f1c4bcdf80b9598ecdff9713
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2018-08-14 10:56:16 +02:00
1a85f83235
Use std::make_unique for BuiltinDispatchInfoBuilder creation
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Change-Id: I6c28627201c22900502f8f0d481a606f887069bf
2018-08-13 08:09:54 +02:00
117a7d15ad
Aux translation [2/n]: Add new builtins
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Each Kernel arg for aux translation needs to have own builtin kernel.
This is required to build MultiDispatchInfo before copying into SSH
Change-Id: I4b2f42518cf06bb31c31fd5f83f7da927bde99c3
2018-08-10 18:24:21 +02:00
95e5aba86a
Decode sip binaries once for all tests
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Change-Id: I05a54146dc1aa893c5217f60f3b4ca47ded03019
2018-05-29 13:47:19 +02:00
157ffbceb5
Revert "Builtins increase context refcount."
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This reverts commit 39d55e5257
2018-05-28 16:35:45 +02:00
972c080083
enable & switch to clang 6.0
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Change-Id: I61910614ddaa37db18a3d995fa94efb03238279a
Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com>
2018-05-25 10:08:26 +02:00
39d55e5257
Builtins increase context refcount.
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Change-Id: I146852092e1cb374b816875ae9a90ac03a8f205e
2018-05-23 17:56:20 +02:00
ce2f1468b7
Implement cl_khr_mipmap_image [2/n]
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- Add mipmap handling for clEnqueueCopyImage
- Add mipmap handling for clEnqueueCopyImageToBuffer
- Add mipmap handling for clEnqueueCopyBufferToImage
- Fix typos
Change-Id: Ie1a23b1699135afa17fe11bcba3c1e8bdf9a3dd9
2018-03-21 17:04:12 +01:00
0ad81024b7
Implement cl_khr_mipmap_image [1/n]
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- Add mipmap image handling for clEnqueueReadImage, clEnqueueWriteImage
- Fix mipmap image handling for clCreateImage
Change-Id: I42938a330b55c7e69a16c26dce3ab5d66f8a8938
2018-03-21 10:51:13 +01:00
38c352d044
[12/n] Internal 4GB allocator
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- allocate graphics allocation for sip.
Change-Id: I18f12251d3ce812d53cc1c8c78079a9ba3fd3b3d
2018-03-09 14:19:06 +01:00
8b726368d5
[10/n] Internal 4GB allocator.
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- Sip kernel now uses Program
Change-Id: Ibba11a5686502084a8b7fa99732f8bc2ee78dcc5
2018-03-07 19:21:16 +01:00
f90ebac12a
Clean obsolete code.
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Change-Id: I9551f7217924c7ea8f44a3322fc3096252c4d6f7
2018-02-23 08:10:12 +01:00
45dedb37f3
For HostPtr surfaces of enqueue calls use GPU address
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Change-Id: I67bf5076d23d43438f5e82c5cb6cbd3b9ed2f152
2018-02-14 15:44:27 +01:00
474b6a2a23
Enable Mid-Thread preemption for Gen9
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Change-Id: Iacec1c8fa899d4fbf0cbb9cc292990546871ca6a
2018-01-16 12:55:35 +01:00
1fd771e5a5
Refactor SIP acquiring
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Acquire SIP by device, not by context
Change-Id: Iac850db1d65c52ebc8a331039046c0dd6acf1d4e
2018-01-08 03:31:45 +01:00
7e9ad41290
Initial commit
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Change-Id: I4bf1707bd3dfeadf2c17b0a7daff372b1925ebbd
2017-12-21 00:45:38 +01:00
Maciej Plewka