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183 Commits

Author SHA1 Message Date
Mateusz Hoppe 313fb84fda feature: bindless addressing mode support 
- allow bindless kernels to execute
- bindless addressing kernels are using private heaps mode
- do not differentiate bindful and bindless surface state base addresses

Related-To: NEO-7063

Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
 2023-06-19 12:41:03 +02:00
Mateusz Hoppe 0844ca0ac8 refactor: cleanup getBindlessMode() usage 
- getGlobalBindlessHeapConfiguration() should be used to choose global
alloctor for SSH
- remove not needed and incorrect unit tests
- remove not needed branches
- bindless mode controls bindless compilation only

Related-To: NEO-7063

Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
 2023-06-06 17:23:13 +02:00
Mateusz Hoppe 1c196b9f3d refactor: change ApiSpecificConfig functions names 
- better description of the meaning of functions

Related-To: NEO-7063

Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
 2023-05-30 09:20:01 +02:00
Dunajski, Bartosz c1f71ea7f7 feature: new conditional bb_start mode + aub tests 
Related-To: LOCI-4332

Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2023-05-05 14:40:17 +02:00
Fabian Zwolinski cbce863dc2 refactor: Rename member variables to camelCase 3/n 
Additionally enable clang-tidy check for member variables

Signed-off-by: Fabian Zwolinski <fabian.zwolinski@intel.com>
 2023-04-28 16:01:14 +02:00
Dominik Dabek c84c7a0c91 performance: adjust thread group dispatch size 
adjust thread group dispatch size on pvc if chosen size does not evenly
divide dimension

this is to avoid leftover thread groups

Related-To: NEO-7927

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
 2023-04-27 18:24:53 +02:00
Zbigniew Zdanowicz 4c7bc2ca98 [feature, perf] add alogrithm to chain command buffers in container 
This feature is part of performance improvement to dispatch and start
command buffers as primary batch buffers.
When exhausted command buffer is closed, then reserve exact space for chained
batch buffer start and bind it to the next command buffer.
When closing command buffer, then save ending pointer and
reserve aligned space.

Related-To: NEO-7807

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2023-04-05 15:49:01 +02:00
Dunajski, Bartosz 3ff7a63145 Reduce number of jumps in RelaxedOrdering scheduler 
Related-To: NEO-7458

Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2023-04-04 09:07:59 +02:00
Kacper Nowak f1c64adb3c fix(ocl): Fix potential mem leak + simplify code 
- Fix potential memleak in case ASSERT returns false and test gets
aborted
- Remove not needed function argument
Signed-off-by: Kacper Nowak <kacper.nowak@intel.com>
 2023-03-27 13:31:42 +02:00
Zbigniew Zdanowicz 38e50007f7 [perf] simplify memory layout of command container class 
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2023-03-23 13:31:47 +01:00
Cencelewska, Katarzyna 398c7b2d29 refactor, remove typo in struct name 
change name of EncodeSempahore to EncodeSemaphore
Signed-off-by: Cencelewska, Katarzyna <katarzyna.cencelewska@intel.com>
 2023-03-10 15:44:25 +01:00
Kamil Kopryk fa8579602f refactor: rename product helper files n/n 
Related-To: NEO-7703
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
 2023-03-10 13:24:38 +01:00
Cencelewska, Katarzyna c274309d7b wa: add dummy blits before command MI_FLUSH_DW 
to guarantee that all subblt got complete for previous copy
affect xe hpg

temporary changes under flag ForceDummyBlitWa

Related-To: NEO-7450

Signed-off-by: Cencelewska, Katarzyna <katarzyna.cencelewska@intel.com>
 2023-03-09 10:40:35 +01:00
Cencelewska, Katarzyna 3e116ea378 refactor: use same paths when add command mi_semaphore_wait 
Signed-off-by: Cencelewska, Katarzyna <katarzyna.cencelewska@intel.com>
 2023-03-07 10:35:26 +01:00
Cencelewska, Katarzyna 50da32ffb1 wa: add dummy blits before command MI_ARB_CHECK 
to guarantee that all subblt got complete for previous copy
affect xe hpg

Related-To: NEO-7450

Signed-off-by: Cencelewska, Katarzyna <katarzyna.cencelewska@intel.com>
 2023-03-07 10:21:05 +01:00
Zbigniew Zdanowicz bf2072c3ea Add cross regular and intermediate command lists base address state transitions 
- updates coming from regular list are updated in csr last sent variables
- all per context and per kernel transitions kept in single place
- state updates from intermediate to regular are set in csr properties
- global atomics support duplicates removed

Related-To: NEO-5055

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2023-02-17 16:49:47 +01:00
Warchulski, Jaroslaw 64f735481d Cleanup includes 48 
Cleaned up files:
shared/source/command_container/command_encoder.inl
shared/source/os_interface/hw_info_config.h

Related-To: NEO-5548
Signed-off-by: Warchulski, Jaroslaw <jaroslaw.warchulski@intel.com>
 2023-02-10 17:23:02 +01:00
Warchulski, Jaroslaw a2e6a8284b Cleanup includes 47 
Cleaned up files:
level_zero/tools/source/debug/windows/debug_session.h
level_zero/tools/source/sysman/memory/windows/os_memory_imp.h
level_zero/tools/source/sysman/windows/kmd_sys_manager.h
opencl/test/unit_test/aub_tests/command_stream/copy_engine_aub_tests_xehp_and
shared/source/command_container/command_encoder.inl
shared/source/command_stream/command_stream_receiver_hw_xehp_and_later.inl
shared/source/helpers/blit_commands_helper_base.inl
shared/test/unit_test/image/image_surface_state_fixture.h
shared/test/unit_test/os_interface/windows/os_interface_win_tests.h

Related-To: NEO-5548
Signed-off-by: Warchulski, Jaroslaw <jaroslaw.warchulski@intel.com>
 2023-02-10 17:07:30 +01:00
Zbigniew Zdanowicz 7e0401d280 Add improvements to heap estimation in level zero command lists 
- add estimation parameter for interface descriptor data count
- add to the heap estimation alignment parameter for dynamic and surface heaps
- extend encode interface and implementations to allow child heaps

Related-To: NEO-5055

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2023-02-03 20:26:27 +01:00
Kamil Kopryk 2484c7ceb2 refactor: rename hw_helper files to gfx_core_helper files 
Related-To: NEO-6853
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
 2023-02-01 19:37:51 +01:00
Kamil Kopryk 27393c76ea refactor: don't use global ProductHelper getter 11/n 
Related-To: NEO-6853
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
 2023-01-26 08:16:52 +01:00
Warchulski, Jaroslaw 49837b7bb5 Cleanup includes 39 
Cleaned up files:
shared/source/command_container/command_encoder.h

Related-To: NEO-5548
Signed-off-by: Warchulski, Jaroslaw <jaroslaw.warchulski@intel.com>
 2023-01-23 11:56:42 +01:00
Mateusz Jablonski ce059e7fe3 fix: align up surface size in surface state 
don't abort when surface size is not aligned
underlying memory size is always aligned

Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2023-01-20 05:55:47 +01:00
Warchulski, Jaroslaw 9f3fc6858e Cleanup includes 16 
Cleaned up files:
shared/source/built_ins/built_ins.h
shared/source/command_container/command_encoder.h
shared/source/helpers/hw_helper.h
shared/source/memory_manager/allocation_properties.h
shared/source/xe_hpc_core/hw_cmds.h
shared/test/common/test_macros/test_excludes.h

Related-To: NEO-5548

Signed-off-by: Warchulski, Jaroslaw <jaroslaw.warchulski@intel.com>
 2022-12-29 15:12:37 +01:00
Warchulski, Jaroslaw f275eea6ec Cleanup includes 14 
Cleaned up files:
shared/source/device/device.h

Related-To: NEO-5548

Signed-off-by: Warchulski, Jaroslaw <jaroslaw.warchulski@intel.com>
 2022-12-23 10:46:34 +01:00
Tratnack, Geoffrey d2c218efe3 Add a patch to command encoder for samplers when DSH is dirty. 
Signed-off-by: Tratnack, Geoffrey geoffrey.tratnack@intel.com
Related-To: LOCI-3365
 2022-12-09 11:08:23 +01:00
Tratnack, Geoffrey 818db03a68 LOCI-3365: Cleanup MediaInterfaceDescriptorLoad logic in command encoder 
Add a patch to command encoder when DSH is dirty.

Signed-off-by: Tratnack, Geoffrey <geoffrey.tratnack@intel.com>
Related-To: LOCI-3365
 2022-12-08 17:07:53 +01:00
Yates, Brandon 4bd5765a06 L0 Debug - Fix imm cmdlist mode on windows 
Single Address Space SBA programming was using incorrect BB
level and not loading GPR15

Related-to: NEO-7517
Signed-off-by: Yates, Brandon <brandon.yates@intel.com>
 2022-11-25 20:37:14 +01:00
Dunajski, Bartosz acb8186744 Change default GPR offsets 
Related-To: NEO-7458

Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2022-11-22 18:27:52 +01:00
Kamil Kopryk 4aa1697e3c Move hwInfoConfig ownership to RootDeviceEnvironment 2/n 
Related-To: NEO-6853
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>

Use RootDeviceEnvironment getHelper<ProductHelper> for
- adjustSamplerState
- adjustPlatformForProductFamily.
 2022-11-14 13:04:31 +01:00
Compute-Runtime-Validation 77b6918f30 Revert "LOCI-3365: Cleanup MediaInterfaceDescriptorLoad logic in command enco... 
This reverts commit cb3f7234f0.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2022-11-12 16:05:11 +01:00
Tratnack, Geoffrey cb3f7234f0 LOCI-3365: Cleanup MediaInterfaceDescriptorLoad logic in command encoder 
Add a patch to command encoder for samplers when DSH is dirty.

Signed-off-by: Tratnack, Geoffrey <geoffrey.tratnack@intel.com>
Related-To: LOCI-3365
 2022-11-10 23:28:58 +01:00
Dunajski, Bartosz 002184586c Add command buffer helpers: Conditional BB_START and GPR Inc/Dec 
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2022-11-10 18:56:24 +01:00
Dunajski, Bartosz 918d7b1da4 Helper for MI_SET_PREDICATE programming 
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2022-11-08 14:20:01 +01:00
Compute-Runtime-Validation ddbaa5e8c9 Revert "Cleanup MediaInterfaceDescriptorLoad logic in command encoder" 
This reverts commit 349af0bd5e.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2022-11-07 02:20:27 +01:00
Tratnack, Geoffrey 349af0bd5e Cleanup MediaInterfaceDescriptorLoad logic in command encoder 
Add a patch to command encoder for samplers when DSH is dirty.

Signed-off-by: Tratnack, Geoffrey <geoffrey.tratnack@intel.com>
Related-To: LOCI-3365
 2022-11-06 03:27:23 +01:00
Dominik Dabek 6cf8b4daca Correct tg dispatch size heuristic 
Multiply available thread count by tile count
if implicit scaling is used

Related-To: NEO-6989

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
 2022-10-27 17:24:53 +02:00
Tratnack, Geoffrey 1b9c510614 Update to command_encoder, fix bug changing dynamic state memory 
Adding ULT for encode and command container changes
Refactor getHeapSpaceAllowGrow and getHeapWithRequiredSizeAndAlignment

Signed-off-by: Tratnack, Geoffrey <geoffrey.tratnack@intel.com>
Related-To: LOCI-3365
 2022-10-11 03:40:25 +02:00
Zbigniew Zdanowicz 3d92186362 Add heap sharing to immediate command lists 
This change is intended to be used in immediate command lists that are
using flush task functionality.
With this change all immediate command list using the same csr will consume
shared allocations for dsh and ssh heaps. This will decrease number of SBA
commands dispatched when multiple command lists coexists and dispatch kernels.
With this change new SBA command should be dispatched only when current heap
allocation is exhausted.
Functionality is currently disabled and available under debug key.
Functionality will be enabled by default for all immediate command lists
with flush task functionality enabled.

Related-To: NEO-7142

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2022-10-03 18:50:10 +02:00
Maciej Bielski 0d0d6a300e Debugger: simplify captureStateBaseAddress() 
So far captureStateBaseAddress() was a wrapper around
programSbaTrackingCommands(), doing an additional checking before
calling the latter. The checking is apparently no longer relevant, so
unify the distinction and remove part of the code which is no longer
needed.

In practice, keep the captureStateBaseAddress() while moving the body of
programSbaTrackingCommands() into it. This imposes lower diff-impact
onto the class hierarchy. Remove the second function. Simplify the
caller which had to distinct these two functions previously.

Related-To: NEO-6774
Signed-off-by: Maciej Bielski <maciej.bielski@intel.com>
 2022-09-13 17:08:31 +02:00
Kamil Kopryk 410fd7d909 Correct binding table prefetch 
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
Related-To: NEO-6075

Binding table entry count was zeroed even when
ForceBtpPrefetchMode debug flag was enabled
 2022-09-13 14:34:30 +02:00
Maciej Bielski e1b80ba1a8 Cleanup: updateStreamProperties(), SBA tracking 
Fixes found out while working on the StateBaseAddress adaptation to
StreamProperties. Removing unused parameters, improving code reuse
(further improvements come with following commits).

Related-To: NEO-6774
Signed-off-by: Maciej Bielski <maciej.bielski@intel.com>
 2022-09-12 17:56:28 +02:00
Zbigniew Zdanowicz a4b9b3b837 Extend encode class for start and end hw commands 
Related-To: NEO-5019

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2022-09-02 16:29:36 +02:00
Dominik Dabek 8cc0177f1c Change DG2 l1 cache policy to WB 
With compiler LSC WAs this gives better performance.

If debugger is active, policy will not be changed ie.
will be WBP.

Related-To: NEO-7003

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
 2022-08-31 14:31:23 +02:00
Compute-Runtime-Validation 2621460e80 Revert "Change DG2 l1 cache policy to WB" 
This reverts commit a820e73dd7.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2022-08-27 08:04:19 +02:00
Dominik Dabek a820e73dd7 Change DG2 l1 cache policy to WB 
With compiler LSC WAs this gives better performance.

If debugger is active, policy will not be changed ie.
will be WBP.

Related-To: NEO-7003

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
 2022-08-26 12:58:45 +02:00
Rafal Maziejuk ed0c36117e Apply heuristics when setting TG dispatch size on XE_HPC_CORE 
The default TG dispatch size can be changed
to a better value based on number of threads in TG or
currently available amount of threads on GPU.
Decision on what TG dispatch size should be are based on
implemented heuristics.

Signed-off-by: Rafal Maziejuk <rafal.maziejuk@intel.com>
Related-To: NEO-6989
 2022-08-08 16:43:10 +02:00
Dunajski, Bartosz 98d776867f Add initial support for KernelArgsBuffer allocation 
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2022-08-03 20:28:21 +02:00
Bartosz Dunajski 61b2ee45cd Use LogicalStateHelper to encode SystemMemoryFence 
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2022-06-24 13:29:58 +02:00
Maciej Bielski 8de043b71f Stop redundant SBA programming due to global atomics 
For all platforms different than XE_HP_SDV (ATS) stop considering the
`useGlobalAtomics` flag as a decisive factor for trigerring the SBA
(StateBaseAddress) programming on the HW. Only XE_HP_SDV supports such
flag.

For consistency of the implementation, keep the related logic in one
place only, that is a helper in `command_encoder` and then just reuse it
in different places (`command_stream_receiver`).

Related-To: NEO-6953
Signed-off-by: Maciej Bielski <maciej.bielski@intel.com>
 2022-06-08 10:39:56 +02:00
Katarzyna Cencelewska 96e1eb7467 Move variables baseDieRev and baseDieA0Masked from xe_hpc to pvc 
Pvc specific variables should be located in pvc struct

Related-To: NEO-6738
Signed-off-by: Katarzyna Cencelewska <katarzyna.cencelewska@intel.com>
 2022-05-17 12:19:16 +02:00
Artur Harasimiuk d643c587b9 style: correct variable naming 
Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com>
 2022-05-16 15:02:15 +02:00
Bartosz Dunajski db9c0d1103 Refactor and enable MI_MEM_FENCE programming for DirectSubmission dispatch 
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2022-04-07 12:53:56 +02:00
Zbigniew Zdanowicz f4407064a4 Refactor store register mem encoder to include partition parameter 
Related-To: NEO-6811

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2022-04-06 14:00:56 +02:00
Mateusz Hoppe beff0019d1 SBA tracking for single address space 
Related-To: NEO-6539


Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
 2022-04-01 15:24:11 +02:00
Filip Hazubski 3eab7009ac Move SCM related WAs logic from CSR to EncodeComputeMode 
This will help with unifying the logic between APIs and GENs.

Related-To: NEO-6728

Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2022-03-11 14:00:53 +01:00
Bartosz Dunajski e24322f266 Debug flag to control MI_ARB_CHECK prefetcher 
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2022-03-10 12:50:05 +01:00
Katarzyna Cencelewska dd63f1d2f9 Add new function append3dStateBtd 
Signed-off-by: Katarzyna Cencelewska <katarzyna.cencelewska@intel.com>
 2022-02-03 14:42:10 +01:00
Maciej Plewka 9d8ce7aace Command container appends BB_END on cmd buffer allocation end 
When linear stream created for command container has not enough space
for command and BB_END it will program BB_END and allocate new command
buffer allocation. Pointer returned from getSpace in this case will
return storage from new command buffer allocation.

Related-To: NEO-5707

Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
 2022-01-31 16:15:37 +01:00
Maciej Plewka f8c104feaa Use fw declaration of IndirectHeap in CommandContainer 
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
 2022-01-26 13:30:26 +01:00
Mateusz Jablonski 5e238dc7f1 Unify surface state programming logic related to implicit scaling 
OCL image surface state programming for Xe Hp core is now reusing logic
of EncodeSurfaceState helper

Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2022-01-25 09:02:28 +01:00
Mateusz Jablonski 5cd76aef6a Refactor surface state programming, add enum value for default halign value 
Related-To: NEO-6466
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2022-01-19 14:31:28 +01:00
Filip Hazubski 9a450d1b74 Pass hwInfo to appendMiFlushDw 
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2021-12-22 15:22:47 +01:00
Mateusz Jablonski 66bf806018 Remove magic number from set/getBatchBufferStartAddressGraphicsaddress methods 
rename methods to set/getBatchBufferStartAddress

Related-To: NEO-6466
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2021-12-16 19:03:01 +01:00
Zbigniew Zdanowicz 47dbe359bf Add command encoder for store data command 
Related-To: NEO-6262

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2021-12-02 20:56:07 +01:00
Bartosz Dunajski 55959d4d1d Helper method to check if allocation is compressed 
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2021-12-02 16:13:53 +01:00
Zbigniew Zdanowicz 76b8f6296f Move noop programming to dedicated encoder 
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2021-11-18 10:28:56 +01:00
Zbigniew Zdanowicz 9d56939980 Refactor creation of buffer surface state 1/n 
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2021-10-21 13:11:31 +02:00
Mateusz Jablonski 5d2d81b2d1 Use uint64_t instead of void * in indirect dispatch programming 
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2021-10-06 18:37:36 +02:00
Mateusz Jablonski 92bf4b978a Implement implicit args for indirect dispatch 
Related-To: NEO-5081
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2021-10-06 16:10:41 +02:00
Mateusz Jablonski ae340ff6f5 Add L0 aub tests for indirect dispatch 
Related-To: NEO-5081
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2021-10-05 21:05:40 +02:00
Mateusz Jablonski b891ec2588 Correct cross thread data GPU address in indirect dispatch programming 
Related-To: NEO-5081
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2021-10-04 14:59:41 +02:00
Zbigniew Zdanowicz 6b299a3ab0 Make partitioned post sync operations for partitioned workloads 
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2021-09-03 20:20:29 +02:00
Bartosz Dunajski 856dee2b08 Improve Sampler programming 
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2021-08-25 19:47:30 +02:00
Lukasz Jobczyk dbf9198186 Flush tlb on BCS direct submission 
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2021-07-30 16:26:47 +02:00
Dominik Dabek 62f89b174a Add work_dim patching to l0 kernel 
Related-To: NEO-5931

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
 2021-07-05 20:09:20 +02:00
Mateusz Jablonski 72d124e275 add function to append params for image from buffer 
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2021-06-24 13:33:43 +02:00
Zbigniew Zdanowicz 0e5ca243e2 Add notify enable parameter to post sync commands 
Related-To: NEO-5845

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2021-06-17 19:22:51 +02:00
Szymon Morek 3ed0f074af Add method to set compression flag 
Signed-off-by: Szymon Morek <szymon.morek@intel.com>
 2021-06-10 12:27:24 +02:00
Zbigniew Zdanowicz 4fa5041f27 Add inline directive to smallest functions 
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2021-06-10 09:27:07 +02:00
Maciej Plewka 689ceacfe6 Fix set allocation adress in SS when offset is patched 
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
 2021-06-08 13:05:38 +02:00
Zbigniew Zdanowicz 8f91fcdd73 Add new atomic operation 
Related-To: NEO-5244

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2021-06-04 09:00:11 +02:00
Maciej Plewka 159404f38e Revert "Program border color once per dsh" 
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
 2021-05-18 12:26:58 +02:00
Maciej Plewka b943ad078f Program border color once per dsh 
Related-To: NEO-4928

Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
 2021-04-30 13:31:58 +02:00
Milczarek, Slawomir e5eba8be53 Add setters and getters for coherency type in render surface state 
Signed-off-by: Milczarek, Slawomir <slawomir.milczarek@intel.com>
 2021-04-13 16:12:46 +02:00
Mateusz Jablonski 8215395401 Simplify Context method 
return if context has multiple sub devices related to a given root device

Related-To: NEO-3691
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2021-03-30 10:22:15 +02:00
Zbigniew Zdanowicz e36941b171 Change argument type in EncodeMemoryPrefetch class 
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2021-03-25 18:27:07 +01:00
Bartosz Dunajski f9197d4e0d Improve memoryPrefetch method 
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2021-03-24 15:12:05 +01:00
Igor Venevtsev 3df6110a17 Add extra parameters to setArgStateful() 
Signed-off-by: Igor Venevtsev <igor.venevtsev@intel.com>
 2021-02-05 12:24:27 +01:00
Bartosz Dunajski 580fdd757c Improve buffer surface state programming 
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2021-02-02 14:42:18 +01:00
Bartosz Dunajski c2e333fe38 Update compression encoding interface + test traits 
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2021-01-29 13:57:15 +01:00
Maciej Plewka 3ca77a6cbe Program sba for global bindless heaps 
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
 2021-01-04 14:23:47 +01:00
Young Jin Yoon e09ac446c4 Mask bit 0 of timestamp for event profiling 
Related-to: LOCI-1161
Signed-off-by: Young Jin Yoon <young.jin.yoon@intel.com>
 2020-12-31 23:51:12 +01:00
Young Jin Yoon da779d067f Support the AND operation in EncodeMathMMIO 
Related-to: LOCI-1161
Signed-off-by: Young Jin Yoon <young.jin.yoon@intel.com>
 2020-12-03 01:56:22 +01:00
Maciej Plewka 7a5c9d39b5 Encode dispatch kernel with global bindless heaps 
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
 2020-12-02 17:30:15 +01:00
Bartosz Dunajski 93ba4e646b Improve EncodeDispatchKernel 
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2020-11-27 16:39:34 +01:00
Bartosz Dunajski 8a703c082e Add encodeExtraCacheSettings method 
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2020-11-25 12:27:20 +01:00
Bartosz Dunajski ae3ad3e8bc Add method to adjust TimestampPacket 
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2020-11-24 17:35:22 +01:00
Kamil Kopryk b59aa2f928 Rename command_encoder_base.inl file 
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
Related-To: NEO-4750
 2020-11-17 13:22:00 +01:00
Bartosz Dunajski 39e6548ef6 Add mi_arb_check between blit commands 
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2020-11-17 13:07:50 +01:00