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Author SHA1 Message Date
Filip Hazubski b2e16b7897 Update allocationForCacheFlush method 
Related-To: NEO-2535

Change-Id: Ia24556814188263e2ebb54b6419feddd5d8ed707
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2019-04-03 18:07:13 +02:00
Mateusz Jablonski b4ed5468a2 Add device index to AllocationProperties 
Change-Id: I3c9f7ea59bf85fbbc948ba23c2b1040f295f586c
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2019-04-03 10:48:30 +02:00
Mrozek, Michal 69f8e72816 Always go via CSR in multi OS Context scenarios. 
Change-Id: I448db22a35c8c99ac9c7abe65c340842aeb883c2
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
 2019-04-01 17:35:24 +02:00
Stefanowski, Adam 73b8583759 [4/n] Move Hardware Info to Execution Environment 
- remove hwInfo from ScratchSpaceController, pass it by
ExecutionEnvironment

Change-Id: I4d83e581560b8a56a51e09d0e2b8397fee59dc22
Signed-off-by: Adam Stefanowski <adam.stefanowski@intel.com>
 2019-04-01 14:25:43 +02:00
Milczarek, Slawomir 17493426c1 AUB CSR with a capability to add AUB comment 
Change-Id: Ia7e85468c3f1e937d34b67b0e279c013e8e3c190
Signed-off-by: Milczarek, Slawomir <slawomir.milczarek@intel.com>
 2019-04-01 14:14:58 +02:00
Mrozek, Michal e772321e82 Do not call pollForCompletion after flush. 
Change-Id: I5bae360ceb38d4c955035b3a51938608c79058ed
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
 2019-04-01 10:10:03 +02:00
Maciej Dziuban 377aebce06 Move PIPE_CONTROL related functions to PipeControlHelper 
Change-Id: Ie8220b06d2aa35a9fd0083b7db6925b577564d36
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2019-04-01 09:20:28 +02:00
Milczarek, Slawomir 404428b103 Call pollForCompletion if AUB subcapture is active only 
Change-Id: I0f5c35efa6c5b828fe88c15084fec03bb24af4e7
Signed-off-by: Milczarek, Slawomir <slawomir.milczarek@intel.com>
 2019-03-29 15:49:07 +01:00
Filip Hazubski 9bbf1daa0e Update CommandStreamReceiver::expectMemory() 
Change-Id: I3362f8beee2430f2bf5ff797ec804448682e41ea
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2019-03-29 08:52:02 +01:00
Milczarek, Slawomir 9f95e9b704 TBX with AUB dump to call open on aub manager 
Call open on aub manager to open file stream.

Change-Id: Id48ac4b3bdb212db4adc5912bacd28ccb895c9cf
Signed-off-by: Milczarek, Slawomir <slawomir.milczarek@intel.com>
 2019-03-27 23:59:57 +01:00
Mrozek, Michal 883a830636 Fix --tbx mode. 
- There was a problem in make non resident function when AUB CSR was not
present in CSR with AUB dump , surfaces were not made not resident
properly
- For subsequent submissions they were not discovered as resources requiring
residency and were not made resident
- update task count can only be called when aub csr is actually present.

Change-Id: I12a4c1c14a8a7ecf63a0b0f8d633d35c4bf15b05
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
 2019-03-27 15:44:22 +01:00
Pawel Wilma af64a54a88 Fail AUB tests execution if AUB file cannot be created 
Change-Id: Id0474cc5c00be90e69d498ec5674089086a82350
Signed-off-by: Pawel Wilma <pawel.wilma@intel.com>
 2019-03-27 15:40:48 +01:00
Milczarek, Slawomir 96db96fcb4 Add support for buffer dumps in BIN and TRE format 
Change-Id: Ib7e59fd6812ca6adcb2dfc1defa74008fee17ec9
Signed-off-by: Milczarek, Slawomir <slawomir.milczarek@intel.com>
 2019-03-27 13:04:30 +01:00
Piotr Fusik d4a0c4852b Move EngineType to aub_stream. 
Change-Id: Ieaa75aaf4aca4487833754eb38ff709adcbf0f11
Signed-off-by: Piotr Fusik <piotr.fusik@intel.com>
 2019-03-27 10:06:29 +01:00
Maciej Plewka 9e52684f5b Change namespace from OCLRT to NEO 
Change-Id: If965c79d70392db26597aea4c2f3b7ae2820fe96
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
 2019-03-26 15:48:19 +01:00
Maciej Dziuban 0420c2948f Delete addDcFlushToPipeControl 
Change-Id: Idd1af397a302755484f60e910929c2fe7d52857d
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2019-03-25 16:31:32 +01:00
Jobczyk, Lukasz 9ecb3193af Reverse logic of creating Memory Manager - part 3 
-Move a Device::getEnabled64kbPages method's logic
 to the Memory Manager constructor

Change-Id: Ide88898000e5817a79f9a6ad5dfc9d680bec0533
Signed-off-by: Jobczyk, Lukasz <lukasz.jobczyk@intel.com>
 2019-03-25 14:42:16 +01:00
Piotr Fusik cc13045ddd Move definitions out of engine_node.h. 
Change-Id: I18692a444663c11103f8991415b38000c633f24a
Signed-off-by: Piotr Fusik <piotr.fusik@intel.com>
 2019-03-25 13:22:55 +01:00
Maciej Dziuban 9bd4efbadf Enable dcFlush in addPipeControl 
Change-Id: I429009d8a8b1a5e209b7de7de30d69193fb7ef45
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2019-03-25 11:26:49 +01:00
Piotr Fusik 6f84496e78 Move duplicate code to the base class. 
Change-Id: I117a6e55fc51bf3ede3a69dbb8a874e71e74ddf9
Signed-off-by: Piotr Fusik <piotr.fusik@intel.com>
 2019-03-22 13:23:02 +01:00
Maciej Dziuban 33c07c875f Do not insert PipeControl WA or DC Flush when not needed 
Change-Id: I71030273708f243324a566232528bce00a0361df
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2019-03-22 12:37:27 +01:00
Stefanowski, Adam 16aee8cc46 [2/n] Move Hardware Info to Execution Environment 
- remove hwInfo from the csr functions where it was passed as a parameter,
now csr functions have access to hwInfo by Execution Environment

Change-Id: I756ae63d9728c9c963571147bab97f9e1c15797b
Signed-off-by: Adam Stefanowski <adam.stefanowski@intel.com>
 2019-03-22 10:08:26 +01:00
Liwei Wang ca4b47f7f4 Add support of GPU preemption (v1.00). 
https://github.com/intel/compute-runtime/pull/119

Change-Id: I3134d62b66751c8621b80002373a7a9b198e044e
 2019-03-22 08:49:11 +01:00
Piotr Fusik db9afd06cd Remove EngineInstanceT. 
Change-Id: I08543b5f4ef5e91e6beb8390d448e53702cd9dac
Signed-off-by: Piotr Fusik <piotr.fusik@intel.com>
 2019-03-20 10:56:22 +01:00
Piotr Fusik ddfb8a3ded Remove engineInfoTable. 
Change-Id: Ibf614a2182485c46d826cf35bd5a83f8a767b4bb
Signed-off-by: Piotr Fusik <piotr.fusik@intel.com>
 2019-03-20 08:55:22 +01:00
Milczarek, Slawomir 6919a63b51 AUB dump with HW mode to make command buffer resident 
Change-Id: Iab8aff75500bd804ea1002fd821d3540dca57b09
Signed-off-by: Milczarek, Slawomir <slawomir.milczarek@intel.com>
 2019-03-19 19:08:29 +01:00
Piotr Fusik 8c95b45e2f Remove engineIndex. 
Change-Id: I58f7cf2c394686409dc45e315d1b5af33db2a28e
Signed-off-by: Piotr Fusik <piotr.fusik@intel.com>
 2019-03-19 15:26:49 +01:00
Milczarek, Slawomir a3369a9679 AUB dump with HW mode to call pollForCompletion 
Change-Id: I9a4345c47394f19ecc63e2d598266e0889a6f8f0
Signed-off-by: Milczarek, Slawomir <slawomir.milczarek@intel.com>
 2019-03-18 17:59:05 +01:00
Piotr Fusik 429487fad0 Add constructor parameter to select low priority context. 
Change-Id: Ieb3fa008a2f1b54052e393516038c88f00944fa0
Signed-off-by: Piotr Fusik <piotr.fusik@intel.com>
 2019-03-18 15:09:59 +01:00
Milczarek, Slawomir 49c428d1ff AUB allocation dumps with pollForCompletion 
Change-Id: I610a56d7b8d1b6f1f0d6029ce6d2e62742885698
Signed-off-by: Milczarek, Slawomir <slawomir.milczarek@intel.com>
 2019-03-15 16:13:31 +01:00
Mateusz Jablonski 395e79fee8 Add support for many GMMs in Graphics Allocation 
Change-Id: I955b8dd50b502f91700c5529d0a0a291632aa157
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2019-03-13 15:44:45 +01:00
Piotr Fusik 2c524f94a4 Const correctness. 
Change-Id: I68be05e6c1c3c9c0dc33ba8252a0a5bbeefc06a4
Signed-off-by: Piotr Fusik <piotr.fusik@intel.com>
 2019-03-12 18:11:35 +01:00
Piotr Fusik ec72787b98 Remove MemoryManager::allocateGraphicsMemoryForHostPtr. 
Change-Id: I629f2299a183fc135135dbaff89216b966554a95
Signed-off-by: Piotr Fusik <piotr.fusik@intel.com>
 2019-03-12 15:51:32 +01:00
Milczarek, Slawomir 5fabd6e822 Fixed unlock resource in CSR HW with AUB dump mode 
Change-Id: I186eb06a3a7ed50c8a18a4d08f3b5d2e991d7fcd
Signed-off-by: Milczarek, Slawomir <slawomir.milczarek@intel.com>
 2019-03-12 12:46:48 +01:00
Stefanowski, Adam 341fcfc091 [1/n] Move Hardware Info to Execution Environment 
- remove gmm_environment_fixture
- remove hwInfo parameter from ExecutionEnvironment methods

Change-Id: Ieb0f9b5b89191fbbaf7676685c77644d42d69c26
Signed-off-by: Adam Stefanowski <adam.stefanowski@intel.com>
 2019-03-12 08:39:26 +01:00
Jobczyk, Lukasz 878fd43a1a Reverse logic of creating Memory Manager - part 1 
-remove CSR::createMemoryManager method
-create MM from platform before creating devices

Change-Id: I0e7f091c53b0e60ae7101e82a305253af626330e
Signed-off-by: Jobczyk, Lukasz <lukasz.jobczyk@intel.com>
 2019-03-08 09:47:29 +01:00
Mateusz Jablonski 5b22a50b28 Allow to create WddmAllocation with multiple handles 
Change-Id: Iac9df91b08a6ce610b985586dfb6b5f63dc668cb
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2019-03-07 13:29:00 +01:00
Dunajski, Bartosz f24b428cf7 Improve HardwareContextController creation 
Change-Id: Iba929a2b4fcd993b38dd674be578aad0a481e8de
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-03-06 12:31:20 +01:00
Mateusz Jablonski 7e3b6d2d90 Move definition of maxOsContextCount to engine_node.h 
Change-Id: I1ed252e9bbf382b449c7751061f9df42ded8b797
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2019-03-04 15:34:05 +01:00
Milczarek, Slawomir 0a927f8cdc Fixed CSR HW with AUB dump in AubStream mode 
Change-Id: I7ec8b9e681ec9727fd3a0d974bed4f65ee49f192
 2019-03-04 10:01:37 +01:00
Maciej Dziuban fb78677d8d Add function for ensuring command buffer has allocation with given size 
CommandStreamReceiver::ensureCommandBufferAllocation

Change-Id: Icb48c9beff4f087addda75e97b90d86e8481e7ff
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2019-03-04 09:39:00 +01:00
Mateusz Jablonski 6fb28dd828 Refactor GraphicsAllocation class 
move most of members to protected section
merge related members into structs

Change-Id: Ief2e092aa5e61ca6f13308f9d9b1937ea6c913b4
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2019-02-28 14:09:11 +01:00
Mrozek, Michal 6cb4732abe Move isl3Capable outside of Graphics Allocation. 
Change-Id: If9949f0d6d3405dcdeb221cbee1ce30307166c21
 2019-02-28 10:48:27 +01:00
Filip Hazubski 8b57d28116 clang-format: enable sorting includes 
Include files are now grouped and sorted in following order:
1. Header file of the class the current file implements
2. Project files
3. Third party files
4. Standard library

Change-Id: If31af05652184169f7fee1d7ad08f1b2ed602cf0
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2019-02-27 11:50:07 +01:00
Piotr Fusik d79f1afdc2 GraphicsAllocation constructor accepts allocationType and memoryPool. 
Change-Id: I5044ed26ba0cb0fc9ca7077595f5ab56353ab58c
 2019-02-26 13:29:25 +01:00
Jablonski, Mateusz 798137e4bb Add function to create devices bitfield based on allocation properties 
Change-Id: Ic70443b1fb6106186efcff318690e434dc1db625
Signed-off-by: Jablonski, Mateusz <mateusz.jablonski@intel.com>
 2019-02-26 12:07:09 +01:00
Milczarek, Slawomir 278bb83c56 Enable AUB sub-capture in AubStream captures (1/n) 
Change-Id: I6bd0605d06cf4dc3937e2dbeba7ed7037ae91476
 2019-02-21 22:40:40 +01:00
Hoppe, Mateusz 98db6147d8 Pass full aubfile name to initAubCenter when using TBX with AubDump 
Change-Id: I9184ce38cd9a066259bbf3a5b8a56694d4e309b4
 2019-02-21 12:39:10 +01:00
Mrozek, Michal 65d706bdc3 Add mm_pause in waiting loop. 
Change-Id: I9b7efd9869d91ff0f2bc289379ea49a7fd1013fa
 2019-02-21 12:09:36 +01:00
Mrozek, Michal 4139e88982 Allocate command buffers with proper allocation type. 
Change-Id: I912dd41cf68fa16ab481bb003c4f5ae63f1f04c4
 2019-02-20 12:52:45 +01:00
Maciej Dziuban 802eb37394 Revert "Pass HardwareInfo to AubHelper::checkPTEAddress()" 
Delete AubHelper::checkPTEAddress()

This reverts commit aa587b3bc5.

Change-Id: I32b90ce7dddfd2347586b2c47b9114b45cced8ab
 2019-02-19 11:51:35 +01:00
Maciej Dziuban aa587b3bc5 Pass HardwareInfo to AubHelper::checkPTEAddress() 
Change-Id: Ie5370b52eb79a8d118bd8033a335dc1319e93be1
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2019-02-19 08:37:58 +01:00
Jablonski, Mateusz 05d02a6fe7 Change DevicesBitfield type to struct 
Change-Id: I7a005b07737cdd21efc174a2ee2be0f6b7f9068d
Signed-off-by: Jablonski, Mateusz <mateusz.jablonski@intel.com>
 2019-02-18 13:57:50 +01:00
Hoppe, Mateusz 7f98db617c Move expectMemory/writeMemory methods to CSRSimulatedCommon 
- fix aub tests with --tbx option

Change-Id: I227449dd8614a8aada3eaa4f28ff6dcca7530956
 2019-02-18 10:01:32 +01:00
Jobczyk, Lukasz 2bcecf3e62 Align command buffers to 64KB 
Change-Id: Id1fbd7c6f1aee48c4b69ec305d5332cb0aa86507
Signed-off-by: Jobczyk, Lukasz <lukasz.jobczyk@intel.com>
 2019-02-18 09:58:45 +01:00
Dunajski, Bartosz af2dc200c5 Improve creating HwContextController 
Change-Id: If81ec18793a5af7fb58d66bb26a3bc476eaf94e0
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-02-18 08:57:35 +01:00
Zdanowicz, Zbigniew 51d34da7ec Add multiEngineQueue field to DispatchFlags and modify interfaces 
Change-Id: Iaa4754a22e9b88201aed7df01c7d6e5fd06c84a9
 2019-02-14 17:12:15 +01:00
Dunajski, Bartosz 958d931cd9 Allow to create HardwareContextController for multiple Devices 
Change-Id: Ib066c937809536196182ca87359c487570cc2e89
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-02-14 16:00:00 +01:00
Zdanowicz, Zbigniew 8e1e874a76 Refactor headers and reorder include order 
Change-Id: I6b341e2b37e569af7d741bfd7a63804c0b25a4c9
 2019-02-14 13:39:01 +01:00
Kamil Diedrich 76276d4c23 Add unit test for events 
Change-Id: I13d74626a244d234a5bbaff369ed09fb59d6e33f
 2019-02-14 12:42:44 +01:00
Hoppe, Mateusz 0f36265f55 Pass CsrType to initAubCenter 
- create AubManager with correct mode

Change-Id: I89c9c3c7edf553854b8b82788cec3dec53a62d79
 2019-02-13 09:48:05 +01:00
Jablonski, Mateusz db8c2bc57e Unify write memory in simulated csr when aub manager is available 
Change-Id: I28d0496b1b1fb973af4869e5626082142b5818dd
Signed-off-by: Jablonski, Mateusz <mateusz.jablonski@intel.com>
 2019-02-12 14:43:26 +01:00
Piotr Fusik f014f27370 Support the EnableLocalMemory debug variable in CSR. 
Change-Id: I902b06ab0b4a3df477d12804ba74b2727d8863f6
 2019-02-12 13:09:23 +01:00
Piotr Fusik 6882cf09c1 Avoid manual memory management. 
Change-Id: Id29d9ec366e338d519aad5353a15a44ecf5998e4
 2019-02-12 09:14:51 +01:00
Venevtsev, Igor 5e8fb19e5d Remove OCL Events concept from EnqueueOperation and dispatchWalker 
Change-Id: Iec55b0be673a2a40b9621212add224a33d4abc5d
 2019-02-12 08:46:18 +01:00
Dunajski, Bartosz 12da1b0616 Remove osContextCount parameter from GraphicsAllocation 
Change-Id: I23b650e97f107008b1122a1ecea48722fe129863
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-02-11 15:44:37 +01:00
Dunajski, Bartosz 75fe358e5d Add HardwareContextController to use multiple Contexts in single AubCsr 
Change-Id: Ica0f1c8c4e0f55310f4650788e468640406abf51
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-02-11 15:22:50 +01:00
Venevtsev, Igor 66e3f3c16c Remove OCL Events concept from command stream receiver 
Change-Id: I4d5a97b41efe601c92c2f3f33e9e24bb7d4fa3d2
 2019-02-08 15:02:40 +01:00
Chodor, Jaroslaw 6e0d04e25a Adding debug flag to disable DC flush in epilogue 
Change-Id: I1784be279ee9f837a0994997bec49c1925a68390
 2019-02-08 11:04:25 +01:00
Pawel Wilma 947794f166 Fix for setting context flags in AubDump 
Change-Id: Ia5fba17aac19fbcbfa6676557d1af0889f538b90
 2019-02-07 16:28:53 +01:00
Hoppe, Mateusz 4d9acf3352 Pass aubfile name to TbxCommandStreamReceiver::create and CSRWithAubDump 
Change-Id: Ib10c017ce4ed2a572815053dae3f517e0dfd9eb3
 2019-02-07 15:05:54 +01:00
Dunajski, Bartosz 4733ce32cf Move pollForCompletionMask for TBX to new method 
Change-Id: I1ce760ea185064ec9122eb5bf11d9b99c9c700e2
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-02-06 11:18:33 +01:00
Chodor, Jaroslaw 048098ce66 Refactor around cache flush after walker 
Change-Id: If5c7399df91bd076b684bcab83f50b4852e53429
 2019-02-06 11:12:55 +01:00
Maciej Dziuban ea8aa29e12 Change pollForCompletion() insertion locations 
Poll is done on:
- Aub CSR destruction
- expectMemory
- blocking calls

Poll is not done on flush

Change-Id: I1a776a932cb608c01f0de249e7cef26b00147f31
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2019-02-05 14:33:42 +01:00
Mateusz Jablonski ce4a75e121 Require same allocation type when obtaining reusable allocation 
Change-Id: I829301b83a6214bcfb4fc9f2692f21ae9a002456
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2019-02-01 16:10:28 +01:00
Filip Hazubski d30cc221df Update disabling caching for a resource 
Change-Id: I00eac0add01f75a1b82d04cf42652c15b776a457
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2019-02-01 10:50:21 +01:00
Dunajski, Bartosz 32ecd91401 Add parameters to HardwareContext read call 
Change-Id: Iba70d4b90d76199df6f0bf90c95adb7dc059c715
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-02-01 10:22:15 +01:00
Milczarek, Slawomir 6ef2822643 TBX CSR to call writeMemory on aubManager 
Change-Id: Ie10a30944e0c3a8e136816fa91ff501887a3d0d2
 2019-01-31 16:18:57 +01:00
Dunajski, Bartosz 783f408f9f Dont pass EngineType or Index as parameter in Aub/Tbx CSR 
Change-Id: I4583a09a9fa5dd5b0508132c86156c91aaf24c28
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-01-31 10:30:05 +01:00
Dunajski, Bartosz 666d8854f8 Remove setCsrProgrammingMode() method from AUB CSR 
Change-Id: I04f86e367d919ddd5afd98e9ed07bc505306bcc7
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-01-30 13:32:04 +01:00
Mateusz Jablonski f157943610 Allocate internal allocations through preferred pool 
Change-Id: Ib17431ceefc1eb72f86625e0998f679baaa7cb0d
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2019-01-30 11:18:15 +01:00
Venevtsev, Igor 303014582a Extend semaphore synchronization for different command stream receivers. 
Change-Id: Ic904b8c1e052adbb7b2ef82a6dec74ec69837f9f
 2019-01-30 09:33:41 +01:00
Milczarek, Slawomir b11e0825c9 AUB capture with support for allocation dumps 
Change-Id: I90a2b75043c33af92e4557be37cde4b9699582c6
 2019-01-28 21:20:08 +01:00
Zdanowicz, Zbigniew 72da161769 Add function to detect conditions to reset CSR 
Change-Id: I76d21eee26e22e841670180392c1b9262f6b59e1
 2019-01-28 17:00:00 +01:00
Dunajski, Bartosz c878590162 Remove EngineInstance parameter from pollForCompletion call 
Change-Id: I07652db2de656032cdb3452239b671edbe876b75
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-01-28 16:49:25 +01:00
Maciej Dziuban 5c66211537 Extract mask and value for pollForCompletion in AubCsr from pollForCompletion 
Change-Id: Ice43f5d57ff7281735d002d389255abe4135feec
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2019-01-27 13:50:31 +01:00
Mateusz Jablonski f332bf369e Set allocation's lock state only in lockResource and unlockResource methods 
Change-Id: I60f35801287166f5bdb0dfcd31ff0118c56ec22a
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2019-01-24 15:15:27 +01:00
Milczarek, Slawomir b2fe74ca9d AUB capture with writeMemory on aubManager 
Change-Id: Ie954b0d0f72b093f12ef33c93af5a3dc845559dc
 2019-01-23 13:54:28 +01:00
Milczarek, Slawomir 21f855b719 AubStream update (1/n) 
Change-Id: I6579e7af2015493490c5edcc413dcb2e6c804b9f
 2019-01-22 12:19:21 +01:00
Zdanowicz, Zbigniew 158f200476 Add HW commands const definitions 
Change-Id: If2e9d7f7f707b7b8c7bd8dbd3853ab3b6dad0c9a
 2019-01-18 12:13:25 +01:00
Pawel Wilma 9036882d11 Refactoring of additional MMIO registers in AubDump 
Change-Id: I97c0cc25aa24c6abcff4ba7469d6a6e3f0c12b86
 2019-01-16 11:16:54 +01:00
Zdanowicz, Zbigniew f18f9a5f88 Use queue command buffer to program media sampler at submit 
Change-Id: I7cc410a7432564b5f15dbb6943f48b577dfa6936
 2019-01-15 15:45:44 +01:00
Dunajski, Bartosz 1de0bda212 Initialize HardwareContext with valid deviceIndex and engineIndex 
Change-Id: I8848936340e8f4b33ac5ed5d0ae85d9f580171ca
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-01-15 15:33:42 +01:00
Mateusz Jablonski 06600f169b Define GPGPU engines per gen 
Change-Id: Ie0e565d11184c5355b5bf09f5b10a567deb5c106
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2019-01-15 12:05:19 +01:00
Zdanowicz, Zbigniew 84d35c8951 Add media programming call at the end of command buffer 
Change-Id: Ie60bc384c9385071aa77d2516e1d3649298a1233
 2019-01-15 11:35:58 +01:00
Filip Hazubski ec03210687 Update clEnqueueVerifyMemory 
- return success also for non aub CSRs

Change-Id: Iac7fdcd58e4b76a325ef67fd266f183d779ca956
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2019-01-14 14:37:09 +01:00
Dunajski, Bartosz 8ae7de7b0e Create HardwareContext only when osContext is available 
Change-Id: I8bcf2cb20f0e1e6b9da98b477f5be206407a7a57
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-01-13 15:12:07 +01:00
Dunajski, Bartosz 6ea2d8c2a9 Extract creating aub file name to separate function 
Change-Id: Ie0506f1847684cc3aabd8bee153c944b2f49bdb8
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-01-09 20:45:04 +01:00
Milczarek, Slawomir ea028d2a9b Moved TBX and AUB CSR members to SimulatedCommonHw CSR 
Change-Id: I4b49b0cf886c70127a9983dd1c9d7b15f7a45b7a
 2019-01-08 09:39:28 +01:00
Mateusz Jablonski aee69779fa Minor renaming in a scope of multi os context allocations: 
shareable -> multiOsContextCapable
resetTaskCount -> releaseUsageInOsContext
resetResidencyTaskCount -> releaseResidencyInOsContext
isUsedByContext -> isUsedByOsContext

Change-Id: If824246a0e393b962bd12f8c63d429a0fcfcda25
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2019-01-07 11:42:43 +01:00
Milczarek, Slawomir 9083761dce Add AUBFillBuffer test with concurrent execution on CS 
Change-Id: Ia01614a9763ff67d27ed68c46a5ae1b9f7dd0ee8
 2019-01-04 17:04:55 +01:00
Filip Hazubski 7e3884e22d Add clEnqueueVerifyMemory API 
Change-Id: I15a514b14b9efdaeb182c7abd98b8e236932d50f
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2019-01-04 08:30:02 +01:00
Venevtsev, Igor 73a63c7689 Fix Read/WriteBuffer for unaligned offsets 
Change-Id: I08d33e80243f41174f4629c8a611e286629d2e10
 2018-12-31 14:50:07 +01:00
Hoppe, Mateusz e195b0e380 Initialize TBX stream only when hardwareContext is not created 
Change-Id: I05d8c5c395cc342ea699333dd59966913f9a98df
 2018-12-31 12:14:55 +01:00
Artur Harasimiuk b2c1d68a91 Revert "Revert "Revert "Fix Read/WriteBuffer for unaligned offsets""" 
This reverts commit f6757c02a4.

Change-Id: I239528e7588dc9766b10a7ce7e517d6b2cdd6375
Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com>
 2018-12-21 08:57:45 +01:00
Venevtsev, Igor f6757c02a4 Revert "Revert "Fix Read/WriteBuffer for unaligned offsets"" 
This reverts commit 71f6524197.

Change-Id: I4f31fb6fa14fb5e3b8d8bf0a1745429bcdacd5af
 2018-12-20 14:16:07 +01:00
Milczarek, Slawomir 541ab5af50 TBX CSR with an option to create and operate on hardware context 
Change-Id: Ib5febc8e36e61195a5fcce91e1783117717ff6cb
 2018-12-20 10:59:53 +01:00
Kowalczuk, Jakub d3ac1be3aa Replacing typedef with using in common csr 
Change-Id: Idc4e7b1b0ffe577627feac4072888080decbd41b
 2018-12-19 14:31:35 +01:00
Kowalczuk, Jakub 53fb222fe7 Unify AUB and TBX CSRs part 3 
Move:
- getCsTraits
- initEngineMMIO
- submitLRCA
to common CSR

Change-Id: I8f172b017be2e8f7c54efc8420edd2671d99a927
 2018-12-19 12:02:24 +01:00
Mateusz Jablonski b138ff5750 Minor refactoring related to residency task count 
Change-Id: I49c9a5b37637e19fa12b7e6d91c352fb78bb117a
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2018-12-19 11:38:49 +01:00
Pawel Wilma 068582445d Move physical address allocator to CommandStreamReceiverSimulatedHw 
Change-Id: Ic3c397fe1a93eccae9235f1315a26ae31a3f5b60
Signed-off-by: Pawel Wilma <pawel.wilma@intel.com>
 2018-12-19 09:26:31 +01:00
Dunajski, Bartosz 403fedfb7b Improve EngineInstance usage in Aub CSR 
Change-Id: I9097f7cc8c930fcf531744af9bddfa38b2c5e1da
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-12-18 12:11:00 +01:00
Mateusz Jablonski 8ec072d39c Simplify Memory Manager API [3/4] 
- remove method allocateGraphicsMemory(size_t size)
- pass allocation type in allocation properties
- set allocation type in allocateGraphicsMemoryInPreferredPool

Change-Id: Ia9296d0ab2f711b7d78aff615cb56b3a246b60ec
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2018-12-17 10:42:16 +01:00
Zdunowski, Piotr 0ca8ee7f30 Additional programming for source level debugger. 
- always program STATE_BASE_ADDRESS and STATE_SIP

Change-Id: Iea6327d062b4efdddd3b0060d3105b29745b9cba
 2018-12-14 11:30:54 +01:00
Dunajski, Bartosz 010e1a4738 VFE state programming cleanup 
Change-Id: I38fb47b00211a1d28244369ac417427ada145f61
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-12-13 17:44:40 +01:00
Mateusz Jablonski a6be6533ea Simplify Memory Manager API [2/n] 
- make AllocationData a protected structure
- use AllocationProperties instead of AllocationFlags
- refactor methods: allocateGraphicsMemory64kb, allocateGraphicsMemoryForSVM
- call AllocateGraphicsMemoryInPreferredPool in AllocateGraphicsMemory
  where there is no host ptr

Change-Id: Ie9ca47b1bccacd00f8486e7d1bf6fb3985e5cb12
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2018-12-11 13:12:00 +01:00
Kowalczuk, Jakub 9e53740130 Unify AUB and TBX CSRs part 2 
Move:
- getEngineIndexFromInstance
- getEngineIndex
to common CSR
Unification of arguments of some AUB/TBX methods

Change-Id: I46f25e16aa9fbad10ffc3890cc31915fa5edb1d9
 2018-12-10 12:23:27 +01:00
Hoppe, Mateusz e88548a251 Do not call submit on HardwareContext with zero-sized command buffer 
Change-Id: I53b9233b30f58e2fcb354142eb1186a20c834d62
 2018-12-10 10:02:46 +01:00
Dunajski, Bartosz 7f7808fb71 Select RCS1 for low priority CommandQueue 
Change-Id: I1f86b0afedb8f6e76fee896c2751a0bf196996d7
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-12-07 13:18:13 +01:00
Kowalczuk, Jakub 2dd71c2e25 Unify AUB and TBX CSRs part 1 
Move:
- getPPGTTAdditionalBits
- getGTTData
- getMemoryBankForGtt
to common CSR

Change-Id: I7c9616bc18a4cffb0673d7964af168ea3ddad2dd
 2018-12-07 09:24:54 +01:00
Mrozek, Michal 3719c7a767 Limit AUB SSH size to 64KB. 
Change-Id: I1a23aa2a253a93ed9633ab7fda0a6180050add83
 2018-12-06 17:36:49 +01:00
Mateusz Jablonski c8748b77a0 Simplify memory manager API [1/n] 
pass struct with properties to allocate graphics memory methods:
for protected methods use AllocationData
for public methods use AllocationProperties

Change-Id: Ie1c3cb6b5e330bc4adac2ca8b0bf02d30ec76065
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2018-12-06 15:09:25 +01:00
Maciej Dziuban 43fd32b3ad Enable aggregating command buffers with multiple osContexts 
- Store inspectionId for each osContext in GraphicsAllocation
- Pass osContextId to aggregateCommandBuffer and use it to select inspectionId

Change-Id: I2c377ad7577a8c882cc89c1205430cb581c2c0d5
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2018-12-06 10:11:07 +01:00
Pawel Wilma fe228ea5f7 Use GPU address in calculateNewGSH() 
Change-Id: I82add7aab4b26444f288a9c4dbce6328578a03d2
Signed-off-by: Pawel Wilma <pawel.wilma@intel.com>
 2018-12-05 10:33:35 +01:00
Milczarek, Slawomir 1bf98c7f80 Added support for expectMemory call from aub stream 
Change-Id: I8acf27eff8b2f38dcb8d9873e03c35bfab6f3298
 2018-12-04 12:03:36 -08:00
Dunajski, Bartosz b728526c4e Allow Device creating multiple CSRs [8/n] 
Use OsContextId instead of DeviceIndex for residency

Change-Id: Ib2367b32b5b3e320252d8254f1042f1c3d497068
 2018-12-04 15:36:59 +01:00
Mrozek, Michal 38fb8cd9c3 Refactor mmio programming. 
Change-Id: I2ec9294b800adcd537f03d69fd4ba4e015e8db7a
 2018-12-03 14:40:00 +01:00
Milczarek, Slawomir 80fa9d0260 Decouple aub stream memoryFree from makeNonResident 
Change-Id: Ic4614441aff131356ce3ec03330d7dc42b5b0ecb
 2018-11-29 08:28:21 -08:00
Zdanowicz, Zbigniew 7dbd0ea4f3 Move Scratch Space functionality to dedicated class 
Change-Id: Ic7655c4b971513961aba6823478a139ffc943466
 2018-11-29 11:55:56 +01:00
Dunajski, Bartosz d39309adf2 Use const values instead of constexpr from std::array::size() 
Change-Id: I705888b77801cd32487c4d53fc320cf839ec9079
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-11-28 22:57:33 +01:00
Milczarek, Slawomir 42ba6c10fc AUB CSR with an option to create and operate on hardware context 
Change-Id: If8e060ef184d6c077e09741144ef870c96360645
 2018-11-28 09:24:18 -08:00
Dunajski, Bartosz 3e7fa3754c Replicate OsContext to CommandStreamReceiverWithAUBDump 
Change-Id: If2f83d01d58891209c6cf82f47e5634f8d348de4
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-11-28 13:11:52 +01:00
Dunajski, Bartosz b0de2a11d2 Set OsContext as reference 
Change-Id: I3b682fabde9c2ddb2c33a95aef77bf6ce400a21f
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-11-27 15:32:14 +01:00
Piotr Fusik 87bb6afa56 Move stamps allocators from memory manager to CSR. 
Change-Id: Ib399e462cdddad89fcc470df4c4f0f5e4591a6b2
 2018-11-27 14:52:06 +01:00
Dunajski, Bartosz 2d77b86e70 Allow Device creating multiple CSRs [5/n] 
- Move Engine type to OsContext
- Move OsContext to CSR
- Improve EngineMapper logic
- CompletionStamp cleanup

Change-Id: I935cb7169c8c48cd09837e20e3da06f6dd3437b9
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-11-27 14:25:04 +01:00
Pawel Wilma 71f6524197 Revert "Fix Read/WriteBuffer for unaligned offsets" 
This reverts commit 6ea863e440.

Change-Id: Ib58cfe4cffc022b1514c42131914eb2fe64fcbe0
 2018-11-27 12:35:03 +01:00
Milczarek, Slawomir 3b8ff44d55 AUB CSR with a separate function to write memory 
Move common code related to writing memory to dedicated function

Change-Id: I4ac8ec779cb40146bd27b8e40728d81d3b5b4276
 2018-11-26 20:21:19 -08:00
Dunajski, Bartosz 7781089740 Allow Device creating multiple CSRs [4/n] 
- Introduce additional RCS engine
- Set fixed size for Engines array

Change-Id: I06533a425684b64214f956783b07877e6157935b
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-11-26 09:40:44 +01:00
Milczarek, Slawomir cd5f85052e AUB CSR with a separate function to submit batch buffer 
Move code related to batch buffer submission from flush to dedicated function
Add parameter to pass aub file name from AubCenter to AubManager

Change-Id: I20abb3c8bd92114b3bc9caa2a6291dc1bbddad2a
 2018-11-25 18:02:25 -08:00
Mrozek, Michal 61e7ae9280 Refactor pipe control post sync programming. 
Change-Id: I81f4840345494c6d32679e29faaff786677cb4b0
 2018-11-23 11:42:32 +01:00
Mateusz Jablonski 352450adaa Pass number of os contexts to Graphics Allocation constructor 
Mark unshareable allocations

Change-Id: Ie745dc639d8c6b01e2275d29ee1fb4c6343df2bc
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2018-11-21 17:38:02 +01:00
Pawel Wilma 2f15ca0508 Add AUB registry key for additional MMIO registers list 
Change-Id: Ib478e91d8df21c48f83bfa97a4ea72c41c2f065d
Signed-off-by: Pawel Wilma <pawel.wilma@intel.com>
 2018-11-21 16:41:44 +01:00
Dunajski, Bartosz d6870a896b Reduce tag pool size to 1 for AUBs 
Change-Id: I3a3513250b10e899795e149bff2739193a725f84
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-11-20 11:42:32 +01:00
Venevtsev, Igor 6ea863e440 Fix Read/WriteBuffer for unaligned offsets 
Change-Id: Ia8daff3e95bd724a9f678eb471dbb44a66cc0bc7
 2018-11-20 09:25:12 +01:00
Dunajski, Bartosz ac15e7f3ac Unify expectMemory in Aubs and introduce expectMemoryNotEqual 
Change-Id: Ifd52f2d3ad3badf6ea9dac2c2b9873a40efa8482
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-11-19 10:39:45 +01:00
Mateusz Jablonski 66492a53a4 Change type of residency task count to uint32_t 
Move definitions of objectNotUsed and objectNotResident to GraphicsAllocation

Change-Id: I2aec604a865cc6c975e9d1121028cbdd35c0b18a
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2018-11-16 16:04:48 +01:00
Mrozek, Michal 08424d798f Enable power saving mode for queues created with throttle hint low. 
- When queue is created with throttle hint low it should be power conservative
- With this change whenever queues with low throttle setting requests wait
for GPU completion, such wait will be handled in power conservative manner.
- Whenever GPU is not completed, waiting thread will be put to sleep and will
for GPU completion that triggers the wake up interrupt.

Change-Id: I9f34872a38ab9f5952f9d9623ea43503fc3dd587
 2018-11-16 15:20:31 +01:00
Dunajski, Bartosz 9345b25352 AUB services update 
Change-Id: I451794f78fa0379c3f5f8cd7a913f350d0decb3c
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-11-16 11:08:47 +01:00
Mrozek, Michal b102f8556e Add missing makeResident call on debug surface. 
Change-Id: I9c2d1bcf608dbfc71a3859b237e249d41810c153
 2018-11-16 09:38:55 +01:00
Mateusz Jablonski 0e0a280803 Create structure UsageInfo for task count and residency task count 
Change-Id: I0899c88d9e567a09ba46461ae69cf6c80f713e67
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2018-11-15 14:07:05 +01:00