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11601 Commits

Author SHA1 Message Date
Pawel Cieslak e90e145a28 Update infra 
Signed-off-by: Pawel Cieslak <pawel.cieslak@intel.com>
 2022-11-02 13:30:10 +01:00
Cencelewska, Katarzyna a094a9bafe Fix convert timestamp to use double values 
to avoid division by 0
Resolves: HSD-18025033373
Signed-off-by: Cencelewska, Katarzyna <katarzyna.cencelewska@intel.com>
 2022-11-02 13:02:45 +01:00
Maciej Plewka 7f38c5e633 Revert "Return error code for unsuported image arg in gen12lp" 
This reverts commit bbc31e6aac


Signed-off-by: Maciej Plewka maciej.plewka@intel.com
 2022-11-02 12:57:16 +01:00
Lukasz Jobczyk 0353116964 Do not flush dc when encode compute mode on tgl and later 
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2022-11-02 12:57:00 +01:00
Maciej Plewka ff01b9361e Return error code when there is no space for scratch/private 
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
 2022-11-02 11:55:18 +01:00
Mateusz Jablonski 1131a6a4c1 Update i915 prelim headers to v2.0-rc15 
https://github.com/intel-gpu/drm-uapi-helper/releases/tag/v2.0-rc15

Related-To: NEO-7457
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2022-11-02 11:30:54 +01:00
Mateusz Jablonski 5d3b665ea0 ULT: Move Xe product specific tests shared 
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2022-11-02 11:30:21 +01:00
Mateusz Jablonski 0f8489b5f8 ULT: Move product specific tests to shared (gen9-gen12lp) 
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2022-11-02 11:30:04 +01:00
Matias Cabral 0772d32a76 Windows debugger access to SLM 
Resolves: NEO-7382

Signed-off-by: Matias Cabral <matias.a.cabral@intel.com>
 2022-11-02 10:58:09 +01:00
Mateusz Jablonski 51fa04fc60 L0: Add experimental extensions for wait and write on memory 
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2022-11-02 10:47:39 +01:00
Yates, Brandon f067145137 L0debug - Canonize SBA in single address space mode 
Signed-off-by: Yates, Brandon <brandon.yates@intel.com>
 2022-11-02 09:37:12 +01:00
Mateusz Jablonski 9816f815f3 Propagate exec buffer error to L0 API level on Xe HPC 
This change makes that drm file is opened in nonblocking mode for prelim
kernels. In such case when calling exec buffer ioctl and get
EAGAIN (aka EWOULDBLOCK) we may return error to API level

Related-To: NEO-7144

Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2022-10-31 10:09:13 +01:00
Dunajski, Bartosz a9ba581d97 Always use unrecoverable drm context 
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2022-10-31 10:08:57 +01:00
Compute-Runtime-Validation 308f54e4eb Revert "Apply basic WA only for multi CCS on DG2" 
This reverts commit 5a2f00d295.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2022-10-31 03:27:29 +01:00
Compute-Runtime-Validation 040d6693cd Revert "Always use unrecoverable drm context" 
This reverts commit 343371faad.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2022-10-29 19:28:04 +02:00
Compute-Runtime-Validation 33d9c5979a Revert "Enable flush task for immediate command lists" 
This reverts commit 95c3ef28fc.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2022-10-29 15:48:44 +02:00
Ezhilsivam Shanmugam 0a7166d10e Implement FanGetConfig sysman API for windows 
Signed-off-by: Ezhilsivam Shanmugam <ezhilsivam.shanmugam@intel.com>
 2022-10-29 00:55:11 +02:00
Aravind Gopalakrishnan 95c3ef28fc Enable flush task for immediate command lists 
Previously enabled for: DG2, PVC.
With this commit enabling for Gen9 onwards.

Related-To: LOCI-3379

Signed-off-by: Aravind Gopalakrishnan <aravind.gopalakrishnan@intel.com>
 2022-10-28 19:17:42 +02:00
Joshua Santosh Ranjan 436ec1234b Sysman Add support for auxiliary bus for fabric Ras 
Related-To: LOCI-3531

Signed-off-by: Joshua Santosh Ranjan <joshua.santosh.ranjan@intel.com>
 2022-10-28 18:18:33 +02:00
Katarzyna Cencelewska bbd75959d5 Calculate CS timestamp based on OA timestamp and frequencies ratio 
Changes affect cores up to xe_hpg

Resolves: NEO-7346
Signed-off-by: Katarzyna Cencelewska <katarzyna.cencelewska@intel.com>
 2022-10-28 16:26:53 +02:00
Dunajski, Bartosz 343371faad Always use unrecoverable drm context 
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2022-10-28 16:13:15 +02:00
Lukasz Jobczyk 5a2f00d295 Apply basic WA only for multi CCS on DG2 
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2022-10-28 11:34:52 +02:00
Mateusz Jablonski f45d1029e3 CMake: adjust testing flags based on TESTS_* flags 
Auto-enable core tests based on TESTS_<platform> flag
Skip L0 unit tests when no supported core family is tested

Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2022-10-28 10:32:22 +02:00
Krystian Chmielewski 70da7c4b65 feat(zebin): add support for sync buffer 
Adds support in zebinary for sync buffer required for global barriers.

Signed-off-by: Krystian Chmielewski <krystian.chmielewski@intel.com>
 2022-10-28 08:59:28 +02:00
Compute-Runtime-Validation d8a66cd14d Revert "image create check" 
This reverts commit 333906e278.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2022-10-28 03:25:32 +02:00
Szymon Morek 3804b07fe8 Check for nullptr before dereference 
Signed-off-by: Szymon Morek <szymon.morek@intel.com>
 2022-10-27 18:04:24 +02:00
Dominik Dabek 526ba1bde5 Fix l0 kernel set arg buffer caching 
Fix for incorrect cache hit if alloc id was uninitialized
and allocations counter was the same.

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
 2022-10-27 17:25:10 +02:00
Dominik Dabek 6cf8b4daca Correct tg dispatch size heuristic 
Multiply available thread count by tile count
if implicit scaling is used

Related-To: NEO-6989

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
 2022-10-27 17:24:53 +02:00
Artur Harasimiuk e0c7e2e130 fix package dependencies for LevelZero 
Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com>
 2022-10-27 16:33:22 +02:00
Luzynski, Sebastian Jozef 67ffe0533f Remove unused variable in allocateGlobalsSurface 
Signed-off-by: Luzynski, Sebastian Jozef <sebastian.jozef.luzynski@intel.com>
 2022-10-27 16:18:27 +02:00
Lukasz Jobczyk 1f9a5b878f Configure env variables when CAL enabled 
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2022-10-27 16:18:11 +02:00
Mateusz Jablonski a7c480b19b Brand string update for Flex platforms 
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2022-10-27 15:22:14 +02:00
Mateusz Jablonski 2df001327a Unify meaning of RebuildPrecompiledKernels across OCL and L0 APIs 
Resolves: NEO-7364
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2022-10-27 15:17:24 +02:00
Zbigniew Zdanowicz daa26701e4 Use pipe control to signal event of multi kernel operations 
Related-To: NEO-7434

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2022-10-27 15:08:09 +02:00
ocldev 79386cd7f7 gmmlib revision update 
Signed-off-by: ocldev <ocldev@intel.com>
 2022-10-27 13:41:55 +02:00
Dunajski, Bartosz 06a647a5e9 Set SkipResourceCleanup in TBX mode 
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2022-10-27 12:23:08 +02:00
Dunajski, Bartosz 7ff37cd5fd Ftr/WA flags cleanup 
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2022-10-26 12:11:31 +02:00
Joshua Santosh Ranjan 2b5705ddfd Corrected variable names in ULT 
Signed-off-by: Joshua Santosh Ranjan <joshua.santosh.ranjan@intel.com>
 2022-10-26 12:03:38 +02:00
Mateusz Jablonski 7c525ba33c Correct formatting in file with device ids 
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2022-10-26 11:03:25 +02:00
Dominik Dabek 040dd8302c Disable adjusting tg dispatch size on pvc 
Disable only on asymmetric SKUs

Disabling because of issues with specaccel

Related-To: NEO-6989

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
 2022-10-26 09:56:31 +02:00
Mateusz Jablonski 26144d38a6 Printf handler: ensure that long format uses always 64 bit integers 
Related-To: NEO-7384
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2022-10-26 09:41:05 +02:00
Jaime A Arteaga Molina 5446b9ca0d Update Fabric Latency to Edge Properties (2) 
- Only initialize vertexes when queried.
- Return also bandwidth when calling PRELIM_DRM_I915_QUERY_FABRIC_INFO.

Related-To: LOCI-3464

Signed-off-by: Jaime A Arteaga Molina <jaime.a.arteaga.molina@intel.com>
 2022-10-26 08:15:35 +02:00
Compute-Runtime-Validation 638aba45a0 Revert "Set SkipResourceCleanup in TBX mode" 
This reverts commit cb83c1d935.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2022-10-26 07:09:29 +02:00
John Falkowski 333906e278 image create check 
Signed-off-by: John Falkowski <john.falkowski@intel.com>
 2022-10-25 18:33:37 +02:00
Compute-Runtime-Validation 0eb090a451 Revert "Printf handler: enure that long format uses always 64 bit integers" 
This reverts commit 4d3a017d9b.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2022-10-25 17:00:53 +02:00
Dunajski, Bartosz fad7f10b7b Remove fallback path for PAT index programming 
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2022-10-25 16:24:43 +02:00
Mateusz Jablonski e0a0868bff infra update 
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2022-10-25 16:24:22 +02:00
Dunajski, Bartosz cb83c1d935 Set SkipResourceCleanup in TBX mode 
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2022-10-25 14:31:35 +02:00
Szymon Morek f5355912ab Synchronize before CPU memcpy after wait on events 
Currently we track dependencies only in append
barrier call. This commit adds tracking for
append waitOnEvents so CPU memcpy correctly
waits for such dependency.

Signed-off-by: Szymon Morek <szymon.morek@intel.com>
 2022-10-25 11:51:21 +02:00
Mateusz Hoppe 8980b2b817 Ocloc: Remove unneeded code from generated cpp file 
Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
 2022-10-25 11:21:09 +02:00