Commit Graph

10937 Commits

Author SHA1 Message Date
f774deffa7 Zebin: ZEBinary ELF versioning in intelNoteGT section
This commit adds support for new ZEBinary ELF versioning mechanism.
- Add new IntelGTSecionType: ZebinVersion
- Add mechanism for retrieving zeInfo/elf version in intel.notegt
section
Related-To: NEO-7190
Signed-off-by: Kacper Nowak <kacper.nowak@intel.com>
2022-08-09 17:58:12 +02:00
eb0e83900e infra update
Related-To: NEO-5615
Signed-off-by: Grzegorz Choinski <grzegorz.choinski@intel.com>
2022-08-09 17:43:23 +02:00
daf1bd4501 Refactor: pass properties by const reference instead of by value
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2022-08-09 15:55:07 +02:00
3d9b5d441a Add UNRECOVERABLE_IF to avoid nullptr dereference
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2022-08-09 15:44:49 +02:00
900c9ffc42 L0 Debug Win: device Thread Id remapping for run control
Related-To: NEO-6971

Signed-off-by: Jitendra Sharma <jitendra.sharma@intel.com>
2022-08-09 15:15:50 +02:00
c3d40c210f ULT refactor: remove i915 header dependency from drm_mock.h/drm_query_mock.h
Related-To: NEO-6999
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2022-08-09 15:04:22 +02:00
5eca3b3852 Add missing queryImageParams after import image on windows path
When importFromNTHandle is called we need to refresh imgInfo data
that contains e.g. offset for UV plane.

Related-To: NEO-7250
Signed-off-by: Kamil Diedrich <kamil.diedrich@intel.com>
2022-08-09 14:59:44 +02:00
b39be32e20 Add member for handling additional adapterInfo fields
Signed-off-by: Kamil Diedrich <kamil.diedrich@intel.com>
2022-08-09 14:11:05 +02:00
d8cd596baf Add device ID for ADLS (0xA78B)
Related-To: NEO-7240

Signed-off-by: Neumann, Marta <marta.neumann@intel.com>
2022-08-09 13:55:30 +02:00
90d15cdc8c Update infra
Signed-off-by: Pawel Cieslak <pawel.cieslak@intel.com>
2022-08-09 13:50:15 +02:00
2f12e50b83 Explicitly initialize DispatchInfo members
Explicitly initialize objects:
- DispatchInfo::dispatchInitCommands
- DispatchInfo::dispatchEpilogueCommands

Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
2022-08-09 12:51:41 +02:00
e7cca25894 CMake: don't include shared/test/unit_test when shared tests are skipped 1/n
Related-To: NEO-6524
Signed-off-by: Warchulski, Jaroslaw <jaroslaw.warchulski@intel.com>
2022-08-09 11:41:09 +02:00
89264b99e5 cmake: find metrics discovery with libigdmd name
Related-To: NEO-5615
Signed-off-by: Grzegorz Choinski <grzegorz.choinski@intel.com>
2022-08-09 11:15:37 +02:00
6450be2414 Remove redundant device and revision id members from Drm class
Drm should set these values directly to hw info in root device environment

Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2022-08-09 10:13:32 +02:00
0225423e94 Add raytracing to list of supported L0 extensions.
Related-To: LOCI-3333

Signed-off-by: Jim Snow <jim.m.snow@intel.com>
2022-08-09 02:50:17 +02:00
762aebaea3 Make drm_neo.cpp independent on i915 headers
Related-To: NEO-6999
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2022-08-08 22:13:22 +02:00
3b3d40252e Revert "Limit number of CCS engines on PVC"
This reverts commit 8f8370be32.

Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
22.33.23949
2022-08-08 18:40:24 +02:00
ed0c36117e Apply heuristics when setting TG dispatch size on XE_HPC_CORE
The default TG dispatch size can be changed
to a better value based on number of threads in TG or
currently available amount of threads on GPU.
Decision on what TG dispatch size should be are based on
implemented heuristics.

Signed-off-by: Rafal Maziejuk <rafal.maziejuk@intel.com>
Related-To: NEO-6989
2022-08-08 16:43:10 +02:00
52133e61ce L0Debug - per tile isa and modules in debug session
Related-To: NEO-5784

Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
2022-08-08 15:46:56 +02:00
eb8cd33dc6 Do not flush tag update if already flushed
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2022-08-08 14:11:42 +02:00
8f8370be32 Limit number of CCS engines on PVC
Expose only one CCS engine

Related-To: NEO-7195
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2022-08-08 14:05:35 +02:00
6aec85ff54 igsc revision update
Signed-off-by: ocldev <ocldev@intel.com>
2022-08-08 12:47:13 +02:00
892c7718e4 Reenable bindless aub test
Related-To: NEO-6877

Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
2022-08-08 12:26:29 +02:00
62ca2e91ec dependencies update
Signed-off-by: ocldev <ocldev@intel.com>
2022-08-08 12:06:03 +02:00
7c174a09aa Fix CMakeLists formatting
Signed-off-by: Pawel Cieslak <pawel.cieslak@intel.com>
2022-08-08 11:14:16 +02:00
505e0b7059 set correct private scratch size for immediate command lists
Related-To: NEO-7187

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2022-08-08 09:43:19 +02:00
50046c473b Fix use of NodeOrdinal in Level Zero
Adjust command queue ordinal when creating the list.

Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
2022-08-08 09:12:00 +02:00
b38c750cc4 Revert "Add finish before command queue is released"
This reverts commit 50fae92ea2.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
22.32.23937
2022-08-05 19:25:23 +02:00
1f21d34fd3 Add experimental CL_MEM_DEVICE_ID_INTEL property for memory object creation
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
2022-08-05 14:54:30 +02:00
f833dc0291 Add sysman Firmware support for windows
Related-To: LOCI-3226

Signed-off-by: Mayank Raghuwanshi <mayank.raghuwanshi@intel.com>
2022-08-05 13:22:11 +02:00
ba244634b3 Set the default value of the controller timeout divisor to 1
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2022-08-05 09:52:58 +02:00
8b5c567bea Remove wait on user fence during cmdlist destroy/reset
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
Related-To: NEO-7156
2022-08-05 09:24:04 +02:00
c694ccd637 Add tweaks to scratch level zero black box test
Make synchronous mode default
Add asynchronous mode switch for both immediate and regular command lists
Show all invalid data in verbose mode
Add switch for allocation flag
Do not use uncached host allocations as default
Initialize local variables

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2022-08-05 07:52:29 +02:00
d7c43d022a Improve GtPin init error status reporting
Related-To: LOCI-1286

Signed-off-by: davidoli <david.olien@intel.com>
2022-08-05 04:18:07 +02:00
a931f1654e Add new enum values to DrmIoctl
Signed-off-by: Philippe Lecluse <philippe.lecluse@intel.com>
2022-08-05 00:40:21 +02:00
ada9b5d4a9 Handle if L0 Event Memory is Shareable
- Properly check for IPC event handle flag to determine if the event
pool memory is sharable between processes.
- Given Host Visible Event Pool, a check is done to determine if the
Host memory can be shared between the processes.
- Enabled handling if Event Host Memory is shareable for DRM
- If Event Pool Memory is Not shareable, then retrieving the IPC Event
Pool Handle returns unsupported.

Signed-off-by: Neil R Spruit <neil.r.spruit@intel.com>
2022-08-05 00:11:05 +02:00
6b4375efcd Re-enable use case where application allocates own RTDispatchGlobals.
Implementation was assuming that if HasRTCalls is true then the
RTDispatchGlobals patch token is also valid, but that isn't the case
when the application is using its own RTDispatchGlobals instead of the
one provided by the L0 UMD.

Related-To: LOCI-3323

Signed-off-by: Jim Snow <jim.m.snow@intel.com>
2022-08-04 23:19:43 +02:00
61510e9a92 Revert optimization of gpgpu csr's mutex lock in the enqueue blit
optimization available under flag
ForceCsrLockInBcsEnqueueOnlyForGpgpuSubmission

Related-To: NEO-7011
Signed-off-by: Cencelewska, Katarzyna <katarzyna.cencelewska@intel.com>
2022-08-04 16:42:50 +02:00
19cac22760 Revert "Add prelim ULTs for performance"
This reverts commit 4967e053b8.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
2022-08-04 12:27:20 +02:00
020239102b Add immediate command list execution to scratch black box test
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2022-08-04 11:56:10 +02:00
77103bf724 Add improvements to level zero black box tests
destroy event and event pool resources
destroy kernel and module resources
pass context handle as reference
change function variable's name and comments to kernel
change variable names to more appropriate
drop driver from function argument in image test

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2022-08-04 11:35:42 +02:00
601ace6a25 Add unit test for append memory prefetch for regular command list
Related-To: NEO-6740

Signed-off-by: Milczarek, Slawomir <slawomir.milczarek@intel.com>
2022-08-04 10:32:08 +02:00
3de620af15 create library with shared functions between black box tests
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2022-08-04 10:27:07 +02:00
3a31caf44a Revert "Add member for handling additional adapterInfo fields"
This reverts commit aafbbf54db.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
2022-08-04 09:36:36 +02:00
140e744f4b Improve safety of pattern reading in appendMemoryFill()
Related-To: NEO-7233
Signed-off-by: Wrobel, Patryk <patryk.wrobel@intel.com>
2022-08-04 00:30:05 +02:00
1898a82317 Defer Sysman Scheduler and Memory Initialization
With this change, init for sysman Scheduler/Memory API would
not be done during zeInit.
init and thereby Scheduler/Memory API handle creation would be done
only when user explicitly requests to enumerate handles
using zesDeviceEnumSchedulers/zesDeviceEnumMemory.

Related-To: LOCI-3127

Signed-off-by: Kulkarni, Ashwin Kumar <ashwin.kumar.kulkarni@intel.com>
2022-08-03 23:35:54 +02:00
4967e053b8 Add prelim ULTs for performance
Remove gmock usage from performance UTLs.

Related-To: LOCI-3218

Signed-off-by: Bellekallu Rajkiran <bellekallu.rajkiran@intel.com>
2022-08-03 21:06:46 +02:00
2a902cb646 infra update
Related-To: NEO-5615

Signed-off-by: Choinski, Grzegorz <grzegorz.choinski@intel.com>
2022-08-03 20:59:08 +02:00
98d776867f Add initial support for KernelArgsBuffer allocation
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2022-08-03 20:28:21 +02:00
d3796b2b2d igc revision update
Signed-off-by: ocldev <ocldev@intel.com>
2022-08-03 16:18:36 +02:00