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https://github.com/intel/intel-graphics-compiler.git
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[vISA]: Update the W/A for the qword type instructions.
1) Must not use non-qword scalar broadcast when qword is present in any of the source or destination, instead must convert the non-qword scalar into a qword before doing a qword scalar broadcast. For example: mov (8|M0) r88.0<1>:q r2.0<0;1,0>:d => mov (1|M0) r3.0<1>:q r2.0<0;1,0>:d mov (8|M0) r88.0<1>:q r3.0<0;1,0>:q 2)Instructions with the following pattern must not be used - destination crosses GRF boundary with qword datatype, and none of the sources datatype is qword. For example: shl (16|M0) r11.0<1>:q r7.0<2;1,0>:d 2:w => shl (8|M0) r11.0<1>:q r7.0<2;1,0>:d 2:w shl (8|M8) r12.0<1>:q r8.0<2;1,0>:d 2:w
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@ -8333,3 +8333,9 @@ SPDX-License-Identifier: MIT
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"Workaround",
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WA_BUG_TYPE_UNKNOWN,
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WA_BUG_PERF_IMPACT_UNKNOWN, WA_COMPONENT_UNKNOWN)
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WA_DECLARE(
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Wa_16012725276,
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"Workaround",
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WA_BUG_TYPE_UNKNOWN,
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WA_BUG_PERF_IMPACT_UNKNOWN, WA_COMPONENT_UNKNOWN)
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@ -82,5 +82,10 @@ void InitPvc_XtHwWaTable(PWA_TABLE pWaTable, PSKU_FEATURE_TABLE pSkuTable, PWA_I
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PLATFORM_ALL,
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SI_WA_BETWEEN(iStepId_PVC_XT_ComputeTile, PVC_XT_GT_REV_ID_COMPUTETILE_A0, PVC_XT_GT_REV_ID_COMPUTETILE_B0));
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SI_WA_ENABLE(
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Wa_16012725276,
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"No Link Provided",
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"No HWSightingLink provided",
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PLATFORM_ALL,
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SI_WA_BETWEEN(iStepId_PVC_XT_ComputeTile, PVC_XT_GT_REV_ID_COMPUTETILE_A0, PVC_XT_GT_REV_ID_COMPUTETILE_B0));
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}
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@ -220,6 +220,10 @@ static const WA_TABLE *CreateVisaWaTable(TARGET_PLATFORM platform, Stepping step
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break;
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case Xe_PVCXT:
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VISA_WA_ENABLE(pWaTable, Wa_16013338947);
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if (step == Step_A)
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{
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VISA_WA_ENABLE(pWaTable, Wa_16012725276);
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}
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break;
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default:
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break;
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@ -3651,9 +3651,9 @@ bool HWConformity::fix64bInst(INST_LIST_ITER iter, G4_BB* bb)
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}
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}
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}
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}
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return false;
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}
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}
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return false;
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}
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//------------------------------------------------------------------------------
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//
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@ -5824,35 +5824,73 @@ void HWConformity::conformBB(G4_BB* bb)
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#endif
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}
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if (builder.getPlatform() == Xe_PVCXT) {
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for (auto I = bb->begin(), E = bb->end(); I != E;) {
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auto inst = *I;
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auto next = std::next(I);
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G4_DstRegRegion *dst = inst->getDst();
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bool crossGRFDst = dst && dst->isCrossGRFDst();
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if (crossGRFDst && IS_QTYPE(dst->getType()) && !inst->isSend() &&
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!inst->isDpas()) {
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bool hasQTypeSrc = false;
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for (int i = 0; i < inst->getNumSrc(); i++) {
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if (IS_QTYPE(inst->getSrc(i)->getType())) {
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hasQTypeSrc = true;
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break;
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if (VISA_WA_CHECK(builder.getPWaTable(), Wa_16012725276))
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{
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for (auto it = bb->begin(), itEnd = bb->end(); it != itEnd; ++it)
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{
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auto inst = *it;
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if (!inst->getDst() || inst->isSend() || inst->isDpas())
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{
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continue;
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}
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}
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if (!hasQTypeSrc) {
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evenlySplitInst(I, bb);
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bool hasNonQTypeScalarSrc = false;
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bool hasQTypeDst = false;
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bool hasQTypeSrc = false;
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if (IS_QTYPE(inst->getDst()->getType()))
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{
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hasQTypeDst = true;
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}
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for (int i = 0; i < inst->getNumSrc(); i++)
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{
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auto src = inst->getSrc(i);
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if (IS_QTYPE(src->getType()))
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{
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hasQTypeSrc = true;
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}
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else if (src->isSrcRegRegion() && src->asSrcRegRegion()->getRegion()->isScalar())
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{
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hasNonQTypeScalarSrc = true;
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}
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}
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// WA-1
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if ((hasQTypeDst || hasQTypeSrc) && hasNonQTypeScalarSrc && inst->getExecSize() != g4::SIMD1)
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{
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for (int i = 0; i < inst->getNumSrc(); i++)
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{
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auto src = inst->getSrc(i);
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if (!IS_QTYPE(src->getType()) && src->isSrcRegRegion() && src->asSrcRegRegion()->getRegion()->isScalar())
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{
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inst->setSrc(insertMovBefore(it, i, IS_SIGNED_INT(src->getType()) ? Type_Q : Type_UQ, bb, GRFALIGN), i);
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}
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}
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}
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// WA-2
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if (hasQTypeDst && inst->getDst()->isCrossGRFDst())
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{
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hasQTypeSrc = false;
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for (int i = 0; i < inst->getNumSrc(); i++)
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{
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if (IS_QTYPE(inst->getSrc(i)->getType()))
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{
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hasQTypeSrc = true;
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break;
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}
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}
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if (!hasQTypeSrc)
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{
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evenlySplitInst(it, bb);
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}
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}
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#ifdef _DEBUG
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verifyG4Kernel(kernel, Optimizer::PI_HWConformityChk, false);
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#endif
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}
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}
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I = next;
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}
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}
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}
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