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Make VRT GRF sizes backward-compatible in VC

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If VRT GRF size is not supported for given platform,
VC will look for closest largest value, e.g. on Xe2:
64->128, 96->128, 192->256.
This commit is contained in:
Semenov, Vadim
2025-08-04 21:29:16 +00:00
committed by igcbot
parent d45ee23fd6
commit 82a03f3d5d
4 changed files with 63 additions and 11 deletions
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2
IGC/VectorCompiler/include/GenXSubtarget.h
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@ -463,6 +463,8 @@ public:
PreDefined_Surface stackSurface() const { return StackSurf; }
bool isIntrinsicSupported(unsigned ID) const;
ArrayRef<unsigned> getSupportedGRFSizes() const;
bool isValidGRFSize(unsigned Size) const;
};

9
IGC/VectorCompiler/lib/GenXCodeGen/GenXCisaBuilder.cpp
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@ -960,8 +960,15 @@ static void addKernelAttrsFromMetadata(VISAKernel &Kernel,
// Set by compile option.
if (BC->isAutoLargeGRFMode())
NumGRF = 0;
if (BC->getGRFSize())
if (BC->getGRFSize()) {
NumGRF = BC->getGRFSize();
if (!Subtarget->isValidGRFSize(NumGRF)) {
// looking for closest largest value
const auto GrfSizes = Subtarget->getSupportedGRFSizes();
auto It = std::upper_bound(GrfSizes.begin(), GrfSizes.end(), NumGRF);
NumGRF = It != GrfSizes.end() ? *It : *(It - 1);
}
}
// Set by kernel metadata.
if (KM.getGRFSize()) {
unsigned NumGRFPerKernel = *KM.getGRFSize();

28
IGC/VectorCompiler/lib/GenXCodeGen/GenXSubtarget.cpp
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@ -27,7 +27,7 @@ SPDX-License-Identifier: MIT
#include "Probe/Assertion.h"
#include "common/StringMacros.hpp"
#include <unordered_set>
#include <algorithm>
using namespace llvm;
@ -296,7 +296,7 @@ bool GenXSubtarget::isInternalIntrinsicSupported(unsigned ID) const {
return true;
}
bool GenXSubtarget::isValidGRFSize(unsigned Size) const {
ArrayRef<unsigned> GenXSubtarget::getSupportedGRFSizes() const {
switch (TargetId) {
case GenXSubtarget::XeHP:
case GenXSubtarget::XeHPG:
@ -304,14 +304,22 @@ bool GenXSubtarget::isValidGRFSize(unsigned Size) const {
case GenXSubtarget::XeLPGPlus:
case GenXSubtarget::XeHPC:
case GenXSubtarget::XeHPCVG:
case GenXSubtarget::Xe2:
return Size == 128 || Size == 256;
case GenXSubtarget::Xe3: {
static const std::unordered_set<unsigned> Supported = {32, 64, 96, 128,
160, 192, 256};
return Supported.count(Size);
case GenXSubtarget::Xe2: {
static const unsigned Supported[] = {128, 256};
return Supported;
}
case GenXSubtarget::Xe3: {
static const unsigned Supported[] = {32, 64, 96, 128, 160, 192, 256};
return Supported;
}
default: {
static const unsigned Supported[] = {128}; // platforms <= TGL
return Supported;
}
default:
return Size == 128; // platforms <= TGL
}
}
bool GenXSubtarget::isValidGRFSize(unsigned Size) const {
const auto GrfSizes = getSupportedGRFSizes();
return std::binary_search(GrfSizes.begin(), GrfSizes.end(), Size);
}

35
IGC/ocloc_tests/VC/vrt.ll Normal file
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@ -0,0 +1,35 @@
;=========================== begin_copyright_notice ============================
;
; Copyright (C) 2025 Intel Corporation
;
; SPDX-License-Identifier: MIT
;
;============================ end_copyright_notice =============================
;
; REQUIRES: regkeys, bmg-supported
; RUN: llvm-as %s -opaque-pointers=0 -o %t.bc
; RUN: ocloc -device bmg -llvm_input -options "-ze-exp-register-file-size=64 -vc-codegen -igc_opts 'ShaderDumpEnable=1, DumpToCustomDir=%t_opt_64'" -output_no_suffix -file %t.bc -output %t_opt_64
; RUN: FileCheck %s --check-prefixes CHECK,CHECK-128 --input-file %t_opt_64/*.zeinfo
; RUN: ocloc -device bmg -llvm_input -options "-ze-exp-register-file-size=128 -vc-codegen -igc_opts 'ShaderDumpEnable=1, DumpToCustomDir=%t_opt_128'" -output_no_suffix -file %t.bc -output %t_opt_128
; RUN: FileCheck %s --check-prefixes CHECK,CHECK-128 --input-file %t_opt_128/*.zeinfo
; RUN: ocloc -device bmg -llvm_input -options "-ze-exp-register-file-size=160 -vc-codegen -igc_opts 'ShaderDumpEnable=1, DumpToCustomDir=%t_opt_160'" -output_no_suffix -file %t.bc -output %t_opt_160
; RUN: FileCheck %s --check-prefixes CHECK,CHECK-256 --input-file %t_opt_160/*.zeinfo
; RUN: ocloc -device bmg -llvm_input -options "-ze-exp-register-file-size=256 -vc-codegen -igc_opts 'ShaderDumpEnable=1, DumpToCustomDir=%t_opt_256'" -output_no_suffix -file %t.bc -output %t_opt_256
; RUN: FileCheck %s --check-prefixes CHECK,CHECK-256 --input-file %t_opt_256/*.zeinfo
declare void @llvm.vc.internal.lsc.store.ugm.v8i1.v2i8.v8i64.v8i32(<8 x i1>, i8, i8, i8, <2 x i8>, i64, <8 x i64>, i16, i32, <8 x i32>)
; CHECK-LABEL: - name: test
; CHECK: execution_env:
; CHECK-128: grf_count: 128
; CHECK-256: grf_count: 256
define dllexport spir_kernel void @test() #0 {
tail call void @llvm.vc.internal.lsc.store.ugm.v8i1.v2i8.v8i64.v8i32(<8 x i1> <i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true>, i8 3, i8 3, i8 1, <2 x i8> zeroinitializer, i64 0, <8 x i64> zeroinitializer, i16 1, i32 0, <8 x i32> zeroinitializer)
ret void
}
attributes #0 = { noinline "VCFunction" }
!spirv.Source = !{!0}
!0 = !{i32 0, i32 100000}