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https://github.com/intel/intel-graphics-compiler.git
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Fix the access bound check issue of src operand for madw instruction
For madw instruction, only the dst operand needs special handling in verifier and src operand should be treated as other instructions.
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@ -510,6 +510,7 @@ void vISAVerifier::verifyRegion(const CISA_INST *inst, unsigned i) {
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Common_ISA_Operand_Class operand_class = vect.getOperandClass();
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unsigned dstIndex = getDstIndex(inst);
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bool isDst = (i == dstIndex);
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unsigned numPreDefinedVars = Get_CISA_PreDefined_Var_Count();
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@ -565,7 +566,7 @@ void vISAVerifier::verifyRegion(const CISA_INST *inst, unsigned i) {
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REPORT_INSTRUCTION(options, false, "Invalid execution size");
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}
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if (i == dstIndex) {
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if (isDst) {
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REPORT_INSTRUCTION(
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options, 0 != h_stride_val,
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"Horizontal Stride should not be 0 for a destination operand.");
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@ -632,7 +633,7 @@ void vISAVerifier::verifyRegion(const CISA_INST *inst, unsigned i) {
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"Legal CISA region vertical stride parameter values: "
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"{0, 1, 2, 4, 8, 16, 32}.");
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}
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} else if (dstIndex != i) {
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} else if (!isDst) {
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// check for out-of-bound addresses for VxH operand
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int numAddr = exec_sz / width_val;
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REPORT_INSTRUCTION(options, numAddr <= (int)irBuilder->getNumAddrRegisters(),
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@ -699,13 +700,14 @@ void vISAVerifier::verifyRegion(const CISA_INST *inst, unsigned i) {
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firstElementIndex +
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(((i * v_stride_val) + (j * h_stride_val)) * VN_size);
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// Madw instruction has both low and high results. So, need to check
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// the offset of high result.
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unsigned hiOffset = 0;
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if (inst->opcode == ISA_MADW) {
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hiOffset = (region_offset - firstElementIndex + 1 + grfSize - 1) &
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// Madw instruction has both low and high results in dst. So, need
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// to check the offset of high result.
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unsigned dstHiOffset = 0;
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if (inst->opcode == ISA_MADW && isDst) {
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dstHiOffset =
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(region_offset - firstElementIndex + 1 + grfSize - 1) &
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(~(grfSize - 1)); // GRF-aligned
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region_offset += hiOffset;
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region_offset += dstHiOffset;
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}
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if (region_offset >= var_size) {
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@ -719,16 +721,16 @@ void vISAVerifier::verifyRegion(const CISA_INST *inst, unsigned i) {
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std::cout << " The access fails the following check to determine "
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"correct bounds (see CISA manual section 5.1 "
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"Region-based Addressing):\n";
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if (inst->opcode == ISA_MADW) {
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if (inst->opcode == ISA_MADW && isDst) {
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std::cout
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<< "(row_offset * GRF_SIZE + col_offset * type_size) + "
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"(((i * v_stride) + (j * h_stride)) * type_size) + "
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"high_offset < type_size * num_elements:\n";
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"dstHiOffset < type_size * num_elements:\n";
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std::cout << "(" << (int)row_offset << " * " << grfSize << " + "
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<< (int)col_offset << " * " << VN_size << ") + (((" << i
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<< " * " << v_stride_val << ") + (" << j << " * "
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<< h_stride_val << ")) * " << VN_size << ") + "
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<< hiOffset << " < " << VN_size << " * "
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<< dstHiOffset << " < " << VN_size << " * "
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<< num_elements << "\n";
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} else {
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std::cout
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