Media/intel-graphics-compiler
1
0
Fork 0
mirror of https://github.com/intel/intel-graphics-compiler.git synced 2025-10-30 08:18:26 +08:00
Code Issues Packages Projects Releases Wiki Activity

Fix the access bound check issue of src operand for madw instruction

Browse Source 
For madw instruction, only the dst operand needs special handling in verifier and
src operand should be treated as other instructions.
This commit is contained in:
Liu, Fang L
2025-08-14 20:16:21 +00:00
committed by igcbot
parent cedf0f970b
commit d81684bd3f
1 changed files with 13 additions and 11 deletions
Download Patch File Download Diff File Expand all files Collapse all files

24
visa/IsaVerification.cpp
View File

@ -510,6 +510,7 @@ void vISAVerifier::verifyRegion(const CISA_INST *inst, unsigned i) {
Common_ISA_Operand_Class operand_class = vect.getOperandClass(); Common_ISA_Operand_Class operand_class = vect.getOperandClass();
unsigned dstIndex = getDstIndex(inst); unsigned dstIndex = getDstIndex(inst);
bool isDst = (i == dstIndex);
unsigned numPreDefinedVars = Get_CISA_PreDefined_Var_Count(); unsigned numPreDefinedVars = Get_CISA_PreDefined_Var_Count();
@ -565,7 +566,7 @@ void vISAVerifier::verifyRegion(const CISA_INST *inst, unsigned i) {
REPORT_INSTRUCTION(options, false, "Invalid execution size"); REPORT_INSTRUCTION(options, false, "Invalid execution size");
} }
if (i == dstIndex) { if (isDst) {
REPORT_INSTRUCTION( REPORT_INSTRUCTION(
options, 0 != h_stride_val, options, 0 != h_stride_val,
"Horizontal Stride should not be 0 for a destination operand."); "Horizontal Stride should not be 0 for a destination operand.");
@ -632,7 +633,7 @@ void vISAVerifier::verifyRegion(const CISA_INST *inst, unsigned i) {
"Legal CISA region vertical stride parameter values: " "Legal CISA region vertical stride parameter values: "
"{0, 1, 2, 4, 8, 16, 32}."); "{0, 1, 2, 4, 8, 16, 32}.");
} }
} else if (dstIndex != i) { } else if (!isDst) {
// check for out-of-bound addresses for VxH operand // check for out-of-bound addresses for VxH operand
int numAddr = exec_sz / width_val; int numAddr = exec_sz / width_val;
REPORT_INSTRUCTION(options, numAddr <= (int)irBuilder->getNumAddrRegisters(), REPORT_INSTRUCTION(options, numAddr <= (int)irBuilder->getNumAddrRegisters(),
@ -699,13 +700,14 @@ void vISAVerifier::verifyRegion(const CISA_INST *inst, unsigned i) {
firstElementIndex + firstElementIndex +
(((i * v_stride_val) + (j * h_stride_val)) * VN_size); (((i * v_stride_val) + (j * h_stride_val)) * VN_size);
// Madw instruction has both low and high results. So, need to check // Madw instruction has both low and high results in dst. So, need
// the offset of high result. // to check the offset of high result.
unsigned hiOffset = 0; unsigned dstHiOffset = 0;
if (inst->opcode == ISA_MADW) { if (inst->opcode == ISA_MADW && isDst) {
hiOffset = (region_offset - firstElementIndex + 1 + grfSize - 1) & dstHiOffset =
(region_offset - firstElementIndex + 1 + grfSize - 1) &
(~(grfSize - 1)); // GRF-aligned (~(grfSize - 1)); // GRF-aligned
region_offset += hiOffset; region_offset += dstHiOffset;
} }
if (region_offset >= var_size) { if (region_offset >= var_size) {
@ -719,16 +721,16 @@ void vISAVerifier::verifyRegion(const CISA_INST *inst, unsigned i) {
std::cout << " The access fails the following check to determine " std::cout << " The access fails the following check to determine "
"correct bounds (see CISA manual section 5.1 " "correct bounds (see CISA manual section 5.1 "
"Region-based Addressing):\n"; "Region-based Addressing):\n";
if (inst->opcode == ISA_MADW) { if (inst->opcode == ISA_MADW && isDst) {
std::cout std::cout
<< "(row_offset * GRF_SIZE + col_offset * type_size) + " << "(row_offset * GRF_SIZE + col_offset * type_size) + "
"(((i * v_stride) + (j * h_stride)) * type_size) + " "(((i * v_stride) + (j * h_stride)) * type_size) + "
"high_offset < type_size * num_elements:\n"; "dstHiOffset < type_size * num_elements:\n";
std::cout << "(" << (int)row_offset << " * " << grfSize << " + " std::cout << "(" << (int)row_offset << " * " << grfSize << " + "
<< (int)col_offset << " * " << VN_size << ") + (((" << i << (int)col_offset << " * " << VN_size << ") + (((" << i
<< " * " << v_stride_val << ") + (" << j << " * " << " * " << v_stride_val << ") + (" << j << " * "
<< h_stride_val << ")) * " << VN_size << ") + " << h_stride_val << ")) * " << VN_size << ") + "
<< hiOffset << " < " << VN_size << " * " << dstHiOffset << " < " << VN_size << " * "
<< num_elements << "\n"; << num_elements << "\n";
} else { } else {
std::cout std::cout