Commit Graph

11413 Commits

Author SHA1 Message Date
3fb4af1dcf Add some MTL functionality
Add some MTL functionality
2022-09-20 11:25:06 +02:00
a9f50f0110 Changes in code. 2022-09-20 06:09:01 +02:00
052c0d4854 [Autobackout][FuncReg]Revert of change: 27875e8dea
Extended retry manager

Extended behaviour of retry manager to check if the previously compiled kernel was better.
If after "retry" compilation, the current shader was generated worst than previous, then pick
the previous and abort retry manager for this kernel.
2022-09-20 03:14:07 +02:00
95ce49d4db Add SCEV-based GEP simplification.
Simplify GEP based on SCEV.
2022-09-20 00:30:39 +02:00
a35ad4dc79 add passes back for correctness
We hit an nonconformance issue when disabling global opt in staged
compilation. CustomSafeOpt, CFGSimplification and JumpThreading are the culprit passes
and cannot be disabled
2022-09-19 23:11:29 +02:00
51c6b16069 Minor code refactor
Minor code refactor around functions responsible for constructing send
instructions
2022-09-19 20:33:37 +02:00
db4df552f2 Check for expensive loops
This change looks for the functions/kernel which has loops with high
estimated register pressure in pre-header and forces on those functions
retry compilation with disabled LICM.
The root issue is with pass LICM which moves a lot of
invariant code to the pre-header of loop - causing increasing of
the live-range of the values (and increasing of the spill-fills at the end).
2022-09-19 13:47:43 +02:00
27875e8dea Extended retry manager
Extended behaviour of retry manager to check if the previously compiled kernel was better.
If after "retry" compilation, the current shader was generated worst than previous, then pick
the previous and abort retry manager for this kernel.
2022-09-19 13:03:57 +02:00
eaac078a89 Stateless scratch space for OGL
Implement logic to detect if stateless scratch space pointer is needed
(per thread scratch space size > 256kB), and set according information
in compiler output and payload.
2022-09-19 11:54:17 +02:00
b61d34b475 Refactor double float acc capability check in vISA.
Explicitly list platforms that support DF ACC.
2022-09-19 07:07:25 +02:00
ff448a01ac VC support for common ZE binary related internal options
Both Scalar and Vector paths need to support the following options:
* `-cl-disable-zebin`
* `-cl[-intel]-allow-zebin`
* `-ze-allow-zebin`
* `-ze-disable-zebin`
2022-09-19 01:35:28 +02:00
1b59692d47 Changes in code. igc-1.0.12260 2022-09-17 03:35:06 +02:00
832cfe51d3 Revert "Add verifier to CISA inst function"
Revert change.
2022-09-17 00:23:45 +02:00
8e2430428c Improve performance of work-group reduction built-in
Improve performance of work-group reduction built-in
2022-09-16 19:54:45 +02:00
92c136e8f9 IGA: updated dpas macro rules
Updated 2 rules in DpasMacroBuilder:
- src2 read suppression can allow dp dpas as long as the rep-count is 4
- WAW and WAR dependency are allowed between dpas within the same macro
2022-09-16 18:34:53 +02:00
f5198f42c2 Enable largeGRF during retry
Enable largeGRF during retry
2022-09-16 17:37:12 +02:00
d1fb5cb5ca Add functional lit tests for several passes
Added tests
2022-09-16 16:52:01 +02:00
0849110127 Revert: skip memopt2 for dg2 and pvc
memopt2 is redundant
2022-09-16 16:51:41 +02:00
5741f80622 Implement support for LLVM intrinsic CTLZ
Implement support for LLVM intrinsic CTLZ with source other than i32
2022-09-16 14:59:15 +02:00
c839e26953 Remove surface state generation in patch tokens for printf buffer
Printf buffer is always addressed with stateless addressing mode, so
surface state is useless
2022-09-16 12:59:19 +02:00
ea705c5938 [Autobackout][FuncReg]Revert of change: d69545eb73
add CFGSimplification and JumpThreading passes back for correctness

We hit an nonconformance issue when disabling global opt in staged
compilation. CFGSimplification and JumpThreading are the culprit passes
and cannot be disabled
2022-09-16 10:25:00 +02:00
f5cbbaad35 Add WAs for MTL
Add WAs for MTL
2022-09-16 08:58:56 +02:00
4f5109c62a AnyHit does not fill u, v and hit info in CommittedHit
If AnyHit shaders directly invokes ClosestHit shader,
CommittedHit has to be manually filled with the
data from PotentialHit.
Copying u, v and HitInfo (3rd dword) was missing.
2022-09-16 08:33:49 +02:00
5073c83052 Debug feature to dump live-intervals for plotting
Feature dumps .py file with instructions to plot live-interval chart.
Enabled using finalizer option -dumplrs.
2022-09-16 06:48:49 +02:00
abd93c56d9 [Autobackout][FuncReg]Revert of change: eb8f50ab18
Check for expensive loops

This change looks for the functions/kernel which has loops with high
estimated register pressure in pre-header and forces on those functions
retry compilation with disabled LICM.
The root issue is with pass LICM which moves a lot of
invariant code to the pre-header of loop - causing increasing of
the live-range of the values (and increasing of the spill-fills at the end).
2022-09-16 05:40:51 +02:00
448ff15e60 [Autobackout][FuncReg]Revert of change: be193f8251
Improve peformance of work-group reduction built-in

Improve peformance of work-group reduction built-in
2022-09-16 03:39:53 +02:00
5ff880a931 move freeze pass
Move LLVM freeze removal pass to before register pressure estimator
2022-09-15 23:37:47 +02:00
dcf607c255 Member initialization, code refactoring, asserts.
Member initialization, code refactoring, asserts.
2022-09-15 21:41:24 +02:00
1cb7302eae Changes in code. 2022-09-15 21:20:26 +02:00
6ec9318882 Refactor vISA_AbortOnSpillThreshold SaveOption (Take 2)
Make vISA_AbortOnSpillThreshold SaveOption code consistent for
PS, CS, and OCL. SIMD16/SIMD32_SpillThreshold are applied to
SIMD16/SIMD32 respectively.
2022-09-15 18:11:17 +02:00
a55468c836 Member initialization, code refactoring, asserts.
Member initialization, code refactoring, asserts.
2022-09-15 16:48:41 +02:00
136f7f6200 Member initialization, code refactoring, asserts.
Member initialization, code refactoring, asserts.
2022-09-15 10:43:22 +02:00
9ad1de9540 Enable OpenGL for newer versions of LLVM
Enable OpenGL for newer versions of LLVM
2022-09-15 09:47:59 +02:00
32beca6b10 Changes in code. 2022-09-15 07:16:58 +02:00
e6c50bb7f8 [Autobackout][FuncReg]Revert of change: ba6892c38e
Run SROA after RemoveunsupportedIntrinsics

RemoveunsupportedIntrinsics changes memcpy into loads and stores
Running SROA after that can limit private memory usage.
2022-09-15 07:08:15 +02:00
9163025933 Fixed comments
Fixed comments and one potential bug. Preparing to use it for generic load/store combiner.
2022-09-15 02:13:39 +02:00
d69545eb73 add CFGSimplification and JumpThreading passes back for correctness
We hit an nonconformance issue when disabling global opt in staged
compilation. CFGSimplification and JumpThreading are the culprit passes
and cannot be disabled
2022-09-15 00:52:06 +02:00
32b97f1fc2 Always assert when inst verification fails 2022-09-14 23:51:28 +02:00
2582625260 remove WA from post RA to pre RA
remove WA from post RA to pre RA
2022-09-14 21:45:23 +02:00
1bfc8e30c0 Removed table offset calculation
Removed table offset calculation
2022-09-14 20:26:52 +02:00
5649fb16f4 Make variable split less aggressive in large loops with high
register pressure

In loops with inst count greater than a threshold (500) and register pressure
greater than 98% of max pressure, make split less aggressive to avoid
more spilling.
2022-09-14 19:45:57 +02:00
5a2d089f2b Changes in code. 2022-09-14 19:13:34 +02:00
eb8f50ab18 Check for expensive loops
This change looks for the functions/kernel which has loops with high
estimated register pressure in pre-header and forces on those functions
retry compilation with disabled LICM.
The root issue is with pass LICM which moves a lot of
invariant code to the pre-header of loop - causing increasing of
the live-range of the values (and increasing of the spill-fills at the end).
2022-09-14 17:53:37 +02:00
aec986f23a fixes IGA API and tests
Corrects a failing test case
2022-09-14 16:57:35 +02:00
be193f8251 Improve peformance of work-group reduction built-in
Improve peformance of work-group reduction built-in
2022-09-14 15:47:23 +02:00
adae3690c4 Revert "Update VectorBitCastOpt to handle more cases"
This reverts commit 9d4c294dc5
2022-09-14 15:37:13 +02:00
3a245ca85a Changes in code. 2022-09-14 14:36:04 +02:00
856fb07a03 Correct alignment for stores in FixResourcePtr
FixResourcePtr generates store_raw instrinsics from ordinary stores,
copy alignment from input store if it is set.
2022-09-14 10:37:09 +02:00
cd3d1b1937 Enumerate compiler passes in debug output
Enumerate compiler passes in debug output
2022-09-14 02:05:25 +02:00
36389f8215 Removing simd size code and narrowing simd16 forcing
Removed simd size code for function groups and narrowed simd16 forcing.
2022-09-14 00:52:37 +02:00