Commit Graph

92 Commits

Author SHA1 Message Date
cf2dc92ae5 Changes in code. 2025-09-01 13:03:23 +02:00
77cd23b537 Handle inline asm in vector alias
1. Improve vector alias optim to handle inline asm
2. Allow constant insert elements
2025-07-24 18:14:27 +02:00
420b632df9 Update IGC code format
Update IGC code format
2025-07-20 06:20:11 +02:00
cb9e6e5daf Refactoring
Clarifying comments for vector alias and remove the dead
code.

No Functional change
2025-07-16 01:52:20 +02:00
004620394e Skip dbg calls for vector aliasing heuristic
When we're calculating instructions count in BB, we should skip `dbg` calls,
because we cross threshold for ScalarAliasBBSizeThreshold,
and we disable scalar aliasing in case with `-g`.
2025-04-10 10:43:43 +02:00
35d6a22cbf Recognise all vector aliases within same BB without
threshold

Add vector aliases as long as all the IE instructions are in the same
BB, regardless of VectorAliasBBThreshold.
2025-03-31 12:46:15 +02:00
c2b45279ea Remove "cutlass" string parse
This removes the workaround that ignores the value of VectorAliasBBThreshold if the kernel's name contains the strings "_Z" and "cutlass".
2024-10-23 16:32:48 +02:00
437b13f0da [LLVM16] Replacing getInstList calls(), ZeroBehavior drop, getUserCost, setUndef, array_lengthof, GreatestCommonDivisor64
Porting IGC code to LLVM16

* Replace getInstList() calls
* Replace GreatestCommonDivisor64 with std::gcd https://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-20220822/1071390.html
* Replace llvm::array_lengthof with std::size https://reviews.llvm.org/D133429
* Replace getUserCost with getInstructionCost https://reviews.llvm.org/D79483
* Replace setUndef with setKillLocation https://reviews.llvm.org/D140903
* Drop ZeroBehavior parameter https://reviews.llvm.org/D141798
2024-09-27 09:09:47 +02:00
45f7f0067a Remove unnecessary MOVs
Unnecessary MOVs were removed from ASM.
2024-09-25 22:57:39 +02:00
8fef5c96a4 Add ScalarAliasBBSizeThreshold flag
Add flag to control max size of BB for which
scalar to vector aliasing will apply.
2024-09-13 19:35:31 +02:00
78585be334 Refactor vectoralias
As some dead BBs are not removed in codegen emit, don't count those dead
bbs when counting the number of BBs.

Once those dead BBs are removed, should use F->size() to get the number
of BBs. (This is a temporary solution. Once the regerssion caused by adding simplifyCFG gets
resolved, this temporary solution should be removed.)
2024-09-03 07:11:58 +02:00
7d6f713501 Fix non-deterministic code generation
std::map with ptr as key has non-deterministic order of iterating
its members as ptr would be different from run to run. This non-
deterministic order causes visa to generate different code.

This PR fixes it by sorting map using a fixed value id. With this,
it will generate the same order of cvariables for vector alias for
the same input function.
2024-04-11 02:39:08 +02:00
61ebc60aee Avoid reg pressure from vector alias
For cases that vector alias could increase register pressure, don't
do vector alias.

Also, the extractMask optimization is favored for smaller vector over vector alias.
VA code checks that if extratMask can be done, skip vector alias.
2024-03-29 20:47:02 +01:00
4240b0bb04 Coverity fixes and refactors
- initialize variables
- pass lambda arguments via reference
- free leaked memory
- remove dead code
- prevent nullptr dereference
2024-03-29 14:47:06 +01:00
67928124ff IGC and vISA refactors and small fixes
Fix issues found by Coverity.
2024-03-27 15:04:04 +01:00
5103715054 Make sure aliased vector have the same elt size
Vector alias uses a node value as the ID for a group of aliased values.
As two vectors of different sizes could be aliased to each other, a node
value may be different from the original one and thus has a different
element size than the original vector, which would cause incorrect offset
calculation.

This change fixes that by adding the type of the original base vector
into base vector struct.

In addition, the previous alignment checking code for subvector isn't
complete. This change re-implements it by get all coalesced values and
checks alignment for every one of them and selects the max of them.
2024-03-24 02:07:35 +01:00
9e446543fe Avoid increasing grf pressure
Vector Aliasing will increase grf pressure. This change is to limit
scalar to vector aliasing to avoid increasing register pressure.
2024-03-18 04:16:30 +01:00
9f22e71ad3 Fix incorrect offset for struct var as aliaser
The offset of aliaser to base vector was calculated incorrectly using
struct's size. The correct one should calculate offset based on base
vector's element type.

Also, Add minimal alignment as an argument of GetSymbol() so that CVariable's
alignment can be set correctly for vector aliasing.
2024-03-17 05:22:41 +01:00
c1e60ed30e _OS_SUMMARY
Besides minor refactoring to save compiling time by skipping vectoralias
earlier if it does not apply.

Also, add VectorAliasBBThreshold. If F's number of BBs is greater than
this threshold, skip vectorAlias to avoid increasing GRF pressure

As VectoAlias is off, no functional change.
2024-03-13 16:19:44 +01:00
90a9b1d020 Miss alias setting
When an inst is marked as No-op due to aliasing, it should be
added into alias map. Otherwise, varible would be set undefined
incorrectly.
2024-03-10 16:00:57 +01:00
0338cd9a21 Fix aliasing check.
This change is to fix an aliaser check before setting a value as
an aliaser, to make sure no value can be an aliaer twice.

As VectorAlias is off by default, this change has no functional change.
2024-03-06 19:13:19 +01:00
5b7b58787e Rename VATemp to VectorAlias
Rename VATemp to VectorAlias. It is still off by default.

Also, minor change for setting noop for scalar variable aliased to a
vector.
2024-03-04 08:43:27 +01:00
1dd943811a Refactor subvec aliasing
1. Refactor subvec aliasing and apply it to limited cases.
  2. Add uniform checking to make sure subvec and vec have the same uniformity.
  3. Further add alignment checking to make sure subvec's mininum alignment
     requirement is guaranteed after becoming an alias to a larger vector.
     (Note: as simdsize isn't available when doing analysis, the minimum
     simdsize is used instead. This should be okay for dpas kernel as it
     uses the minimum simdsize.)
  4. This refactor also split funtionality into several sub functions for
     ease of testing. With VATemp=1, it handles vectors that are basically
     isolated; general cases are handled under VATemp=2.

     (VATemp >> 2) & 0x3 is to control extractelement aliasing, and
     (VATemp >> 4) & 0x3 is to control lifestart/end generation. Both
     will be turned on and tested later if needed.
2024-02-29 19:54:38 +01:00
4de2d84fb9 Remove redundant explicit return types in lambdas
Remove redundant explicit return types in lambdas
2024-01-11 13:44:28 +01:00
b50e4b1f70 Minor fix to insertvalue
If dessa is off, coalescing insertvalue needs to check
if operand 0 is a single user. If it is, continue the
chain, otherwise has to stop.

This is to avoid coalescing the following case:
   a0 = insertvalue undef, s0, 0
   a1 = insertvalue a0, s1, 1
   a2 = insertvalue a1, s2, 2

   b1 = insertvalue a0, x1, 1
   b2 = insertvalue b1, x2, 2

      = foo(a2)
      = foo(b2)

   {a1, a2} can be coalesced as well as {b1, b2}; but
   {a1, a2} cannot coalesce with {b1, b2}.
2023-02-15 07:13:19 +01:00
bd94b54982 Simplify key EnableDeSSAAlias
EnableDeSSAAlias is of int originally during development of coalescing
alias (bitcast, etc) to have a finer control. It is stable now and no
longer need to be of int.

This submit has the following changes:
   1. Changes EnableDeSSAAlias to bool;
   2. Change DisableDeSSA to EnableDeSSA
   3. Guard the use of EnableDeSSAAlias with EnableDeSSA as EnableDeSSAAlias
      is used only if DeSSA is on.

No function change expected from this submit.
2022-12-16 02:35:07 +01:00
8ca849ab3d DPAS intrinsics
Enables certain DPAS intrinsics
2022-02-13 23:07:21 +01:00
68a90e4539 KW fix for uninitialized variables
KW fix for uninitialized variables
2021-10-19 06:41:49 +02:00
9cf1275a3a Minor fixes
Minor fixes
2021-09-30 07:54:35 +02:00
8c23cc470c [Autobackout][FuncReg]Revert of change: f1fed8f34f
Minor fixes

Fixed newlines at the end of file
2021-09-20 22:19:03 +02:00
f1fed8f34f Minor fixes
Fixed newlines at the end of file
2021-09-12 20:42:22 +02:00
661333ec59 Part fix for buildbreak on LLVM12 2021-08-24 12:24:54 +02:00
6fc7704a62 update copyright headers in IGC Compiler 2021-05-06 22:52:55 +02:00
32944e60e9 [Autobackout][FuncReg]Revert of change: 1c28c742da
Fix build with LLVM 12

Removed TargetLibraryInfo.h include from AddressSpaceAliasAnalysis.cpp
as this was causing treat-warning-as-error buildbreak,
Added casts to fix warnings,
Replaced ConstantPropagation and IPConstantPropagation passes with
IPSCCP passes,
reasoning here:
https://lists.llvm.org/pipermail/llvm-dev/2020-July/143788.html

Original pull-request:
intel/intel-graphics-compiler#171

Signed-off-by: Zoltán Böszörményi zboszor@gmail.com
Co-authored-by: Pawel Szymichowski pawel.szymichowski@intel.com

Co-authored-by: Zoltán Böszörményi zboszor@pr.hu
2021-04-29 18:18:35 +02:00
1c28c742da Fix build with LLVM 12
Removed TargetLibraryInfo.h include from AddressSpaceAliasAnalysis.cpp
as this was causing treat-warning-as-error buildbreak,
Added casts to fix warnings,
Replaced ConstantPropagation and IPConstantPropagation passes with
IPSCCP passes,
reasoning here:
https://lists.llvm.org/pipermail/llvm-dev/2020-July/143788.html

Original pull-request:
intel/intel-graphics-compiler#171

Signed-off-by: Zoltán Böszörményi zboszor@gmail.com
Co-authored-by: Pawel Szymichowski pawel.szymichowski@intel.com

Co-authored-by: Zoltán Böszörményi zboszor@pr.hu
2021-04-26 16:00:24 +02:00
bcda9e4e7b [Autobackout][FuncReg]Revert of change: 4bc6b443a5
Fix build with LLVM 12

Removed TargetLibraryInfo.h include from AddressSpaceAliasAnalysis.cpp as this was causing treat-warning-as-error buildbreak,
Added casts to fix warnings,
Replaced ConstantPropagation and IPConstantPropagation passes with IPSCCP passes,
reasoning here: https://lists.llvm.org/pipermail/llvm-dev/2020-July/143788.html

Original pull-request: https://github.com/intel/intel-graphics-compiler/pull/171

Signed-off-by: Zoltán Böszörményi <zboszor@gmail.com>
Co-authored-by: Pawel Szymichowski <pawel.szymichowski@intel.com>
2021-04-23 04:03:32 +02:00
4bc6b443a5 Fix build with LLVM 12
Removed TargetLibraryInfo.h include from AddressSpaceAliasAnalysis.cpp as this was causing treat-warning-as-error buildbreak,
Added casts to fix warnings,
Replaced ConstantPropagation and IPConstantPropagation passes with IPSCCP passes,
reasoning here: https://lists.llvm.org/pipermail/llvm-dev/2020-July/143788.html

Original pull-request: https://github.com/intel/intel-graphics-compiler/pull/171

Signed-off-by: Zoltán Böszörményi <zboszor@gmail.com>
Co-authored-by: Pawel Szymichowski <pawel.szymichowski@intel.com>
2021-04-21 16:11:37 +02:00
2e3ddd6361 updated copyright headers in IGC Compiler 2021-02-21 22:43:53 +01:00
4bc9c86169 Fix building for LLVM11 (next part)
Change-Id: Ic6cdfeb9a5f2f1dbd06432a4f2721782ed8e760a
2020-09-07 16:42:08 -07:00
38932301a2 - use IGC_ASSERT_MESSAGE in IGC
- refactor assertion statements
- remove __debugbreak() for CShader.cpp and RastyJitter.cpp

Change-Id: I5a1318036713bc834c0391a66267b12332c296a3
2020-06-16 06:31:51 -07:00
d5cf8dc51b use IGC_ASSERT in IGC/Compiler
Change-Id: I1a2fb9d672885c9743b328d500fd107be4b65c32
2020-04-26 10:56:23 -07:00
649153816a Internal refactoring
Change-Id: I6b67eaa96a991998351ce07133ae0220bce6119c
2020-03-11 22:53:40 -07:00
4c21c514f5 Added an ocl internal option
-cl-intel-vector-coalesing=<0-5>
to control vector coalescing (extract/insert coalescing)

Remove unused driverInfo function : EnableVecAliasing()

Note that the previous failure might be due to wrong merging (I saw
that my change had unknown changes).

Change-Id: I37615f49e81040c0e1829cf0150512a4b17bcdb4
2020-03-03 10:02:10 -08:00
64ff564d9d [Autobackout][FuncReg]Revert of change: 51c3732659
Added an ocl internal option
   -cl-intel-vector-coalesing=<0-5>
to control vector coalescing (extract/insert coalescing)

Remove unused driverInfo function : EnableVecAliasing()

Change-Id: I5591235a439f60954bb393230221efdff866a772
2020-02-28 20:28:39 -08:00
51c3732659 Added an ocl internal option
-cl-intel-vector-coalesing=<0-5>
to control vector coalescing (extract/insert coalescing)

Remove unused driverInfo function : EnableVecAliasing()

Change-Id: Ib721bb431bd7e37a9611ada78c017d9985af7fba
2020-02-27 14:23:50 -08:00
862d1d982b This is a clean-up change for fixing EOL whitespace
Change-Id: I91c714f4476bcc2b168596bc3840a94adc337bf6
2019-10-04 09:40:56 -07:00
870c0163c7 As Code under VATemp turns to be mature, remove code under EnableVATemp.
The code under VATemp is stable.

Change-Id: Ia86e0716482462e7f46de841c682b7937b0b619f
2019-09-05 12:39:54 -07:00
be063c524b Remove the old coalescing code as it is no longer
needed. More will be deleted in the next few submits.

Change-Id: I3165519e13d3d8eda6c2cdbaa0d6f81930bccda7
2019-09-04 13:48:43 -07:00
cd53fb14a2 Get rid of -Wunused-function, Wunused-variable warnings
Change-Id: I3dd9622974f673232a0df287a623223ecc45071a
2019-08-21 03:42:17 -07:00
6a557e0462 [Autobackout]Revert of change: 3244dc1d63
Get rid of -Wunused-function, Wunused-variable warnings
HSD/Radar: n/a

Change-Id: I0ba7f75584ec00b4aa4bc8ca4850a4c2a9a777fc
2019-08-20 10:10:27 -07:00