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realtek: rtl930x: add XGS1250-12 B1 device
The A1 and B1 devices are largely the same. The differences
seem to be:
- RTL8218D (A1) vs RTL8218E (B1) PHY for the eight 1 Gbps TP ports
- Aquantia (A1) vs RTL8261N (B1) PHY for the three 10 Gbps TP ports
RTL8218D/E share the same driver and support was added already by
commit c8c187f0f0 ("realtek: add support for RTL8218E").
The RTL8261N is also already supported but it's located at
different addresses compared to the A1 device. This requires
the device tree to be split. As a result, the devices are require
different images.
I found the smi addresses on the forum:
https://forum.openwrt.org/t/support-for-rtl838x-based-managed-switches/57875/3622
And I can conform on my B1 device that this is working.
Co-developed-by: Mathias Kresin <dev@kresin.me>
Signed-off-by: Thomas Martitz <thomas.martitz@mailbox.org>
Link: https://github.com/openwrt/openwrt/pull/20150
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This commit is contained in:
Thomas Martitz
committed by
Hauke Mehrtens
Hauke Mehrtens
parent
9f5e43b8da
commit
133c91823c
@ -1,270 +1,14 @@
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// SPDX-License-Identifier: GPL-2.0-or-later
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/dts-v1/;
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#include "rtl930x.dtsi"
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/leds/common.h>
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#include <dt-bindings/thermal/thermal.h>
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#include "rtl9302_zyxel_xgs1250-12-common.dtsi"
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/ {
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compatible = "zyxel,xgs1250-12-a1", "realtek,rtl838x-soc";
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model = "Zyxel XGS1250-12 A1 Switch";
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aliases {
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led-boot = &led_pwr_sys;
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led-failsafe = &led_pwr_sys;
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led-running = &led_pwr_sys;
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led-upgrade = &led_pwr_sys;
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};
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keys {
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compatible = "gpio-keys";
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mode {
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label = "reset";
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gpios = <&gpio0 22 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_RESTART>;
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};
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};
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leds {
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compatible = "gpio-leds";
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pinctrl-names = "default";
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pinctrl-0 = <&pinmux_disable_sys_led>;
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led_pwr_sys: led-0 {
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color = <LED_COLOR_ID_GREEN>;
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function = LED_FUNCTION_POWER;
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gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>;
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};
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};
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sfp0: sfp-p12 {
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compatible = "sff,sfp";
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i2c-bus = <&i2c0>;
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los-gpio = <&gpio0 17 GPIO_ACTIVE_HIGH>;
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tx-fault-gpio = <&gpio0 20 GPIO_ACTIVE_HIGH>;
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mod-def0-gpio = <&gpio0 16 GPIO_ACTIVE_LOW>;
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tx-disable-gpio = <&gpio0 15 GPIO_ACTIVE_HIGH>;
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};
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led_set: led_set {
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compatible = "realtek,rtl9300-leds";
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active-low;
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led_set0 = <0x0a20 0x0b80>; // LED set 0: 1000Mbps, 10/100Mbps
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led_set1 = <0x0a0b 0x0a28 0x0a82 0x0a0b>; // LED set 1: (10G, 5G, 2.5G) (2.5G, 1G)
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// (5G, 10/100) (10G, 5G, 2.5G)
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led_set2 = <0x0a20 0x0a01>; // LED set 2: 1000MBit, 10GBit
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};
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thermal-zones {
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phy24-thermal {
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/* Poll every 10 seconds */
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polling-delay-passive = <10000>;
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polling-delay = <10000>;
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thermal-sensors = <&phy24>;
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trips {
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phy24_trip0: phy24-trip0 {
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/* At 80 degrees turn on fan */
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temperature = <80000>;
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hysteresis = <1000>;
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type = "active";
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};
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phy24_trip1: phy24-trip1 {
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/* At 108 degrees phys exceed spec */
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temperature = <108000>;
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hysteresis = <5000>;
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type = "critical";
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};
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};
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cooling-maps {
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map {
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trip = <&phy24_trip0>;
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cooling-device = <&chassis_fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
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};
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};
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};
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phy25-thermal {
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/* Poll every 10 seconds */
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polling-delay-passive = <10000>;
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polling-delay = <10000>;
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thermal-sensors = <&phy25>;
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trips {
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phy25_trip0: phy25-trip0 {
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/* At 80 degrees turn on fan */
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temperature = <80000>;
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hysteresis = <1000>;
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type = "active";
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};
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phy25_trip1: phy25-trip1 {
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/* At 108 degrees phys exceed spec */
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temperature = <108000>;
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hysteresis = <5000>;
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type = "critical";
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};
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};
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cooling-maps {
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map {
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trip = <&phy25_trip0>;
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cooling-device = <&chassis_fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
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};
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};
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};
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phy26-thermal {
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/* Poll every 10 seconds */
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polling-delay-passive = <10000>;
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polling-delay = <10000>;
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thermal-sensors = <&phy26>;
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trips {
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phy26_trip0: phy26-trip0 {
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/* At 80 degrees turn on fan */
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temperature = <80000>;
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hysteresis = <1000>;
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type = "active";
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};
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phy26_trip1: phy26-trip1 {
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/* At 108 degrees phys exceed spec */
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temperature = <108000>;
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hysteresis = <5000>;
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type = "critical";
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};
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};
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cooling-maps {
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map {
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trip = <&phy26_trip0>;
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cooling-device = <&chassis_fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
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};
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};
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};
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};
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/* YEN SUN TECHNOLOGY FD122510LL-N fan */
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chassis_fan: gpio-fan {
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compatible = "gpio-fan";
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gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>;
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gpio-fan,speed-map = <0 0
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7000 1>;
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#cooling-cells = <2>;
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};
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};
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&i2c_mst1 {
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status = "okay";
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/* i2c of the SFP+ cage; port 12 */
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i2c0: i2c@1 {
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reg = <1>;
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};
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};
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&spi0 {
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status = "okay";
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flash@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <10000000>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "u-boot";
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reg = <0x0 0xe0000>;
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read-only;
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};
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partition@e0000 {
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label = "u-boot-env";
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reg = <0xe0000 0x10000>;
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};
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partition@f0000 {
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label = "u-boot-env2";
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reg = <0xf0000 0x10000>;
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read-only;
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};
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partition@100000 {
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label = "jffs";
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reg = <0x100000 0x100000>;
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};
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partition@200000 {
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label = "jffs2";
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reg = <0x200000 0x100000>;
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};
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partition@b300000 {
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label = "firmware";
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reg = <0x300000 0xce0000>;
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compatible = "openwrt,uimage", "denx,uimage";
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openwrt,ih-magic = <0x93001250>;
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};
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partition@fe0000 {
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label = "log";
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reg = <0xfe0000 0x20000>;
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};
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};
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};
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};
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&mdio_bus0 {
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/* External RTL8218D PHY */
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phy0: ethernet-phy@0 {
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reg = <0>;
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compatible = "ethernet-phy-ieee802.3-c22";
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rtl9300,smi-address = <0 0>;
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// Disabled because we do not know how to bring up again
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// reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
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};
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phy1: ethernet-phy@1 {
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reg = <1>;
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compatible = "ethernet-phy-ieee802.3-c22";
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rtl9300,smi-address = <0 1>;
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};
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phy2: ethernet-phy@2 {
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reg = <2>;
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compatible = "ethernet-phy-ieee802.3-c22";
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rtl9300,smi-address = <0 2>;
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};
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phy3: ethernet-phy@3 {
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reg = <3>;
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compatible = "ethernet-phy-ieee802.3-c22";
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rtl9300,smi-address = <0 3>;
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};
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phy4: ethernet-phy@4 {
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reg = <4>;
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compatible = "ethernet-phy-ieee802.3-c22";
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rtl9300,smi-address = <0 4>;
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};
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phy5: ethernet-phy@5 {
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reg = <5>;
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compatible = "ethernet-phy-ieee802.3-c22";
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rtl9300,smi-address = <0 5>;
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};
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phy6: ethernet-phy@6 {
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reg = <6>;
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compatible = "ethernet-phy-ieee802.3-c22";
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rtl9300,smi-address = <0 6>;
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};
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phy7: ethernet-phy@7 {
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reg = <7>;
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compatible = "ethernet-phy-ieee802.3-c22";
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rtl9300,smi-address = <0 7>;
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};
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/* External Aquantia 113C PHYs */
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phy24: ethernet-phy@24 {
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reg = <24>;
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@ -292,124 +36,4 @@
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// reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
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#thermal-sensor-cells = <0>;
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};
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INTERNAL_PHY(27)
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};
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&switch0 {
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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label = "lan1";
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pcs-handle = <&serdes2>;
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phy-handle = <&phy0>;
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phy-mode = "usxgmii";
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led-set = <0>;
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};
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port@1 {
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reg = <1>;
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label = "lan2";
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pcs-handle = <&serdes2>;
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phy-handle = <&phy1>;
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phy-mode = "usxgmii";
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led-set = <0>;
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};
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port@2 {
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reg = <2>;
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label = "lan3";
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pcs-handle = <&serdes2>;
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phy-handle = <&phy2>;
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phy-mode = "usxgmii";
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led-set = <0>;
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};
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port@3 {
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reg = <3>;
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label = "lan4";
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pcs-handle = <&serdes2>;
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phy-handle = <&phy3>;
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phy-mode = "usxgmii";
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led-set = <0>;
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};
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port@4 {
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reg = <4>;
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label = "lan5";
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pcs-handle = <&serdes2>;
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phy-handle = <&phy4>;
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phy-mode = "usxgmii";
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led-set = <0>;
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};
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port@5 {
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reg = <5>;
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label = "lan6";
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pcs-handle = <&serdes2>;
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phy-handle = <&phy5>;
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phy-mode = "usxgmii";
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led-set = <0>;
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};
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port@6 {
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reg = <6>;
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label = "lan7";
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pcs-handle = <&serdes2>;
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phy-handle = <&phy6>;
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phy-mode = "usxgmii";
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led-set = <0>;
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};
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port@7 {
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reg = <7>;
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label = "lan8";
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pcs-handle = <&serdes2>;
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phy-handle = <&phy7>;
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phy-mode = "usxgmii";
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led-set = <0>;
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};
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port@24 {
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reg = <24>;
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label = "lan9";
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pcs-handle = <&serdes6>;
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phy-handle = <&phy24>;
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phy-mode = "usxgmii";
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led-set = <1>;
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};
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port@25 {
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reg = <25>;
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label = "lan10";
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pcs-handle = <&serdes7>;
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phy-handle = <&phy25>;
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phy-mode = "usxgmii";
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led-set = <1>;
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};
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port@26 {
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reg = <26>;
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label = "lan11";
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pcs-handle = <&serdes8>;
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phy-handle = <&phy26>;
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phy-mode = "usxgmii";
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led-set = <1>;
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};
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port@27 {
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reg = <27>;
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label = "lan12";
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pcs-handle = <&serdes9>;
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phy-handle = <&phy27>;
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phy-mode = "1000base-x";
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sfp = <&sfp0>;
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led-set = <2>;
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managed = "in-band-status";
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};
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port@28 {
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ethernet = <ðernet0>;
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reg = <28>;
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phy-mode = "internal";
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fixed-link {
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speed = <10000>;
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full-duplex;
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};
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};
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};
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};
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38
target/linux/realtek/dts/rtl9302_zyxel_xgs1250-12-b1.dts
Normal file
38
target/linux/realtek/dts/rtl9302_zyxel_xgs1250-12-b1.dts
Normal file
@ -0,0 +1,38 @@
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// SPDX-License-Identifier: GPL-2.0-or-later
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/dts-v1/;
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#include "rtl9302_zyxel_xgs1250-12-common.dtsi"
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/ {
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compatible = "zyxel,xgs1250-12-b1", "realtek,rtl838x-soc";
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model = "Zyxel XGS1250-12 B1 Switch";
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};
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&mdio_bus0 {
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phy24: ethernet-phy@24 {
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reg = <24>;
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compatible = "ethernet-phy-ieee802.3-c45";
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rtl9300,smi-address = <1 0>;
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// Disabled because we do not know how to bring up again
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// reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
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#thermal-sensor-cells = <0>;
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};
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phy25: ethernet-phy@25 {
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reg = <25>;
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compatible = "ethernet-phy-ieee802.3-c45";
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rtl9300,smi-address = <2 1>;
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// Disabled because we do not know how to bring up again
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// reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
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#thermal-sensor-cells = <0>;
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};
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phy26: ethernet-phy@26 {
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reg = <26>;
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compatible = "ethernet-phy-ieee802.3-c45";
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rtl9300,smi-address = <3 2>;
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// Disabled because we do not know how to bring up again
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// reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
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#thermal-sensor-cells = <0>;
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};
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};
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384
target/linux/realtek/dts/rtl9302_zyxel_xgs1250-12-common.dtsi
Normal file
384
target/linux/realtek/dts/rtl9302_zyxel_xgs1250-12-common.dtsi
Normal file
@ -0,0 +1,384 @@
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// SPDX-License-Identifier: GPL-2.0-or-later
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/dts-v1/;
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#include "rtl930x.dtsi"
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/leds/common.h>
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#include <dt-bindings/thermal/thermal.h>
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/ {
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aliases {
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led-boot = &led_pwr_sys;
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led-failsafe = &led_pwr_sys;
|
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led-running = &led_pwr_sys;
|
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led-upgrade = &led_pwr_sys;
|
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};
|
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|
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keys {
|
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compatible = "gpio-keys";
|
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|
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mode {
|
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label = "reset";
|
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gpios = <&gpio0 22 GPIO_ACTIVE_LOW>;
|
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linux,code = <KEY_RESTART>;
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};
|
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};
|
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|
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leds {
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compatible = "gpio-leds";
|
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|
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pinctrl-names = "default";
|
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pinctrl-0 = <&pinmux_disable_sys_led>;
|
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|
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led_pwr_sys: led-0 {
|
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color = <LED_COLOR_ID_GREEN>;
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function = LED_FUNCTION_POWER;
|
||||
gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
|
||||
sfp0: sfp-p12 {
|
||||
compatible = "sff,sfp";
|
||||
i2c-bus = <&i2c0>;
|
||||
los-gpio = <&gpio0 17 GPIO_ACTIVE_HIGH>;
|
||||
tx-fault-gpio = <&gpio0 20 GPIO_ACTIVE_HIGH>;
|
||||
mod-def0-gpio = <&gpio0 16 GPIO_ACTIVE_LOW>;
|
||||
tx-disable-gpio = <&gpio0 15 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led_set: led_set {
|
||||
compatible = "realtek,rtl9300-leds";
|
||||
active-low;
|
||||
|
||||
led_set0 = <0x0a20 0x0b80>; // LED set 0: 1000Mbps, 10/100Mbps
|
||||
led_set1 = <0x0a0b 0x0a28 0x0a82 0x0a0b>; // LED set 1: (10G, 5G, 2.5G) (2.5G, 1G)
|
||||
// (5G, 10/100) (10G, 5G, 2.5G)
|
||||
led_set2 = <0x0a20 0x0a01>; // LED set 2: 1000MBit, 10GBit
|
||||
};
|
||||
|
||||
thermal-zones {
|
||||
phy24-thermal {
|
||||
/* Poll every 10 seconds */
|
||||
polling-delay-passive = <10000>;
|
||||
polling-delay = <10000>;
|
||||
thermal-sensors = <&phy24>;
|
||||
|
||||
trips {
|
||||
phy24_trip0: phy24-trip0 {
|
||||
/* At 80 degrees turn on fan */
|
||||
temperature = <80000>;
|
||||
hysteresis = <1000>;
|
||||
type = "active";
|
||||
};
|
||||
|
||||
phy24_trip1: phy24-trip1 {
|
||||
/* At 108 degrees phys exceed spec */
|
||||
temperature = <108000>;
|
||||
hysteresis = <5000>;
|
||||
type = "critical";
|
||||
};
|
||||
};
|
||||
|
||||
cooling-maps {
|
||||
map {
|
||||
trip = <&phy24_trip0>;
|
||||
cooling-device = <&chassis_fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
phy25-thermal {
|
||||
/* Poll every 10 seconds */
|
||||
polling-delay-passive = <10000>;
|
||||
polling-delay = <10000>;
|
||||
thermal-sensors = <&phy25>;
|
||||
|
||||
trips {
|
||||
phy25_trip0: phy25-trip0 {
|
||||
/* At 80 degrees turn on fan */
|
||||
temperature = <80000>;
|
||||
hysteresis = <1000>;
|
||||
type = "active";
|
||||
};
|
||||
|
||||
phy25_trip1: phy25-trip1 {
|
||||
/* At 108 degrees phys exceed spec */
|
||||
temperature = <108000>;
|
||||
hysteresis = <5000>;
|
||||
type = "critical";
|
||||
};
|
||||
};
|
||||
|
||||
cooling-maps {
|
||||
map {
|
||||
trip = <&phy25_trip0>;
|
||||
cooling-device = <&chassis_fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
phy26-thermal {
|
||||
/* Poll every 10 seconds */
|
||||
polling-delay-passive = <10000>;
|
||||
polling-delay = <10000>;
|
||||
thermal-sensors = <&phy26>;
|
||||
|
||||
trips {
|
||||
phy26_trip0: phy26-trip0 {
|
||||
/* At 80 degrees turn on fan */
|
||||
temperature = <80000>;
|
||||
hysteresis = <1000>;
|
||||
type = "active";
|
||||
};
|
||||
|
||||
phy26_trip1: phy26-trip1 {
|
||||
/* At 108 degrees phys exceed spec */
|
||||
temperature = <108000>;
|
||||
hysteresis = <5000>;
|
||||
type = "critical";
|
||||
};
|
||||
};
|
||||
|
||||
cooling-maps {
|
||||
map {
|
||||
trip = <&phy26_trip0>;
|
||||
cooling-device = <&chassis_fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/* YEN SUN TECHNOLOGY FD122510LL-N fan */
|
||||
chassis_fan: gpio-fan {
|
||||
compatible = "gpio-fan";
|
||||
gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>;
|
||||
gpio-fan,speed-map = <0 0
|
||||
7000 1>;
|
||||
#cooling-cells = <2>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c_mst1 {
|
||||
status = "okay";
|
||||
|
||||
/* i2c of the SFP+ cage; port 12 */
|
||||
i2c0: i2c@1 {
|
||||
reg = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
&spi0 {
|
||||
status = "okay";
|
||||
flash@0 {
|
||||
compatible = "jedec,spi-nor";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <10000000>;
|
||||
|
||||
partitions {
|
||||
compatible = "fixed-partitions";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
partition@0 {
|
||||
label = "u-boot";
|
||||
reg = <0x0 0xe0000>;
|
||||
read-only;
|
||||
};
|
||||
partition@e0000 {
|
||||
label = "u-boot-env";
|
||||
reg = <0xe0000 0x10000>;
|
||||
};
|
||||
partition@f0000 {
|
||||
label = "u-boot-env2";
|
||||
reg = <0xf0000 0x10000>;
|
||||
read-only;
|
||||
};
|
||||
partition@100000 {
|
||||
label = "jffs";
|
||||
reg = <0x100000 0x100000>;
|
||||
};
|
||||
partition@200000 {
|
||||
label = "jffs2";
|
||||
reg = <0x200000 0x100000>;
|
||||
};
|
||||
partition@b300000 {
|
||||
label = "firmware";
|
||||
reg = <0x300000 0xce0000>;
|
||||
compatible = "openwrt,uimage", "denx,uimage";
|
||||
openwrt,ih-magic = <0x93001250>;
|
||||
};
|
||||
partition@fe0000 {
|
||||
label = "log";
|
||||
reg = <0xfe0000 0x20000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&mdio_bus0 {
|
||||
/* External RTL8218D or RTL8218E PHY */
|
||||
phy0: ethernet-phy@0 {
|
||||
reg = <0>;
|
||||
compatible = "ethernet-phy-ieee802.3-c22";
|
||||
rtl9300,smi-address = <0 0>;
|
||||
// Disabled because we do not know how to bring up again
|
||||
// reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
phy1: ethernet-phy@1 {
|
||||
reg = <1>;
|
||||
compatible = "ethernet-phy-ieee802.3-c22";
|
||||
rtl9300,smi-address = <0 1>;
|
||||
};
|
||||
phy2: ethernet-phy@2 {
|
||||
reg = <2>;
|
||||
compatible = "ethernet-phy-ieee802.3-c22";
|
||||
rtl9300,smi-address = <0 2>;
|
||||
};
|
||||
phy3: ethernet-phy@3 {
|
||||
reg = <3>;
|
||||
compatible = "ethernet-phy-ieee802.3-c22";
|
||||
rtl9300,smi-address = <0 3>;
|
||||
};
|
||||
phy4: ethernet-phy@4 {
|
||||
reg = <4>;
|
||||
compatible = "ethernet-phy-ieee802.3-c22";
|
||||
rtl9300,smi-address = <0 4>;
|
||||
};
|
||||
phy5: ethernet-phy@5 {
|
||||
reg = <5>;
|
||||
compatible = "ethernet-phy-ieee802.3-c22";
|
||||
rtl9300,smi-address = <0 5>;
|
||||
};
|
||||
phy6: ethernet-phy@6 {
|
||||
reg = <6>;
|
||||
compatible = "ethernet-phy-ieee802.3-c22";
|
||||
rtl9300,smi-address = <0 6>;
|
||||
};
|
||||
phy7: ethernet-phy@7 {
|
||||
reg = <7>;
|
||||
compatible = "ethernet-phy-ieee802.3-c22";
|
||||
rtl9300,smi-address = <0 7>;
|
||||
};
|
||||
|
||||
INTERNAL_PHY(27)
|
||||
};
|
||||
|
||||
&switch0 {
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
label = "lan1";
|
||||
pcs-handle = <&serdes2>;
|
||||
phy-handle = <&phy0>;
|
||||
phy-mode = "usxgmii";
|
||||
led-set = <0>;
|
||||
};
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
label = "lan2";
|
||||
pcs-handle = <&serdes2>;
|
||||
phy-handle = <&phy1>;
|
||||
phy-mode = "usxgmii";
|
||||
led-set = <0>;
|
||||
};
|
||||
port@2 {
|
||||
reg = <2>;
|
||||
label = "lan3";
|
||||
pcs-handle = <&serdes2>;
|
||||
phy-handle = <&phy2>;
|
||||
phy-mode = "usxgmii";
|
||||
led-set = <0>;
|
||||
};
|
||||
port@3 {
|
||||
reg = <3>;
|
||||
label = "lan4";
|
||||
pcs-handle = <&serdes2>;
|
||||
phy-handle = <&phy3>;
|
||||
phy-mode = "usxgmii";
|
||||
led-set = <0>;
|
||||
};
|
||||
port@4 {
|
||||
reg = <4>;
|
||||
label = "lan5";
|
||||
pcs-handle = <&serdes2>;
|
||||
phy-handle = <&phy4>;
|
||||
phy-mode = "usxgmii";
|
||||
led-set = <0>;
|
||||
};
|
||||
port@5 {
|
||||
reg = <5>;
|
||||
label = "lan6";
|
||||
pcs-handle = <&serdes2>;
|
||||
phy-handle = <&phy5>;
|
||||
phy-mode = "usxgmii";
|
||||
led-set = <0>;
|
||||
};
|
||||
port@6 {
|
||||
reg = <6>;
|
||||
label = "lan7";
|
||||
pcs-handle = <&serdes2>;
|
||||
phy-handle = <&phy6>;
|
||||
phy-mode = "usxgmii";
|
||||
led-set = <0>;
|
||||
};
|
||||
port@7 {
|
||||
reg = <7>;
|
||||
label = "lan8";
|
||||
pcs-handle = <&serdes2>;
|
||||
phy-handle = <&phy7>;
|
||||
phy-mode = "usxgmii";
|
||||
led-set = <0>;
|
||||
};
|
||||
|
||||
port@24 {
|
||||
reg = <24>;
|
||||
label = "lan9";
|
||||
pcs-handle = <&serdes6>;
|
||||
phy-handle = <&phy24>;
|
||||
phy-mode = "usxgmii";
|
||||
led-set = <1>;
|
||||
};
|
||||
port@25 {
|
||||
reg = <25>;
|
||||
label = "lan10";
|
||||
pcs-handle = <&serdes7>;
|
||||
phy-handle = <&phy25>;
|
||||
phy-mode = "usxgmii";
|
||||
led-set = <1>;
|
||||
};
|
||||
port@26 {
|
||||
reg = <26>;
|
||||
label = "lan11";
|
||||
pcs-handle = <&serdes8>;
|
||||
phy-handle = <&phy26>;
|
||||
phy-mode = "usxgmii";
|
||||
led-set = <1>;
|
||||
};
|
||||
|
||||
port@27 {
|
||||
reg = <27>;
|
||||
label = "lan12";
|
||||
pcs-handle = <&serdes9>;
|
||||
phy-handle = <&phy27>;
|
||||
phy-mode = "1000base-x";
|
||||
sfp = <&sfp0>;
|
||||
led-set = <2>;
|
||||
managed = "in-band-status";
|
||||
};
|
||||
|
||||
port@28 {
|
||||
ethernet = <ðernet0>;
|
||||
reg = <28>;
|
||||
phy-mode = "internal";
|
||||
fixed-link {
|
||||
speed = <10000>;
|
||||
full-duplex;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
@ -114,15 +114,13 @@ define Device/zyxel_xgs1210-12-a1
|
||||
endef
|
||||
TARGET_DEVICES += zyxel_xgs1210-12-a1
|
||||
|
||||
define Device/zyxel_xgs1250-12-a1
|
||||
define Device/zyxel_xgs1250-12-common
|
||||
SOC := rtl9302
|
||||
UIMAGE_MAGIC := 0x93001250
|
||||
ZYXEL_VERS := ABWE
|
||||
DEVICE_VENDOR := Zyxel
|
||||
DEVICE_MODEL := XGS1250-12
|
||||
DEVICE_VARIANT := A1
|
||||
DEVICE_PACKAGES := kmod-hwmon-gpiofan kmod-thermal
|
||||
SUPPORTED_DEVICES += zyxel,xgs1250-12
|
||||
IMAGE_SIZE := 13312k
|
||||
KERNEL_INITRAMFS := \
|
||||
kernel-bin | \
|
||||
@ -131,4 +129,16 @@ define Device/zyxel_xgs1250-12-a1
|
||||
zyxel-vers | \
|
||||
uImage gzip
|
||||
endef
|
||||
|
||||
define Device/zyxel_xgs1250-12-a1
|
||||
$(Device/zyxel_xgs1250-12-common)
|
||||
SUPPORTED_DEVICES += zyxel,xgs1250-12
|
||||
DEVICE_VARIANT := A1
|
||||
endef
|
||||
TARGET_DEVICES += zyxel_xgs1250-12-a1
|
||||
|
||||
define Device/zyxel_xgs1250-12-b1
|
||||
$(Device/zyxel_xgs1250-12-common)
|
||||
DEVICE_VARIANT := B1
|
||||
endef
|
||||
TARGET_DEVICES += zyxel_xgs1250-12-b1
|
||||
|
||||
Reference in New Issue
Block a user