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airoha: an7581: correctly attach the USB2 PHY for 3rd PCIe line

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The 3rd PCIe line use the USB2 serdes for PCIe operation. Correctly set
it to the DT node so that the mode can be correctly set in the PHY
driver.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
This commit is contained in:
Christian Marangi
2025-10-28 13:17:38 +01:00
parent 3db72b71d1
commit 3ba92e0e32
1 changed files with 1 additions and 1 deletions
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2
target/linux/airoha/dts/an7581.dtsi
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@ -780,7 +780,7 @@
clocks = <&scuclk EN7523_CLK_PCIE>;
clock-names = "sys-ck";
phys = <&pciephy>;
phys = <&usb1_phy PHY_TYPE_USB3>;
phy-names = "pcie-phy";
ranges = <0x02000000 0 0x28000000 0x0 0x28000000 0 0x4000000>;